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| author | ptitSeb <sebastien.chev@gmail.com> | 2024-03-06 16:46:33 +0100 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2024-03-06 16:46:33 +0100 |
| commit | 2533197a3c306f2fe00045c31021bfa6737e9246 (patch) | |
| tree | 1db68540cbea301f3b7d1ddf3d6dcbea2b0789b8 /src | |
| parent | 71c43b0de7effd77435635f36b5cb3968d440743 (diff) | |
| download | box64-2533197a3c306f2fe00045c31021bfa6737e9246.tar.gz box64-2533197a3c306f2fe00045c31021bfa6737e9246.zip | |
[ARM64_DYNAREC] Small optim to SAHF & more cosmetics stuffs
Diffstat (limited to 'src')
| -rw-r--r-- | src/dynarec/arm64/arm64_emitter.h | 1 | ||||
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_00.c | 8 |
2 files changed, 4 insertions, 5 deletions
diff --git a/src/dynarec/arm64/arm64_emitter.h b/src/dynarec/arm64/arm64_emitter.h index 7450fdd4..a04a7673 100644 --- a/src/dynarec/arm64/arm64_emitter.h +++ b/src/dynarec/arm64/arm64_emitter.h @@ -525,6 +525,7 @@ #define LOGIC_REG_gen(sf, opc, shift, N, Rm, imm6, Rn, Rd) ((sf)<<31 | (opc)<<29 | 0b01010<<24 | (shift)<<22 | (N)<<21 | (Rm)<<16 | (imm6)<<10 | (Rn)<<5 | (Rd)) #define ANDx_REG(Rd, Rn, Rm) EMIT(LOGIC_REG_gen(1, 0b00, 0b00, 0, Rm, 0, Rn, Rd)) #define ANDw_REG(Rd, Rn, Rm) EMIT(LOGIC_REG_gen(0, 0b00, 0b00, 0, Rm, 0, Rn, Rd)) +#define ANDw_REG_LSR(Rd, Rn, Rm, lsr) EMIT(LOGIC_REG_gen(0, 0b00, 0b01, 0, Rm, lsr, Rn, Rd)) #define ANDxw_REG(Rd, Rn, Rm) EMIT(LOGIC_REG_gen(rex.w, 0b00, 0b00, 0, Rm, 0, Rn, Rd)) #define ANDSx_REG(Rd, Rn, Rm) EMIT(LOGIC_REG_gen(1, 0b11, 0b00, 0, Rm, 0, Rn, Rd)) #define ANDSw_REG(Rd, Rn, Rm) EMIT(LOGIC_REG_gen(0, 0b11, 0b00, 0, Rm, 0, Rn, Rd)) diff --git a/src/dynarec/arm64/dynarec_arm64_00.c b/src/dynarec/arm64/dynarec_arm64_00.c index 409eb22c..95837da3 100644 --- a/src/dynarec/arm64/dynarec_arm64_00.c +++ b/src/dynarec/arm64/dynarec_arm64_00.c @@ -1464,10 +1464,11 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 0x98: - INST_NAME("CWDE"); if(rex.w) { + INST_NAME("CDQE"); SXTWx(xRAX, xRAX); } else { + INST_NAME("CWDE"); SXTHw(xRAX, xRAX); } break; @@ -1483,12 +1484,10 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin INST_NAME("PUSHF"); READFLAGS(X_ALL); PUSH1z(xFlags); - SMWRITE(); break; case 0x9D: INST_NAME("POPF"); SETFLAGS(X_ALL, SF_SET); - SMREAD(); POP1z(xFlags); MOV32w(x1, 0x3F7FD7); ANDw_REG(xFlags, xFlags, x1); @@ -1505,8 +1504,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin SETFLAGS(X_CF|X_PF|X_AF|X_ZF|X_SF, SF_SUBSET); MOV32w(x2, 0b11010101); BICw_REG(xFlags, xFlags, x2); - UBFXw(x1, xRAX, 8, 8); - ANDw_REG(x1, x1, x2); + ANDw_REG_LSR(x1, x2, xRAX, 8); ORRw_REG(xFlags, xFlags, x1); SET_DFNONE(x1); break; |