Merge pull request #964 from wannacu/main

[ARM64_DYNAREC] Added some opcodes

3 files changed, 69 insertions, 47 deletions

diff --git a/src/dynarec/arm64/dynarec_arm64_0f.c b/src/dynarec/arm64/dynarec_arm64_0f.c
index d5417113..2754c1de 100644
--- a/src/dynarec/arm64/dynarec_arm64_0f.c
+++ b/src/dynarec/arm64/dynarec_arm64_0f.c
@@ -538,7 +538,27 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     GETEM(q1, 0);

                     SQRDMULH_16(q0, q0, q1);

                     break;

-

+                case 0x1C:

+                    INST_NAME("PABSB Gm,Em");

+                    nextop = F8;

+                    GETGM(q0);

+                    GETEM(q1, 0);

+                    ABS_8(q0, q1);

+                    break;

+                case 0x1D:

+                    INST_NAME("PABSW Gm,Em");

+                    nextop = F8;

+                    GETGM(q0);

+                    GETEM(q1, 0);

+                    ABS_16(q0, q1);

+                    break;

+                case 0x1E:

+                    INST_NAME("PABSD Gm,Em");

+                    nextop = F8;

+                    GETGM(q0);

+                    GETEM(q1, 0);

+                    ABS_32(q0, q1);

+                    break;

                 case 0xF0:

                     INST_NAME("MOVBE Gd, Ed");

                     nextop=F8;

@@ -950,33 +970,17 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                         VMOVeS(v0, 1, v1, 0);

                     }

                 } else if(u8==0x00) {

-                    // dumplicate lower 16bits to all spot

-                    if(v0!=v1) {

-                        VMOVeH(v0, 0, v1, 0);

-                    }

-                    VMOVeH(v0, 1, v1, 0);

-                    VMOVeS(v0, 1, v1, 0);

+                    // duplicate lower 16bits to all spot

+                    VDUP_16(v0, v1, 0);

                 } else if(u8==0x55) {

-                    // dumplicate 16bits slot 1 to all spot

-                    if(v0!=v1) {

-                        VMOVeH(v0, 1, v1, 1);

-                    }

-                    VMOVeH(v0, 0, v1, 1);

-                    VMOVeS(v0, 1, v1, 0);

+                    // duplicate 16bits slot 1 to all spot

+                    VDUP_16(v0, v1, 1);

                 } else if(u8==0xAA) {

-                    // dumplicate 16bits slot 2 to all spot

-                    if(v0!=v1) {

-                        VMOVeH(v0, 2, v1, 2);

-                    }

-                    VMOVeH(v0, 3, v1, 2);

-                    VMOVeS(v0, 0, v1, 1);

+                    // duplicate 16bits slot 2 to all spot

+                    VDUP_16(v0, v1, 2);

                 } else if(u8==0xFF) {

-                    // dumplicate 16bits slot 3 to all spot

-                    if(v0!=v1) {

-                        VMOVeH(v0, 3, v1, 3);

-                    }

-                    VMOVeH(v0, 2, v1, 3);

-                    VMOVeS(v0, 0, v1, 1);

+                    // duplicate 16bits slot 3 to all spot

+                    VDUP_16(v0, v1, 3);

                 } else if(v0!=v1) {

                     VMOVeH(v0, 0, v1, (u8>>(0*2))&3);

                     VMOVeH(v0, 1, v1, (u8>>(1*2))&3);

diff --git a/src/dynarec/arm64/dynarec_arm64_660f.c b/src/dynarec/arm64/dynarec_arm64_660f.c
index 85699ba6..2d80e68d 100644
--- a/src/dynarec/arm64/dynarec_arm64_660f.c
+++ b/src/dynarec/arm64/dynarec_arm64_660f.c
@@ -1570,32 +1570,16 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                     }

                 } else if(u8==0x00) {

                     // duplicate lower 32bits to all spot

-                    if(v0!=v1) {

-                        VMOVeS(v0, 0, v1, 0);

-                    }

-                    VMOVeS(v0, 1, v1, 0);

-                    VMOVeD(v0, 1, v0, 0);

+                    VDUPQ_32(v0, v1, 0);

                 } else if(u8==0x55) {

                     // duplicate slot 1 to all spot

-                    if(v0!=v1) {

-                        VMOVeS(v0, 1, v1, 1);

-                    }

-                    VMOVeS(v0, 0, v1, 1);

-                    VMOVeD(v0, 1, v0, 0);

+                    VDUPQ_32(v0, v1, 1);

                 } else if(u8==0xAA) {

                     // duplicate slot 2 to all spot

-                    if(v0!=v1) {

-                        VMOVeS(v0, 2, v1, 2);

-                    }

-                    VMOVeS(v0, 3, v1, 2);

-                    VMOVeD(v0, 0, v0, 1);

+                    VDUPQ_32(v0, v1, 2);

                 } else if(u8==0xFF) {

                     // duplicate slot 3 to all spot

-                    if(v0!=v1) {

-                        VMOVeS(v0, 3, v1, 3);

-                    }

-                    VMOVeS(v0, 2, v1, 3);

-                    VMOVeD(v0, 0, v0, 1);

+                    VDUPQ_32(v0, v1, 3);

                 } else if(v0!=v1) {

                     VMOVeS(v0, 0, v1, (u8>>(0*2))&3);

                     VMOVeS(v0, 1, v1, (u8>>(1*2))&3);

@@ -1836,7 +1820,16 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
                 VORRQ(q1, q1, v1);      // NAN -> -NAN

             }

             break;

-

+        case 0x7D:

+            INST_NAME("HSUBPD Gx, Ex");  // SSE4 opcode!

+            nextop = F8;

+            GETEX(q1, 0, 0);

+            GETGX(q0, 1);

+            v0 = fpu_get_scratch(dyn);

+            VUZP1Q_64(v0, q0, q1);

+            VUZP2Q_64(q0, q0, q1);

+            VFSUBQD(q0, v0, q0);

+            break;

         case 0x7E:

             INST_NAME("MOVD Ed,Gx");

             nextop = F8;

@@ -2306,6 +2299,16 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             VDUPQ_16(v0, v0, 0);    // only the low 8bits will be used anyway

             USHLQ_16(q0, q0, v0);   // SHR x8

             break;

+        case 0xD0:

+            INST_NAME("ADDSUBPD Gx,Ex");

+            nextop = F8;

+            GETGX(q0, 1);

+            GETEX(q1, 0, 0);

+            v0 = fpu_get_scratch(dyn);

+            VFSUBQD(v0, q0, q1);

+            VFADDQD(q0, q0, q1);

+            VMOVeD(q0, 0, v0, 0);

+            break;

         case 0xD2:

             INST_NAME("PSRLD Gx,Ex");

             nextop = F8;

diff --git a/src/dynarec/arm64/dynarec_arm64_f20f.c b/src/dynarec/arm64/dynarec_arm64_f20f.c
index c2d8a46e..99edd187 100644
--- a/src/dynarec/arm64/dynarec_arm64_f20f.c
+++ b/src/dynarec/arm64/dynarec_arm64_f20f.c
@@ -376,7 +376,22 @@ uintptr_t dynarec64_F20F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             }

             VFADDPQS(v0, v0, v1);

             break;

-            

+        case 0x7D:

+            INST_NAME("HSUBPS Gx, Ex");

+            nextop = F8;

+            GETGX(v0, 1);

+            if(MODREG) {

+                v1 = sse_get_reg(dyn, ninst, x1, (nextop&7)+(rex.b<<3), 0);

+            } else {

+                addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<4, 15, rex, NULL, 0, 0);

+                v1 = fpu_get_scratch(dyn);

+                VLD128(v1, ed, fixedaddress);

+            }

+            d0 = fpu_get_scratch(dyn);

+            VUZP1Q_32(d0, v0, v1);

+            VUZP2Q_32(v0, v0, v1);

+            VFSUBQS(v0, d0, v0);

+            break;

         case 0xC2:

             INST_NAME("CMPSD Gx, Ex, Ib");

             nextop = F8;