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| author | Yang Liu <liuyang22@iscas.ac.cn> | 2025-08-15 20:18:38 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-08-15 14:18:38 +0200 |
| commit | 2d60c8c5b94d82344946354a6ef47638ae0af0d9 (patch) | |
| tree | e085f075644c5914f59533d055e9b20accc8caa9 /src | |
| parent | 270ce3750e619cd374f7a93fef2dd096f3929715 (diff) | |
| download | box64-2d60c8c5b94d82344946354a6ef47638ae0af0d9.tar.gz box64-2d60c8c5b94d82344946354a6ef47638ae0af0d9.zip | |
[RV64_DYNAREC] Added scalar AVX VMOVSS opcodes (#2941)
Diffstat (limited to 'src')
| -rw-r--r-- | src/dynarec/rv64/dynarec_rv64_avx_f3_0f.c | 45 | ||||
| -rw-r--r-- | src/dynarec/rv64/dynarec_rv64_helper.h | 19 |
2 files changed, 62 insertions, 2 deletions
diff --git a/src/dynarec/rv64/dynarec_rv64_avx_f3_0f.c b/src/dynarec/rv64/dynarec_rv64_avx_f3_0f.c index b45f7abb..e96640a6 100644 --- a/src/dynarec/rv64/dynarec_rv64_avx_f3_0f.c +++ b/src/dynarec/rv64/dynarec_rv64_avx_f3_0f.c @@ -30,7 +30,7 @@ uintptr_t dynarec64_AVX_F3_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, uint8_t opcode = F8; uint8_t nextop, u8; uint8_t gd, ed, vd; - uint8_t wback, wb1, wb2, gback, vback; + uint8_t wback, wb1, wb2, gback, vback, gyback; uint8_t eb1, eb2, gb1, gb2; int32_t i32, i32_; int cacheupd = 0; @@ -40,12 +40,53 @@ uintptr_t dynarec64_AVX_F3_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int s0; uint64_t tmp64u, u64; int64_t j64; - int64_t fixedaddress, gdoffset, vxoffset; + int64_t fixedaddress, gdoffset, vxoffset, gyoffset; int unscaled; rex_t rex = vex.rex; switch (opcode) { + case 0x10: + INST_NAME("VMOVSS Gx, [Vx,] Ex"); + nextop = F8; + GETEX(x2, 0, 1); + GETGX(); + LWU(x3, wback, fixedaddress); + SW(x3, gback, gdoffset); + if (MODREG) { + GETVX(); + if (gd != vex.v) { + LWU(x3, vback, vxoffset + 4); + SW(x3, gback, gdoffset + 4); + LD(x3, vback, vxoffset + 8); + SD(x3, gback, gdoffset + 8); + } + } else { + SW(xZR, gback, gdoffset + 4); + SD(xZR, gback, gdoffset + 8); + } + GETGY(); + SD(xZR, gyback, gyoffset); + SD(xZR, gyback, gyoffset + 8); + break; + case 0x11: + INST_NAME("VMOVSS Ex, [Vx,] Gx"); + nextop = F8; + GETEX(x2, 0, 1); + GETGX(); + LWU(x3, gback, gdoffset); + SW(x3, wback, fixedaddress); + if (MODREG) { + GETVX(); + LWU(x3, vback, vxoffset + 4); + SW(x3, wback, fixedaddress + 4); + LD(x3, vback, vxoffset + 8); + SD(x3, wback, fixedaddress + 8); + GETEY(); + SD(xZR, wback, fixedaddress); + SD(xZR, wback, fixedaddress + 8); + } + break; default: DEFAULT; } diff --git a/src/dynarec/rv64/dynarec_rv64_helper.h b/src/dynarec/rv64/dynarec_rv64_helper.h index 4142e07a..7ed1db51 100644 --- a/src/dynarec/rv64/dynarec_rv64_helper.h +++ b/src/dynarec/rv64/dynarec_rv64_helper.h @@ -457,6 +457,12 @@ gback = xEmu; \ gdoffset = offsetof(x64emu_t, xmm[gd]) +#define GETGY() \ + gd = ((nextop & 0x38) >> 3) + (rex.r << 3); \ + /* TODO: forget */ \ + gyback = xEmu; \ + gyoffset = offsetof(x64emu_t, ymm[gd]) + #define GETVX() \ sse_forget_reg(dyn, ninst, x3, vex.v); \ vback = xEmu; \ @@ -474,6 +480,19 @@ ed = 16; \ addr = geted(dyn, addr, ninst, nextop, &wback, a, x3, &fixedaddress, rex, NULL, I12, D); \ } + + +#define GETEY() \ + if (MODREG) { \ + ed = (nextop & 7) + (rex.b << 3); \ + /* TODO: forget */ \ + wback = xEmu; \ + fixedaddress = offsetof(x64emu_t, ymm[ed]); \ + } else { \ + fixedaddress += 16; \ + } + + #define GETEX32(a, D, I12) \ if (MODREG) { \ ed = (nextop & 7) + (rex.b << 3); \ |