diff options
| author | ptitSeb <sebastien.chev@gmail.com> | 2023-10-16 20:19:15 +0200 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2023-10-16 20:19:15 +0200 |
| commit | 2e66d603d3b0e9243bb00642a38def375b3a1a94 (patch) | |
| tree | 8ac7e6ffe990e03d7aad78154e904ec0621bb41b /src | |
| parent | d51560211c804f0af08a1f7cb184f74264b085de (diff) | |
| download | box64-2e66d603d3b0e9243bb00642a38def375b3a1a94.tar.gz box64-2e66d603d3b0e9243bb00642a38def375b3a1a94.zip | |
[ARM64_DYNAREC] Cosmetic changes to SM macros
Diffstat (limited to 'src')
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_helper.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_helper.h b/src/dynarec/arm64/dynarec_arm64_helper.h index 8a8f9fb5..6a457ec0 100644 --- a/src/dynarec/arm64/dynarec_arm64_helper.h +++ b/src/dynarec/arm64/dynarec_arm64_helper.h @@ -36,9 +36,9 @@ // Sequence of Read will trigger a DMB on "first" read if strongmem is 2 // Sequence of Write will trigger a DMB on "last" write if strongmem is 1 // Opcode will read -#define SMREAD() if(!dyn->smread && box64_dynarec_strongmem>1) {SMDMB();} +#define SMREAD() if((dyn->smread==0) && (box64_dynarec_strongmem>1)) {SMDMB();} // Opcode will read with option forced lock -#define SMREADLOCK(lock) if(lock || (!dyn->smread && box64_dynarec_strongmem>1)) {SMDMB();} +#define SMREADLOCK(lock) if((lock) || ((dyn->smread==0) && (box64_dynarec_strongmem>1))) {SMDMB();} // Opcode might read (depend on nextop) #define SMMIGHTREAD() if(!MODREG) {SMREAD();} // Opcode has wrote |