Added some weird 67 and 64/65 prefixed opcodes ([ARM64_DYNAREC] too)

5 files changed, 121 insertions, 14 deletions

diff --git a/src/dynarec/arm64/dynarec_arm64_64.c b/src/dynarec/arm64/dynarec_arm64_64.c
index 09576603..28078fc6 100644
--- a/src/dynarec/arm64/dynarec_arm64_64.c
+++ b/src/dynarec/arm64/dynarec_arm64_64.c
@@ -436,6 +436,25 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             emit_cmp32(dyn, ninst, rex, gd, ed, x3, x4, x5);
             break;
 
+        case 0x50:
+        case 0x51:
+        case 0x52:
+        case 0x53:
+        case 0x54:
+        case 0x55:
+        case 0x56:
+        case 0x57:
+        case 0x58:
+        case 0x59:
+        case 0x5A:
+        case 0x5B:
+        case 0x5C:
+        case 0x5D:
+        case 0x5E:
+        case 0x5F:
+            // just use regular conditional jump
+            return dynarec64_00(dyn, addr-1, ip, ninst, rex, rep, ok, need_epilog);
+
         case 0x63:
             if(rex.is32bits) {
                 // ARPL here
@@ -948,6 +967,22 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             INST_NAME("NOP");
             break;
 
+        case 0x9D:
+            INST_NAME("POPF");
+            SETFLAGS(X_ALL, SF_SET);
+            POP1z(xFlags);
+            MOV32w(x1, 0x3F7FD7);
+            ANDw_REG(xFlags, xFlags, x1);
+            MOV32w(x1, 0x202);
+            ORRw_REG(xFlags, xFlags, x1);
+            SET_DFNONE(x1);
+            if(box64_wine) {    // should this be done all the time?
+                TBZ_NEXT(xFlags, F_TF);
+                // go to epilog, TF should trigger at end of next opcode, so using Interpreter only
+                jump_to_epilog(dyn, addr, 0, ninst);
+            }
+            break;
+
         case 0xA1:
             INST_NAME("MOV EAX,FS:Od");
             grab_segdata(dyn, addr, ninst, x4, seg);
diff --git a/src/dynarec/arm64/dynarec_arm64_67.c b/src/dynarec/arm64/dynarec_arm64_67.c
index 358825c1..e5a4e613 100644
--- a/src/dynarec/arm64/dynarec_arm64_67.c
+++ b/src/dynarec/arm64/dynarec_arm64_67.c
@@ -682,6 +682,25 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                 emit_cmp32_0(dyn, ninst, rex, xRAX, x3, x4);

             break;

 

+        case 0x50:

+        case 0x51:

+        case 0x52:

+        case 0x53:

+        case 0x54:

+        case 0x55:

+        case 0x56:

+        case 0x57:

+        case 0x58:

+        case 0x59:

+        case 0x5A:

+        case 0x5B:

+        case 0x5C:

+        case 0x5D:

+        case 0x5E:

+        case 0x5F:

+            // just use regular conditional jump

+            return dynarec64_00(dyn, addr-1, ip, ninst, rex, rep, ok, need_epilog);

+

         case 0x63:

             INST_NAME("MOVSXD Gd, Ed");

             nextop = F8;

@@ -713,6 +732,21 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                 case 0x0F:

                     nextop = F8;

                     switch(nextop) {

+                        case 0x6F:

+                            INST_NAME("MOVDQA Gx,Ex");

+                            nextop = F8;

+                            if(MODREG) {

+                                v1 = sse_get_reg(dyn, ninst, x1, (nextop&7)+(rex.b<<3), 0);

+                                GETGX_empty(v0);

+                                VMOVQ(v0, v1);

+                            } else {

+                                GETGX_empty(v0);

+                                SMREAD();

+                                addr = geted32(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<4, 15, rex, NULL, 0, 0);

+                                VLD128(v0, ed, fixedaddress);

+                            }

+                            break;

+

                         case 0x7E:

                             INST_NAME("MOVD Ed,Gx");

                             nextop = F8;

@@ -919,6 +953,25 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             }

             break;

 

+        case 0x70:

+        case 0x71:

+        case 0x72:

+        case 0x73:

+        case 0x74:

+        case 0x75:

+        case 0x76:

+        case 0x77:

+        case 0x78:

+        case 0x79:

+        case 0x7A:

+        case 0x7B:

+        case 0x7C:

+        case 0x7D:

+        case 0x7E:

+        case 0x7F:

+            // just use regular conditional jump

+            return dynarec64_00(dyn, addr-1, ip, ninst, rex, rep, ok, need_epilog);

+

         case 0x81:

         case 0x83:

             nextop = F8;

diff --git a/src/emu/x64run.c b/src/emu/x64run.c
index c5c6d620..8972d63f 100644
--- a/src/emu/x64run.c
+++ b/src/emu/x64run.c
@@ -396,7 +396,7 @@ x64emurun:
         case 0x5E:
         case 0x5F:                      /* POP Reg */
             tmp8u = (opcode&7)+(rex.b<<3);
-            emu->regs[tmp8u].q[0] = is32bits?Pop32(emu):Pop64(emu);
+            emu->regs[tmp8u].q[0] = rex.is32bits?Pop32(emu):Pop64(emu);
             break;
         case 0x60:                      /* PUSHAD */
             if(rex.is32bits) {
diff --git a/src/emu/x64run64.c b/src/emu/x64run64.c
index 605e464d..5433319d 100644
--- a/src/emu/x64run64.c
+++ b/src/emu/x64run64.c
@@ -481,16 +481,7 @@ uintptr_t Run64(x64emu_t *emu, rex_t rex, int seg, uintptr_t addr)
         case 0x6D:                      /* INSD DX */

         case 0x6E:                      /* OUTSB DX */

         case 0x6F:                      /* OUTSD DX */

-#ifndef TEST_INTERPRETER

-            if(rex.is32bits && box64_ignoreint3)

-            {

-                F8;

-            } else {

-                F8;

-                emit_signal(emu, SIGSEGV, (void*)R_RIP, 0);

-            }

-            #endif

-            break;

+            return addr-1;  // skip 64/65 prefix and resume normal execution

 

         case 0x80:                      /* GRP Eb,Ib */

             nextop = F8;

@@ -663,6 +654,9 @@ uintptr_t Run64(x64emu_t *emu, rex_t rex, int seg, uintptr_t addr)
         case 0x90:                      /* NOP */

             break;

 

+        case 0x9D:                      /* POPF */

+            return addr-1;  // skip 64/65 prefix and resume normal execution

+

         case 0xA1:                      /* MOV EAX,FS:Od */

             if(rex.is32bits) {

                 tmp32s = F32S;

@@ -772,9 +766,7 @@ uintptr_t Run64(x64emu_t *emu, rex_t rex, int seg, uintptr_t addr)
             break;

 

         case 0xEB:                      /* JMP Ib */

-            tmp32s = F8S; // jump is relative

-            addr += tmp32s;

-            break;

+            return addr-1;  // skip 64/65 prefix and resume normal execution

 

         case 0xF6:                      /* GRP3 Eb(,Ib) */

             nextop = F8;

diff --git a/src/emu/x64run67.c b/src/emu/x64run67.c
index c8874336..ae5366fb 100644
--- a/src/emu/x64run67.c
+++ b/src/emu/x64run67.c
@@ -162,6 +162,31 @@ uintptr_t Run67(x64emu_t *emu, rex_t rex, int rep, uintptr_t addr)
             cmp32(emu, R_EAX, F32);

         break;

 

+    case 0x50:

+    case 0x51:

+    case 0x52:

+    case 0x53:

+    case 0x55:

+    case 0x56:

+    case 0x57:                      /* PUSH Reg */

+        tmp8u = (opcode&7)+(rex.b<<3);

+        if(rex.is32bits)

+            Push32(emu, emu->regs[tmp8u].dword[0]);

+        else

+            Push64(emu, emu->regs[tmp8u].q[0]);

+        break;

+    case 0x58:

+    case 0x59:

+    case 0x5A:

+    case 0x5B:

+    case 0x5C:                      /* POP ESP */

+    case 0x5D:

+    case 0x5E:

+    case 0x5F:                      /* POP Reg */

+        tmp8u = (opcode&7)+(rex.b<<3);

+        emu->regs[tmp8u].q[0] = rex.is32bits?Pop32(emu):Pop64(emu);

+        break;

+

     case 0x63:                      /* MOVSXD Gd,Ed */

         nextop = F8;

         GETED32(0);

@@ -182,6 +207,8 @@ uintptr_t Run67(x64emu_t *emu, rex_t rex, int rep, uintptr_t addr)
         return Run6766(emu, rex, rep, addr);

         #endif

 

+    case 0x70 ... 0x7F:

+        return addr-1;  // skip 67 prefix and resume normal execution

     case 0x80:                      /* GRP Eb,Ib */

         nextop = F8;

         GETEB32(1);