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| author | Yang Liu <liuyang22@iscas.ac.cn> | 2024-07-18 14:58:05 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-07-18 08:58:05 +0200 |
| commit | 427051d04c81e0cd47e1ebe6891b3d625d778cc2 (patch) | |
| tree | 273327f31be146dbbb4edd3ddf93a04e533bd5ea /src | |
| parent | c1a14f93d81e2419458e5673729a2c46876996c9 (diff) | |
| download | box64-427051d04c81e0cd47e1ebe6891b3d625d778cc2.tar.gz box64-427051d04c81e0cd47e1ebe6891b3d625d778cc2.zip | |
[RV64_DYNAREC] Added more 66 0F opcodes for vector (#1696)
Diffstat (limited to 'src')
| -rw-r--r-- | src/dynarec/rv64/dynarec_rv64_660f_vector.c | 42 | ||||
| -rw-r--r-- | src/dynarec/rv64/dynarec_rv64_helper.h | 5 |
2 files changed, 47 insertions, 0 deletions
diff --git a/src/dynarec/rv64/dynarec_rv64_660f_vector.c b/src/dynarec/rv64/dynarec_rv64_660f_vector.c index aec3028b..a2154076 100644 --- a/src/dynarec/rv64/dynarec_rv64_660f_vector.c +++ b/src/dynarec/rv64/dynarec_rv64_660f_vector.c @@ -45,6 +45,48 @@ uintptr_t dynarec64_660F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t i MAYUSE(eb2); MAYUSE(j64); switch (opcode) { + case 0x1F: + return 0; + case 0x28: + INST_NAME("MOVAPD Gx, Ex"); + nextop = F8; + // FIXME + vector_vsetvl_emul1(dyn, ninst, x1, VECTOR_SEW8); + + GETG; + if (MODREG) { + ed = (nextop & 7) + (rex.b << 3); + v1 = sse_get_reg_vector(dyn, ninst, x1, ed, 0); + v0 = sse_get_reg_empty_vector(dyn, ninst, x1, gd); + VOR_VV(v0, v1, v1, VECTOR_UNMASKED); + } else { + SMREAD(); + v0 = sse_get_reg_empty_vector(dyn, ninst, x1, gd); + addr = geted(dyn, addr, ninst, nextop, &ed, x2, x3, &fixedaddress, rex, NULL, 0, 0); + VLE8_V(v0, ed, VECTOR_UNMASKED, VECTOR_NFIELD1); + } + break; + case 0x6E: + return 0; + case 0x6F: + INST_NAME("MOVDQA Gx, Ex"); + nextop = F8; + // FIXME + vector_vsetvl_emul1(dyn, ninst, x1, VECTOR_SEW8); + + if (MODREG) { + v1 = sse_get_reg_vector(dyn, ninst, x1, (nextop & 7) + (rex.b << 3), 0); + GETGX_empty_vector(v0); + VOR_VV(v0, v1, v1, VECTOR_UNMASKED); + } else { + GETGX_empty_vector(v0); + SMREAD(); + addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, NULL, 0, 0); + VLE8_V(v0, ed, VECTOR_UNMASKED, VECTOR_NFIELD1); + } + break; + case 0x7E: + return 0; case 0xEF: INST_NAME("PXOR Gx, Ex"); nextop = F8; diff --git a/src/dynarec/rv64/dynarec_rv64_helper.h b/src/dynarec/rv64/dynarec_rv64_helper.h index 6b2731bd..7a565bd7 100644 --- a/src/dynarec/rv64/dynarec_rv64_helper.h +++ b/src/dynarec/rv64/dynarec_rv64_helper.h @@ -526,6 +526,11 @@ fixedaddress = 0; /* TODO: optimize this! */ \ } +#define GETGX_empty_vector(a) \ + gd = ((nextop & 0x38) >> 3) + (rex.r << 3); \ + a = sse_get_reg_empty_vector(dyn, ninst, x1, gd) + + #define SSE_LOOP_D_ITEM(GX1, EX1, F, i) \ LWU(GX1, gback, gdoffset + i * 4); \ LWU(EX1, wback, fixedaddress + i * 4); \ |