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| author | ptitSeb <sebastien.chev@gmail.com> | 2024-08-07 10:26:17 +0200 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2024-08-07 10:26:17 +0200 |
| commit | 42d99d2b2a5579a64582b419e1f4080bdc7338b2 (patch) | |
| tree | d85952bd2c49433d85d894d157db44f466529026 /src | |
| parent | d24f13cd73812c28431668eb74a2b6933a466629 (diff) | |
| download | box64-42d99d2b2a5579a64582b419e1f4080bdc7338b2.tar.gz box64-42d99d2b2a5579a64582b419e1f4080bdc7338b2.zip | |
[ARM64_DYNAREC] Added AVX.F3.0F38 F7 opcode
Diffstat (limited to 'src')
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_avx.c | 2 | ||||
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_avx_f3_0f38.c | 78 | ||||
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_helper.h | 2 |
3 files changed, 82 insertions, 0 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_avx.c b/src/dynarec/arm64/dynarec_arm64_avx.c index ec00dddd..1928a441 100644 --- a/src/dynarec/arm64/dynarec_arm64_avx.c +++ b/src/dynarec/arm64/dynarec_arm64_avx.c @@ -67,6 +67,8 @@ uintptr_t dynarec64_AVX(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ni addr = dynarec64_AVX_F2_0F38(dyn, addr, ip, ninst, vex, ok, need_epilog); else if( (vex.m==VEX_M_0F3A) && (vex.p==VEX_P_F2)) addr = dynarec64_AVX_F2_0F3A(dyn, addr, ip, ninst, vex, ok, need_epilog); + else if( (vex.m==VEX_M_0F38) && (vex.p==VEX_P_F3)) + addr = dynarec64_AVX_F3_0F38(dyn, addr, ip, ninst, vex, ok, need_epilog); else {DEFAULT;} if((*ok==-1) && (box64_dynarec_log>=LOG_INFO || box64_dynarec_dump || box64_dynarec_missing)) { diff --git a/src/dynarec/arm64/dynarec_arm64_avx_f3_0f38.c b/src/dynarec/arm64/dynarec_arm64_avx_f3_0f38.c new file mode 100644 index 00000000..b1bfd39e --- /dev/null +++ b/src/dynarec/arm64/dynarec_arm64_avx_f3_0f38.c @@ -0,0 +1,78 @@ +#include <stdio.h> +#include <stdlib.h> +#include <stddef.h> +#include <errno.h> + +#include "debug.h" +#include "box64context.h" +#include "dynarec.h" +#include "emu/x64emu_private.h" +#include "emu/x64run_private.h" +#include "x64run.h" +#include "x64emu.h" +#include "box64stack.h" +#include "callback.h" +#include "emu/x64run_private.h" +#include "x64trace.h" +#include "dynarec_native.h" +#include "my_cpuid.h" +#include "emu/x87emu_private.h" +#include "emu/x64shaext.h" + +#include "arm64_printer.h" +#include "dynarec_arm64_private.h" +#include "dynarec_arm64_functions.h" +#include "dynarec_arm64_helper.h" + +uintptr_t dynarec64_AVX_F3_0F38(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, vex_t vex, int* ok, int* need_epilog) +{ + (void)ip; (void)need_epilog; + + uint8_t opcode = F8; + uint8_t nextop, u8; + uint8_t gd, ed, vd; + uint8_t wback, wb1, wb2; + uint8_t eb1, eb2, gb1, gb2; + int32_t i32, i32_; + int cacheupd = 0; + int v0, v1, v2; + int q0, q1, q2; + int d0, d1, d2; + int s0; + uint64_t tmp64u; + int64_t j64; + int64_t fixedaddress; + int unscaled; + MAYUSE(wb1); + MAYUSE(wb2); + MAYUSE(eb1); + MAYUSE(eb2); + MAYUSE(gb1); + MAYUSE(gb2); + MAYUSE(q0); + MAYUSE(q1); + MAYUSE(d0); + MAYUSE(d1); + MAYUSE(s0); + MAYUSE(j64); + MAYUSE(cacheupd); + + rex_t rex = vex.rex; + + switch(opcode) { + + case 0xF7: + INST_NAME("SARX Gd, Ed, Vd"); + nextop = F8; + GETGD; + GETED(0); + GETVD; + ANDx_mask(x3, vd, 1, 0, rex.w?5:4); // mask 0x3f/0x1f + ASRxw_REG(gd, ed, x3); + break; + + default: + DEFAULT; + } + return addr; +} diff --git a/src/dynarec/arm64/dynarec_arm64_helper.h b/src/dynarec/arm64/dynarec_arm64_helper.h index e854ad8e..7810293b 100644 --- a/src/dynarec/arm64/dynarec_arm64_helper.h +++ b/src/dynarec/arm64/dynarec_arm64_helper.h @@ -1194,6 +1194,7 @@ void* arm64_next(x64emu_t* emu, uintptr_t addr); #define dynarec64_AVX_66_0F3A STEPNAME(dynarec64_AVX_66_0F3A) #define dynarec64_AVX_F2_0F38 STEPNAME(dynarec64_AVX_F2_0F38) #define dynarec64_AVX_F2_0F3A STEPNAME(dynarec64_AVX_F2_0F3A) +#define dynarec64_AVX_F3_0F38 STEPNAME(dynarec64_AVX_F3_0F38) #define geted STEPNAME(geted) #define geted32 STEPNAME(geted32) @@ -1624,6 +1625,7 @@ uintptr_t dynarec64_AVX_66_0F38(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip uintptr_t dynarec64_AVX_66_0F3A(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, vex_t vex, int* ok, int* need_epilog); uintptr_t dynarec64_AVX_F2_0F38(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, vex_t vex, int* ok, int* need_epilog); uintptr_t dynarec64_AVX_F2_0F3A(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, vex_t vex, int* ok, int* need_epilog); +uintptr_t dynarec64_AVX_F3_0F38(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, vex_t vex, int* ok, int* need_epilog); #if STEP < 2 #define PASS2(A) |