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| author | Yang Liu <numbksco@gmail.com> | 2024-03-21 00:29:47 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-03-20 17:29:47 +0100 |
| commit | 47b120380583ee3f23e4826dd0a887c2c18dd990 (patch) | |
| tree | b1dd5240e861a39b601d8bf14719ce709d7a3c33 /src | |
| parent | 81ca016581003c6eea67b88af071af7d22d7e9c5 (diff) | |
| download | box64-47b120380583ee3f23e4826dd0a887c2c18dd990.tar.gz box64-47b120380583ee3f23e4826dd0a887c2c18dd990.zip | |
[LA64_DYNAREC] Added some FP/LSX/LASX instructions to the emitter (#1374)
* [LA64_DYNAREC] Added FP instructions to the emitter * [LA64_DYNAREC] Added some LSX/LASX instructions to the emitter
Diffstat (limited to 'src')
| -rw-r--r-- | src/dynarec/la64/la64_emitter.h | 834 |
1 files changed, 833 insertions, 1 deletions
diff --git a/src/dynarec/la64/la64_emitter.h b/src/dynarec/la64/la64_emitter.h index c46d5512..c9c67407 100644 --- a/src/dynarec/la64/la64_emitter.h +++ b/src/dynarec/la64/la64_emitter.h @@ -524,8 +524,840 @@ f24-f31 fs0-fs7 Static registers Callee // MemoryStore(GR[rd][63:0], paddr, DOUBLEWORD) #define ST_D(rd, rj, imm12) EMIT(type_2RI12(0b0010100111, imm12, rj, rd)) +#define FADD_S(fd, fj, fk) EMIT(type_3R(0b00000001000000001, fk, fj, fd)) +#define FADD_D(fd, fj, fk) EMIT(type_3R(0b00000001000000010, fk, fj, fd)) +#define FSUB_S(fd, fj, fk) EMIT(type_3R(0b00000001000000101, fk, fj, fd)) +#define FSUB_D(fd, fj, fk) EMIT(type_3R(0b00000001000000110, fk, fj, fd)) +#define FMUL_S(fd, fj, fk) EMIT(type_3R(0b00000001000001001, fk, fj, fd)) +#define FMUL_D(fd, fj, fk) EMIT(type_3R(0b00000001000001010, fk, fj, fd)) +#define FDIV_S(fd, fj, fk) EMIT(type_3R(0b00000001000001101, fk, fj, fd)) +#define FDIV_D(fd, fj, fk) EMIT(type_3R(0b00000001000001110, fk, fj, fd)) +#define FMAX_S(fd, fj, fk) EMIT(type_3R(0b00000001000010001, fk, fj, fd)) +#define FMAX_D(fd, fj, fk) EMIT(type_3R(0b00000001000010010, fk, fj, fd)) +#define FMIN_S(fd, fj, fk) EMIT(type_3R(0b00000001000010101, fk, fj, fd)) +#define FMIN_D(fd, fj, fk) EMIT(type_3R(0b00000001000010110, fk, fj, fd)) +#define FMAXA_S(fd, fj, fk) EMIT(type_3R(0b00000001000011001, fk, fj, fd)) +#define FMAXA_D(fd, fj, fk) EMIT(type_3R(0b00000001000011010, fk, fj, fd)) +#define FMINA_S(fd, fj, fk) EMIT(type_3R(0b00000001000011101, fk, fj, fd)) +#define FMINA_D(fd, fj, fk) EMIT(type_3R(0b00000001000011110, fk, fj, fd)) +#define FSCALEB_S(fd, fj, fk) EMIT(type_3R(0b00000001000100001, fk, fj, fd)) +#define FSCALEB_D(fd, fj, fk) EMIT(type_3R(0b00000001000100010, fk, fj, fd)) +#define FCOPYSIGN_S(fd, fj, fk) EMIT(type_3R(0b00000001000100101, fk, fj, fd)) +#define FCOPYSIGN_D(fd, fj, fk) EMIT(type_3R(0b00000001000100110, fk, fj, fd)) +#define FABS_S(fd, fj) EMIT(type_2R(0b0000000100010100000001, fj, fd)) +#define FABS_D(fd, fj) EMIT(type_2R(0b0000000100010100000010, fj, fd)) +#define FNEG_S(fd, fj) EMIT(type_2R(0b0000000100010100000101, fj, fd)) +#define FNEG_D(fd, fj) EMIT(type_2R(0b0000000100010100000110, fj, fd)) +#define FLOGB_S(fd, fj) EMIT(type_2R(0b0000000100010100001001, fj, fd)) +#define FLOGB_D(fd, fj) EMIT(type_2R(0b0000000100010100001010, fj, fd)) +#define FCLASS_S(fd, fj) EMIT(type_2R(0b0000000100010100001101, fj, fd)) +#define FCLASS_D(fd, fj) EMIT(type_2R(0b0000000100010100001110, fj, fd)) +#define FSQRT_S(fd, fj) EMIT(type_2R(0b0000000100010100010001, fj, fd)) +#define FSQRT_D(fd, fj) EMIT(type_2R(0b0000000100010100010010, fj, fd)) +#define FRECIP_S(fd, fj) EMIT(type_2R(0b0000000100010100010101, fj, fd)) +#define FRECIP_D(fd, fj) EMIT(type_2R(0b0000000100010100010110, fj, fd)) +#define FRSQRT_S(fd, fj) EMIT(type_2R(0b0000000100010100011001, fj, fd)) +#define FRSQRT_D(fd, fj) EMIT(type_2R(0b0000000100010100011010, fj, fd)) +#define FRECIPE_S(fd, fj) EMIT(type_2R(0b0000000100010100011101, fj, fd)) +#define FRECIPE_D(fd, fj) EMIT(type_2R(0b0000000100010100011110, fj, fd)) +#define FRSQRTE_S(fd, fj) EMIT(type_2R(0b0000000100010100100001, fj, fd)) +#define FRSQRTE_D(fd, fj) EMIT(type_2R(0b0000000100010100100010, fj, fd)) +#define FMOV_S(fd, fj) EMIT(type_2R(0b0000000100010100100101, fj, fd)) +#define FMOV_D(fd, fj) EMIT(type_2R(0b0000000100010100100110, fj, fd)) +#define MOVGR2FR_W(fd, rj) EMIT(type_2R(0b0000000100010100101001, rj, fd)) +#define MOVGR2FR_D(fd, rj) EMIT(type_2R(0b0000000100010100101010, rj, fd)) +#define MOVGR2FRH_W(fd, rj) EMIT(type_2R(0b0000000100010100101011, rj, fd)) +#define MOVFR2GR_S(rd, fj) EMIT(type_2R(0b0000000100010100101101, fj, rd)) +#define MOVFR2GR_D(rd, fj) EMIT(type_2R(0b0000000100010100101110, fj, rd)) +#define MOVFRH2GR_S(rd, fj) EMIT(type_2R(0b0000000100010100101111, fj, rd)) +#define MOVGR2FCSR(fcsr, rj) EMIT(type_2R(0b0000000100010100110000, rj, fcsr)) +#define MOVFCSR2GR(rd, fcsr) EMIT(type_2R(0b0000000100010100110010, fcsr, rd)) +#define MOVFR2CF(cd, fj) EMIT(type_2R(0b0000000100010100110100, fj, cd & 0b111)) +#define MOVCF2FR(fd, cj) EMIT(type_2R(0b0000000100010100110101, cj & 0b111, fd)) +#define MOVGR2CF(cd, rj) EMIT(type_2R(0b0000000100010100110110, rj, cd & 0b111)) +#define MOVCF2GR(rd, cj) EMIT(type_2R(0b0000000100010100110111, cj & 0b111, rd)) +#define FCVT_S_D(fd, fj) EMIT(type_2R(0b0000000100011001000110, fj, fd)) +#define FCVT_D_S(fd, fj) EMIT(type_2R(0b0000000100011001001001, fj, fd)) +#define FTINTRM_W_S(fd, fj) EMIT(type_2R(0b0000000100011010000001, fj, fd)) +#define FTINTRM_W_D(fd, fj) EMIT(type_2R(0b0000000100011010000010, fj, fd)) +#define FTINTRM_L_S(fd, fj) EMIT(type_2R(0b0000000100011010001001, fj, fd)) +#define FTINTRM_L_D(fd, fj) EMIT(type_2R(0b0000000100011010001010, fj, fd)) +#define FTINTRP_W_S(fd, fj) EMIT(type_2R(0b0000000100011010010001, fj, fd)) +#define FTINTRP_W_D(fd, fj) EMIT(type_2R(0b0000000100011010010010, fj, fd)) +#define FTINTRP_L_S(fd, fj) EMIT(type_2R(0b0000000100011010011001, fj, fd)) +#define FTINTRP_L_D(fd, fj) EMIT(type_2R(0b0000000100011010011010, fj, fd)) +#define FTINTRZ_W_S(fd, fj) EMIT(type_2R(0b0000000100011010100001, fj, fd)) +#define FTINTRZ_W_D(fd, fj) EMIT(type_2R(0b0000000100011010100010, fj, fd)) +#define FTINTRZ_L_S(fd, fj) EMIT(type_2R(0b0000000100011010101001, fj, fd)) +#define FTINTRZ_L_D(fd, fj) EMIT(type_2R(0b0000000100011010101010, fj, fd)) +#define FTINTRNE_W_S(fd, fj) EMIT(type_2R(0b0000000100011010110001, fj, fd)) +#define FTINTRNE_W_D(fd, fj) EMIT(type_2R(0b0000000100011010110010, fj, fd)) +#define FTINTRNE_L_S(fd, fj) EMIT(type_2R(0b0000000100011010111001, fj, fd)) +#define FTINTRNE_L_D(fd, fj) EMIT(type_2R(0b0000000100011010111010, fj, fd)) +#define FTINT_W_S(fd, fj) EMIT(type_2R(0b0000000100011011000001, fj, fd)) +#define FTINT_W_D(fd, fj) EMIT(type_2R(0b0000000100011011000010, fj, fd)) +#define FTINT_L_S(fd, fj) EMIT(type_2R(0b0000000100011011001001, fj, fd)) +#define FTINT_L_D(fd, fj) EMIT(type_2R(0b0000000100011011001010, fj, fd)) +#define FFINT_S_W(fd, fj) EMIT(type_2R(0b0000000100011101000100, fj, fd)) +#define FFINT_S_L(fd, fj) EMIT(type_2R(0b0000000100011101000110, fj, fd)) +#define FFINT_D_W(fd, fj) EMIT(type_2R(0b0000000100011101001000, fj, fd)) +#define FFINT_D_L(fd, fj) EMIT(type_2R(0b0000000100011101001010, fj, fd)) +#define FRINT_S(fd, fj) EMIT(type_2R(0b0000000100011110010001, fj, fd)) +#define FRINT_D(fd, fj) EMIT(type_2R(0b0000000100011110010010, fj, fd)) +#define FMADD_S(fd, fj, fk, fa) EMIT(type_4R(0b000010000001, fa, fk, fj, fd)) +#define FMADD_D(fd, fj, fk, fa) EMIT(type_4R(0b000010000010, fa, fk, fj, fd)) +#define FMSUB_S(fd, fj, fk, fa) EMIT(type_4R(0b000010000101, fa, fk, fj, fd)) +#define FMSUB_D(fd, fj, fk, fa) EMIT(type_4R(0b000010000110, fa, fk, fj, fd)) +#define FNMADD_S(fd, fj, fk, fa) EMIT(type_4R(0b000010001001, fa, fk, fj, fd)) +#define FNMADD_D(fd, fj, fk, fa) EMIT(type_4R(0b000010001010, fa, fk, fj, fd)) +#define FNMSUB_S(fd, fj, fk, fa) EMIT(type_4R(0b000010001101, fa, fk, fj, fd)) +#define FNMSUB_D(fd, fj, fk, fa) EMIT(type_4R(0b000010001110, fa, fk, fj, fd)) +#define FCMP_S(cd, fj, fk, cond) EMIT(type_4R(0b000011000001, cond, fk, fj, cd & 0b111)) +#define FCMP_D(cd, fj, fk, cond) EMIT(type_4R(0b000011000010, cond, fk, fj, cd & 0b111)) +#define FSEL(fd, fj, fk, ca) EMIT(type_4R(0b000011010000, ca & 0b111, fk, fj, fd)) + +//////////////////////////////////////////////////////////////////////////////// +// (undocumented) LSX/LASX extension instructions + +/* + +Register alias: + ++-----------------------------------------------+----------------+ +| | F1 (64-bit) | FP +|------------------------------+----------------+----------------+ +| | VR1 (128-bit) | LSX +|------------------------------+---------------------------------+ +| XR1 (256-bit) | LASX ++----------------------------------------------------------------+ + +LSX instruction starts with V, LASX instruction starts with XV. + +*/ + +#define VADD_B(vd, vj, vk) EMIT(type_3R(0b01110000000010100, vj, vj, vd)) +#define VADD_H(vd, vj, vk) EMIT(type_3R(0b01110000000010101, vj, vj, vd)) +#define VADD_W(vd, vj, vk) EMIT(type_3R(0b01110000000010110, vj, vj, vd)) +#define VADD_D(vd, vj, vk) EMIT(type_3R(0b01110000000010111, vj, vj, vd)) +#define VADD_Q(vd, vj, vk) EMIT(type_3R(0b01110001001011010, vj, vj, vd)) +#define VSUB_B(vd, vj, vk) EMIT(type_3R(0b01110000000011000, vj, vj, vd)) +#define VSUB_H(vd, vj, vk) EMIT(type_3R(0b01110000000011001, vj, vj, vd)) +#define VSUB_W(vd, vj, vk) EMIT(type_3R(0b01110000000011010, vj, vj, vd)) +#define VSUB_D(vd, vj, vk) EMIT(type_3R(0b01110000000011011, vj, vj, vd)) +#define VSUB_Q(vd, vj, vk) EMIT(type_3R(0b01110001001011011, vj, vj, vd)) +#define VSADD_B(vd, vj, vk) EMIT(type_3R(0b01110000010001100, vk, vj, vd)) +#define VSADD_H(vd, vj, vk) EMIT(type_3R(0b01110000010001101, vk, vj, vd)) +#define VSADD_W(vd, vj, vk) EMIT(type_3R(0b01110000010001110, vk, vj, vd)) +#define VSADD_D(vd, vj, vk) EMIT(type_3R(0b01110000010001111, vk, vj, vd)) +#define VSADD_BU(vd, vj, vk) EMIT(type_3R(0b01110000010010100, vk, vj, vd)) +#define VSADD_HU(vd, vj, vk) EMIT(type_3R(0b01110000010010101, vk, vj, vd)) +#define VSADD_WU(vd, vj, vk) EMIT(type_3R(0b01110000010010110, vk, vj, vd)) +#define VSADD_DU(vd, vj, vk) EMIT(type_3R(0b01110000010010111, vk, vj, vd)) +#define VSSUB_B(vd, vj, vk) EMIT(type_3R(0b01110000010010000, vk, vj, vd)) +#define VSSUB_H(vd, vj, vk) EMIT(type_3R(0b01110000010010001, vk, vj, vd)) +#define VSSUB_W(vd, vj, vk) EMIT(type_3R(0b01110000010010010, vk, vj, vd)) +#define VSSUB_D(vd, vj, vk) EMIT(type_3R(0b01110000010010011, vk, vj, vd)) +#define VSSUB_BU(vd, vj, vk) EMIT(type_3R(0b01110000010011000, vk, vj, vd)) +#define VSSUB_HU(vd, vj, vk) EMIT(type_3R(0b01110000010011001, vk, vj, vd)) +#define VSSUB_WU(vd, vj, vk) EMIT(type_3R(0b01110000010011010, vk, vj, vd)) +#define VSSUB_DU(vd, vj, vk) EMIT(type_3R(0b01110000010011011, vk, vj, vd)) +#define VHADDW_H_B(vd, vj, vk) EMIT(type_3R(0b01110000010101000, vk, vj, vd)) +#define VHADDW_W_H(vd, vj, vk) EMIT(type_3R(0b01110000010101001, vk, vj, vd)) +#define VHADDW_D_W(vd, vj, vk) EMIT(type_3R(0b01110000010101010, vk, vj, vd)) +#define VHADDW_Q_D(vd, vj, vk) EMIT(type_3R(0b01110000010101011, vk, vj, vd)) +#define VHADDW_HU_BU(vd, vj, vk) EMIT(type_3R(0b01110000010110000, vk, vj, vd)) +#define VHADDW_WU_HU(vd, vj, vk) EMIT(type_3R(0b01110000010110001, vk, vj, vd)) +#define VHADDW_DU_WU(vd, vj, vk) EMIT(type_3R(0b01110000010110010, vk, vj, vd)) +#define VHADDW_QU_DU(vd, vj, vk) EMIT(type_3R(0b01110000010110011, vk, vj, vd)) +#define VHSUBW_H_B(vd, vj, vk) EMIT(type_3R(0b01110000010101100, vk, vj, vd)) +#define VHSUBW_W_H(vd, vj, vk) EMIT(type_3R(0b01110000010101101, vk, vj, vd)) +#define VHSUBW_D_W(vd, vj, vk) EMIT(type_3R(0b01110000010101110, vk, vj, vd)) +#define VHSUBW_Q_D(vd, vj, vk) EMIT(type_3R(0b01110000010101111, vk, vj, vd)) +#define VHSUBW_HU_BU(vd, vj, vk) EMIT(type_3R(0b01110000010110100, vk, vj, vd)) +#define VHSUBW_WU_HU(vd, vj, vk) EMIT(type_3R(0b01110000010110101, vk, vj, vd)) +#define VHSUBW_DU_WU(vd, vj, vk) EMIT(type_3R(0b01110000010110110, vk, vj, vd)) +#define VHSUBW_QU_DU(vd, vj, vk) EMIT(type_3R(0b01110000010110111, vk, vj, vd)) +#define VADDWEV_H_B(vd, vj, vk) EMIT(type_3R(0b01110000000111100, vk, vj, vd)) +#define VADDWEV_W_H(vd, vj, vk) EMIT(type_3R(0b01110000000111101, vk, vj, vd)) +#define VADDWEV_D_W(vd, vj, vk) EMIT(type_3R(0b01110000000111110, vk, vj, vd)) +#define VADDWEV_Q_D(vd, vj, vk) EMIT(type_3R(0b01110000000111111, vk, vj, vd)) +#define VADDWOD_H_B(vd, vj, vk) EMIT(type_3R(0b01110000001000100, vk, vj, vd)) +#define VADDWOD_W_H(vd, vj, vk) EMIT(type_3R(0b01110000001000101, vk, vj, vd)) +#define VADDWOD_D_W(vd, vj, vk) EMIT(type_3R(0b01110000001000110, vk, vj, vd)) +#define VADDWOD_Q_D(vd, vj, vk) EMIT(type_3R(0b01110000001000111, vk, vj, vd)) +#define VSUBWEV_H_B(vd, vj, vk) EMIT(type_3R(0b01110000001000000, vk, vj, vd)) +#define VSUBWEV_W_H(vd, vj, vk) EMIT(type_3R(0b01110000001000001, vk, vj, vd)) +#define VSUBWEV_D_W(vd, vj, vk) EMIT(type_3R(0b01110000001000010, vk, vj, vd)) +#define VSUBWEV_Q_D(vd, vj, vk) EMIT(type_3R(0b01110000001000011, vk, vj, vd)) +#define VSUBWOD_H_B(vd, vj, vk) EMIT(type_3R(0b01110000001001000, vk, vj, vd)) +#define VSUBWOD_W_H(vd, vj, vk) EMIT(type_3R(0b01110000001001001, vk, vj, vd)) +#define VSUBWOD_D_W(vd, vj, vk) EMIT(type_3R(0b01110000001001010, vk, vj, vd)) +#define VSUBWOD_Q_D(vd, vj, vk) EMIT(type_3R(0b01110000001001011, vk, vj, vd)) +#define VADDWEV_H_BU(vd, vj, vk) EMIT(type_3R(0b01110000001011100, vk, vj, vd)) +#define VADDWEV_W_HU(vd, vj, vk) EMIT(type_3R(0b01110000001011101, vk, vj, vd)) +#define VADDWEV_D_WU(vd, vj, vk) EMIT(type_3R(0b01110000001011110, vk, vj, vd)) +#define VADDWEV_Q_DU(vd, vj, vk) EMIT(type_3R(0b01110000001011111, vk, vj, vd)) +#define VADDWOD_H_BU(vd, vj, vk) EMIT(type_3R(0b01110000001100100, vk, vj, vd)) +#define VADDWOD_W_HU(vd, vj, vk) EMIT(type_3R(0b01110000001100101, vk, vj, vd)) +#define VADDWOD_D_WU(vd, vj, vk) EMIT(type_3R(0b01110000001100110, vk, vj, vd)) +#define VADDWOD_Q_DU(vd, vj, vk) EMIT(type_3R(0b01110000001100111, vk, vj, vd)) +#define VSUBWEV_H_BU(vd, vj, vk) EMIT(type_3R(0b01110000001100000, vk, vj, vd)) +#define VSUBWEV_W_HU(vd, vj, vk) EMIT(type_3R(0b01110000001100001, vk, vj, vd)) +#define VSUBWEV_D_WU(vd, vj, vk) EMIT(type_3R(0b01110000001100010, vk, vj, vd)) +#define VSUBWEV_Q_DU(vd, vj, vk) EMIT(type_3R(0b01110000001100011, vk, vj, vd)) +#define VSUBWOD_H_BU(vd, vj, vk) EMIT(type_3R(0b01110000001101000, vk, vj, vd)) +#define VSUBWOD_W_HU(vd, vj, vk) EMIT(type_3R(0b01110000001101001, vk, vj, vd)) +#define VSUBWOD_D_WU(vd, vj, vk) EMIT(type_3R(0b01110000001101010, vk, vj, vd)) +#define VSUBWOD_Q_DU(vd, vj, vk) EMIT(type_3R(0b01110000001101011, vk, vj, vd)) +#define VADDWEV_H_BU_B(vd, vj, vk) EMIT(type_3R(0b01110000001111100, vk, vj, vd)) +#define VADDWEV_W_HU_H(vd, vj, vk) EMIT(type_3R(0b01110000001111101, vk, vj, vd)) +#define VADDWEV_D_WU_W(vd, vj, vk) EMIT(type_3R(0b01110000001111110, vk, vj, vd)) +#define VADDWEV_Q_DU_D(vd, vj, vk) EMIT(type_3R(0b01110000001111111, vk, vj, vd)) +#define VADDWOD_H_BU_B(vd, vj, vk) EMIT(type_3R(0b01110000010000000, vk, vj, vd)) +#define VADDWOD_W_HU_H(vd, vj, vk) EMIT(type_3R(0b01110000010000001, vk, vj, vd)) +#define VADDWOD_D_WU_W(vd, vj, vk) EMIT(type_3R(0b01110000010000010, vk, vj, vd)) +#define VADDWOD_Q_DU_D(vd, vj, vk) EMIT(type_3R(0b01110000010000011, vk, vj, vd)) +#define VAVG_B(vd, vj, vk) EMIT(type_3R(0b01110000011001000, vk, vj, vd)) +#define VAVG_H(vd, vj, vk) EMIT(type_3R(0b01110000011001001, vk, vj, vd)) +#define VAVG_W(vd, vj, vk) EMIT(type_3R(0b01110000011001010, vk, vj, vd)) +#define VAVG_D(vd, vj, vk) EMIT(type_3R(0b01110000011001011, vk, vj, vd)) +#define VAVG_BU(vd, vj, vk) EMIT(type_3R(0b01110000011001100, vk, vj, vd)) +#define VAVG_HU(vd, vj, vk) EMIT(type_3R(0b01110000011001101, vk, vj, vd)) +#define VAVG_WU(vd, vj, vk) EMIT(type_3R(0b01110000011001110, vk, vj, vd)) +#define VAVG_DU(vd, vj, vk) EMIT(type_3R(0b01110000011001111, vk, vj, vd)) +#define VAVGR_B(vd, vj, vk) EMIT(type_3R(0b01110000011010000, vk, vj, vd)) +#define VAVGR_H(vd, vj, vk) EMIT(type_3R(0b01110000011010001, vk, vj, vd)) +#define VAVGR_W(vd, vj, vk) EMIT(type_3R(0b01110000011010010, vk, vj, vd)) +#define VAVGR_D(vd, vj, vk) EMIT(type_3R(0b01110000011010011, vk, vj, vd)) +#define VAVGR_BU(vd, vj, vk) EMIT(type_3R(0b01110000011010100, vk, vj, vd)) +#define VAVGR_HU(vd, vj, vk) EMIT(type_3R(0b01110000011010101, vk, vj, vd)) +#define VAVGR_WU(vd, vj, vk) EMIT(type_3R(0b01110000011010110, vk, vj, vd)) +#define VAVGR_DU(vd, vj, vk) EMIT(type_3R(0b01110000011010111, vk, vj, vd)) +#define VABSD_B(vd, vj, vk) EMIT(type_3R(0b01110000011000000, vk, vj, vd)) +#define VABSD_H(vd, vj, vk) EMIT(type_3R(0b01110000011000001, vk, vj, vd)) +#define VABSD_W(vd, vj, vk) EMIT(type_3R(0b01110000011000010, vk, vj, vd)) +#define VABSD_D(vd, vj, vk) EMIT(type_3R(0b01110000011000011, vk, vj, vd)) +#define VABSD_BU(vd, vj, vk) EMIT(type_3R(0b01110000011000100, vk, vj, vd)) +#define VABSD_HU(vd, vj, vk) EMIT(type_3R(0b01110000011000101, vk, vj, vd)) +#define VABSD_WU(vd, vj, vk) EMIT(type_3R(0b01110000011000110, vk, vj, vd)) +#define VABSD_DU(vd, vj, vk) EMIT(type_3R(0b01110000011000111, vk, vj, vd)) +#define VADDA_B(vd, vj, vk) EMIT(type_3R(0b01110000010111000, vk, vj, vd)) +#define VADDA_H(vd, vj, vk) EMIT(type_3R(0b01110000010111001, vk, vj, vd)) +#define VADDA_W(vd, vj, vk) EMIT(type_3R(0b01110000010111010, vk, vj, vd)) +#define VADDA_D(vd, vj, vk) EMIT(type_3R(0b01110000010111011, vk, vj, vd)) +#define VMAX_B(vd, vj, vk) EMIT(type_3R(0b01110000011100000, vk, vj, vd)) +#define VMAX_H(vd, vj, vk) EMIT(type_3R(0b01110000011100001, vk, vj, vd)) +#define VMAX_W(vd, vj, vk) EMIT(type_3R(0b01110000011100010, vk, vj, vd)) +#define VMAX_D(vd, vj, vk) EMIT(type_3R(0b01110000011100011, vk, vj, vd)) +#define VMAX_BU(vd, vj, vk) EMIT(type_3R(0b01110000011101000, vk, vj, vd)) +#define VMAX_HU(vd, vj, vk) EMIT(type_3R(0b01110000011101001, vk, vj, vd)) +#define VMAX_WU(vd, vj, vk) EMIT(type_3R(0b01110000011101010, vk, vj, vd)) +#define VMAX_DU(vd, vj, vk) EMIT(type_3R(0b01110000011101011, vk, vj, vd)) +#define VMIN_B(vd, vj, vk) EMIT(type_3R(0b01110000011100100, vk, vj, vd)) +#define VMIN_H(vd, vj, vk) EMIT(type_3R(0b01110000011100101, vk, vj, vd)) +#define VMIN_W(vd, vj, vk) EMIT(type_3R(0b01110000011100110, vk, vj, vd)) +#define VMIN_D(vd, vj, vk) EMIT(type_3R(0b01110000011100111, vk, vj, vd)) +#define VMIN_BU(vd, vj, vk) EMIT(type_3R(0b01110000011101100, vk, vj, vd)) +#define VMIN_HU(vd, vj, vk) EMIT(type_3R(0b01110000011101101, vk, vj, vd)) +#define VMIN_WU(vd, vj, vk) EMIT(type_3R(0b01110000011101110, vk, vj, vd)) +#define VMIN_DU(vd, vj, vk) EMIT(type_3R(0b01110000011101111, vk, vj, vd)) +#define VMUL_B(vd, vj, vk) EMIT(type_3R(0b01110000100001000, vk, vj, vd)) +#define VMUL_H(vd, vj, vk) EMIT(type_3R(0b01110000100001001, vk, vj, vd)) +#define VMUL_W(vd, vj, vk) EMIT(type_3R(0b01110000100001010, vk, vj, vd)) +#define VMUL_D(vd, vj, vk) EMIT(type_3R(0b01110000100001011, vk, vj, vd)) +#define VMUH_B(vd, vj, vk) EMIT(type_3R(0b01110000100001100, vk, vj, vd)) +#define VMUH_H(vd, vj, vk) EMIT(type_3R(0b01110000100001101, vk, vj, vd)) +#define VMUH_W(vd, vj, vk) EMIT(type_3R(0b01110000100001110, vk, vj, vd)) +#define VMUH_D(vd, vj, vk) EMIT(type_3R(0b01110000100001111, vk, vj, vd)) +#define VMUH_BU(vd, vj, vk) EMIT(type_3R(0b01110000100010000, vk, vj, vd)) +#define VMUH_HU(vd, vj, vk) EMIT(type_3R(0b01110000100010001, vk, vj, vd)) +#define VMUH_WU(vd, vj, vk) EMIT(type_3R(0b01110000100010010, vk, vj, vd)) +#define VMUH_DU(vd, vj, vk) EMIT(type_3R(0b01110000100010011, vk, vj, vd)) +#define VMULWEV_H_B(vd, vj, vk) EMIT(type_3R(0b01110000100100000, vk, vj, vd)) +#define VMULWEV_W_H(vd, vj, vk) EMIT(type_3R(0b01110000100100001, vk, vj, vd)) +#define VMULWEV_D_W(vd, vj, vk) EMIT(type_3R(0b01110000100100010, vk, vj, vd)) +#define VMULWEV_Q_D(vd, vj, vk) EMIT(type_3R(0b01110000100100011, vk, vj, vd)) +#define VMULWOD_H_B(vd, vj, vk) EMIT(type_3R(0b01110000100100100, vk, vj, vd)) +#define VMULWOD_W_H(vd, vj, vk) EMIT(type_3R(0b01110000100100101, vk, vj, vd)) +#define VMULWOD_D_W(vd, vj, vk) EMIT(type_3R(0b01110000100100110, vk, vj, vd)) +#define VMULWOD_Q_D(vd, vj, vk) EMIT(type_3R(0b01110000100100111, vk, vj, vd)) +#define VMULWEV_H_BU(vd, vj, vk) EMIT(type_3R(0b01110000100110000, vk, vj, vd)) +#define VMULWEV_W_HU(vd, vj, vk) EMIT(type_3R(0b01110000100110001, vk, vj, vd)) +#define VMULWEV_D_WU(vd, vj, vk) EMIT(type_3R(0b01110000100110010, vk, vj, vd)) +#define VMULWEV_Q_DU(vd, vj, vk) EMIT(type_3R(0b01110000100110011, vk, vj, vd)) +#define VMULWOD_H_BU(vd, vj, vk) EMIT(type_3R(0b01110000100110100, vk, vj, vd)) +#define VMULWOD_W_HU(vd, vj, vk) EMIT(type_3R(0b01110000100110101, vk, vj, vd)) +#define VMULWOD_D_WU(vd, vj, vk) EMIT(type_3R(0b01110000100110110, vk, vj, vd)) +#define VMULWOD_Q_DU(vd, vj, vk) EMIT(type_3R(0b01110000100110111, vk, vj, vd)) +#define VMULWEV_H_BU_B(vd, vj, vk) EMIT(type_3R(0b01110000101000000, vk, vj, vd)) +#define VMULWEV_W_HU_H(vd, vj, vk) EMIT(type_3R(0b01110000101000001, vk, vj, vd)) +#define VMULWEV_D_WU_W(vd, vj, vk) EMIT(type_3R(0b01110000101000010, vk, vj, vd)) +#define VMULWEV_Q_DU_D(vd, vj, vk) EMIT(type_3R(0b01110000101000011, vk, vj, vd)) +#define VMULWOD_H_BU_B(vd, vj, vk) EMIT(type_3R(0b01110000101000100, vk, vj, vd)) +#define VMULWOD_W_HU_H(vd, vj, vk) EMIT(type_3R(0b01110000101000101, vk, vj, vd)) +#define VMULWOD_D_WU_W(vd, vj, vk) EMIT(type_3R(0b01110000101000110, vk, vj, vd)) +#define VMULWOD_Q_DU_D(vd, vj, vk) EMIT(type_3R(0b01110000101000111, vk, vj, vd)) +#define VMADD_B(vd, vj, vk) EMIT(type_3R(0b01110000101010000, vk, vj, vd)) +#define VMADD_H(vd, vj, vk) EMIT(type_3R(0b01110000101010001, vk, vj, vd)) +#define VMADD_W(vd, vj, vk) EMIT(type_3R(0b01110000101010010, vk, vj, vd)) +#define VMADD_D(vd, vj, vk) EMIT(type_3R(0b01110000101010011, vk, vj, vd)) +#define VMSUB_B(vd, vj, vk) EMIT(type_3R(0b01110000101010100, vk, vj, vd)) +#define VMSUB_H(vd, vj, vk) EMIT(type_3R(0b01110000101010101, vk, vj, vd)) +#define VMSUB_W(vd, vj, vk) EMIT(type_3R(0b01110000101010110, vk, vj, vd)) +#define VMSUB_D(vd, vj, vk) EMIT(type_3R(0b01110000101010111, vk, vj, vd)) +#define VMADDWEV_H_B(vd, vj, vk) EMIT(type_3R(0b01110000101011000, vk, vj, vd)) +#define VMADDWEV_W_H(vd, vj, vk) EMIT(type_3R(0b01110000101011001, vk, vj, vd)) +#define VMADDWEV_D_W(vd, vj, vk) EMIT(type_3R(0b01110000101011010, vk, vj, vd)) +#define VMADDWEV_Q_D(vd, vj, vk) EMIT(type_3R(0b01110000101011011, vk, vj, vd)) +#define VMADDWOD_H_B(vd, vj, vk) EMIT(type_3R(0b01110000101011100, vk, vj, vd)) +#define VMADDWOD_W_H(vd, vj, vk) EMIT(type_3R(0b01110000101011101, vk, vj, vd)) +#define VMADDWOD_D_W(vd, vj, vk) EMIT(type_3R(0b01110000101011110, vk, vj, vd)) +#define VMADDWOD_Q_D(vd, vj, vk) EMIT(type_3R(0b01110000101011111, vk, vj, vd)) +#define VMADDWEV_H_BU(vd, vj, vk) EMIT(type_3R(0b01110000101101000, vk, vj, vd)) +#define VMADDWEV_W_HU(vd, vj, vk) EMIT(type_3R(0b01110000101101001, vk, vj, vd)) +#define VMADDWEV_D_WU(vd, vj, vk) EMIT(type_3R(0b01110000101101010, vk, vj, vd)) +#define VMADDWEV_Q_DU(vd, vj, vk) EMIT(type_3R(0b01110000101101011, vk, vj, vd)) +#define VMADDWOD_H_BU(vd, vj, vk) EMIT(type_3R(0b01110000101101100, vk, vj, vd)) +#define VMADDWOD_W_HU(vd, vj, vk) EMIT(type_3R(0b01110000101101101, vk, vj, vd)) +#define VMADDWOD_D_WU(vd, vj, vk) EMIT(type_3R(0b01110000101101110, vk, vj, vd)) +#define VMADDWOD_Q_DU(vd, vj, vk) EMIT(type_3R(0b01110000101101111, vk, vj, vd)) +#define VMADDWEV_H_BU_B(vd, vj, vk) EMIT(type_3R(0b01110000101111000, vk, vj, vd)) +#define VMADDWEV_W_HU_H(vd, vj, vk) EMIT(type_3R(0b01110000101111001, vk, vj, vd)) +#define VMADDWEV_D_WU_W(vd, vj, vk) EMIT(type_3R(0b01110000101111010, vk, vj, vd)) +#define VMADDWEV_Q_DU_D(vd, vj, vk) EMIT(type_3R(0b01110000101111011, vk, vj, vd)) +#define VMADDWOD_H_BU_B(vd, vj, vk) EMIT(type_3R(0b01110000101111100, vk, vj, vd)) +#define VMADDWOD_W_HU_H(vd, vj, vk) EMIT(type_3R(0b01110000101111101, vk, vj, vd)) +#define VMADDWOD_D_WU_W(vd, vj, vk) EMIT(type_3R(0b01110000101111110, vk, vj, vd)) +#define VMADDWOD_Q_DU_D(vd, vj, vk) EMIT(type_3R(0b01110000101111111, vk, vj, vd)) +#define VDIV_B(vd, vj, vk) EMIT(type_3R(0b01110000111000000, vk, vj, vd)) +#define VDIV_H(vd, vj, vk) EMIT(type_3R(0b01110000111000001, vk, vj, vd)) +#define VDIV_W(vd, vj, vk) EMIT(type_3R(0b01110000111000010, vk, vj, vd)) +#define VDIV_D(vd, vj, vk) EMIT(type_3R(0b01110000111000011, vk, vj, vd)) +#define VDIV_BU(vd, vj, vk) EMIT(type_3R(0b01110000111001000, vk, vj, vd)) +#define VDIV_HU(vd, vj, vk) EMIT(type_3R(0b01110000111001001, vk, vj, vd)) +#define VDIV_WU(vd, vj, vk) EMIT(type_3R(0b01110000111001010, vk, vj, vd)) +#define VDIV_DU(vd, vj, vk) EMIT(type_3R(0b01110000111001011, vk, vj, vd)) +#define VMOD_B(vd, vj, vk) EMIT(type_3R(0b01110000111000100, vk, vj, vd)) +#define VMOD_H(vd, vj, vk) EMIT(type_3R(0b01110000111000101, vk, vj, vd)) +#define VMOD_W(vd, vj, vk) EMIT(type_3R(0b01110000111000110, vk, vj, vd)) +#define VMOD_D(vd, vj, vk) EMIT(type_3R(0b01110000111000111, vk, vj, vd)) +#define VMOD_BU(vd, vj, vk) EMIT(type_3R(0b01110000111001100, vk, vj, vd)) +#define VMOD_HU(vd, vj, vk) EMIT(type_3R(0b01110000111001101, vk, vj, vd)) +#define VMOD_WU(vd, vj, vk) EMIT(type_3R(0b01110000111001110, vk, vj, vd)) +#define VMOD_DU(vd, vj, vk) EMIT(type_3R(0b01110000111001111, vk, vj, vd)) +#define VSIGNCOV_B(vd, vj, vk) EMIT(type_3R(0b01110001001011100, vk, vj, vd)) +#define VSIGNCOV_H(vd, vj, vk) EMIT(type_3R(0b01110001001011101, vk, vj, vd)) +#define VSIGNCOV_W(vd, vj, vk) EMIT(type_3R(0b01110001001011110, vk, vj, vd)) +#define VSIGNCOV_D(vd, vj, vk) EMIT(type_3R(0b01110001001011111, vk, vj, vd)) +#define VAND_V(vd, vj, vk) EMIT(type_3R(0b01110001001001100, vk, vj, vd)) +#define VOR_V(vd, vj, vk) EMIT(type_3R(0b01110001001001101, vk, vj, vd)) +#define VXOR_V(vd, vj, vk) EMIT(type_3R(0b01110001001001110, vk, vj, vd)) +#define VNOR_V(vd, vj, vk) EMIT(type_3R(0b01110001001001111, vk, vj, vd)) +#define VANDN_V(vd, vj, vk) EMIT(type_3R(0b01110001001010000, vk, vj, vd)) +#define VORN_V(vd, vj, vk) EMIT(type_3R(0b01110001001010001, vk, vj, vd)) +#define VSLL_B(vd, vj, vk) EMIT(type_3R(0b01110000111010000, vk, vj, vd)) +#define VSLL_H(vd, vj, vk) EMIT(type_3R(0b01110000111010001, vk, vj, vd)) +#define VSLL_W(vd, vj, vk) EMIT(type_3R(0b01110000111010010, vk, vj, vd)) +#define VSLL_D(vd, vj, vk) EMIT(type_3R(0b01110000111010011, vk, vj, vd)) +#define VSRL_B(vd, vj, vk) EMIT(type_3R(0b01110000111010100, vk, vj, vd)) +#define VSRL_H(vd, vj, vk) EMIT(type_3R(0b01110000111010101, vk, vj, vd)) +#define VSRL_W(vd, vj, vk) EMIT(type_3R(0b01110000111010110, vk, vj, vd)) +#define VSRL_D(vd, vj, vk) EMIT(type_3R(0b01110000111010111, vk, vj, vd)) +#define VSRA_B(vd, vj, vk) EMIT(type_3R(0b01110000111011000, vk, vj, vd)) +#define VSRA_H(vd, vj, vk) EMIT(type_3R(0b01110000111011001, vk, vj, vd)) +#define VSRA_W(vd, vj, vk) EMIT(type_3R(0b01110000111011010, vk, vj, vd)) +#define VSRA_D(vd, vj, vk) EMIT(type_3R(0b01110000111011011, vk, vj, vd)) +#define VROTR_B(vd, vj, vk) EMIT(type_3R(0b01110000111011100, vk, vj, vd)) +#define VROTR_H(vd, vj, vk) EMIT(type_3R(0b01110000111011101, vk, vj, vd)) +#define VROTR_W(vd, vj, vk) EMIT(type_3R(0b01110000111011110, vk, vj, vd)) +#define VROTR_D(vd, vj, vk) EMIT(type_3R(0b01110000111011111, vk, vj, vd)) +#define VSRLR_B(vd, vj, vk) EMIT(type_3R(0b01110000111100000, vk, vj, vd)) +#define VSRLR_H(vd, vj, vk) EMIT(type_3R(0b01110000111100001, vk, vj, vd)) +#define VSRLR_W(vd, vj, vk) EMIT(type_3R(0b01110000111100010, vk, vj, vd)) +#define VSRLR_D(vd, vj, vk) EMIT(type_3R(0b01110000111100011, vk, vj, vd)) +#define VSRAR_B(vd, vj, vk) EMIT(type_3R(0b01110000111100100, vk, vj, vd)) +#define VSRAR_H(vd, vj, vk) EMIT(type_3R(0b01110000111100101, vk, vj, vd)) +#define VSRAR_W(vd, vj, vk) EMIT(type_3R(0b01110000111100110, vk, vj, vd)) +#define VSRAR_D(vd, vj, vk) EMIT(type_3R(0b01110000111100111, vk, vj, vd)) +#define VSRLN_B_H(vd, vj, vk) EMIT(type_3R(0b01110000111101001, vk, vj, vd)) +#define VSRLN_H_W(vd, vj, vk) EMIT(type_3R(0b01110000111101010, vk, vj, vd)) +#define VSRLN_W_D(vd, vj, vk) EMIT(type_3R(0b01110000111101011, vk, vj, vd)) +#define VSRAN_B_H(vd, vj, vk) EMIT(type_3R(0b01110000111101101, vk, vj, vd)) +#define VSRAN_H_W(vd, vj, vk) EMIT(type_3R(0b01110000111101110, vk, vj, vd)) +#define VSRAN_W_D(vd, vj, vk) EMIT(type_3R(0b01110000111101111, vk, vj, vd)) +#define VSRLRN_B_H(vd, vj, vk) EMIT(type_3R(0b01110000111110001, vk, vj, vd)) +#define VSRLRN_H_W(vd, vj, vk) EMIT(type_3R(0b01110000111110010, vk, vj, vd)) +#define VSRLRN_W_D(vd, vj, vk) EMIT(type_3R(0b01110000111110011, vk, vj, vd)) +#define VSRARN_B_H(vd, vj, vk) EMIT(type_3R(0b01110000111110101, vk, vj, vd)) +#define VSRARN_H_W(vd, vj, vk) EMIT(type_3R(0b01110000111110110, vk, vj, vd)) +#define VSRARN_W_D(vd, vj, vk) EMIT(type_3R(0b01110000111110111, vk, vj, vd)) +#define VSSRLN_B_H(vd, vj, vk) EMIT(type_3R(0b01110000111111001, vk, vj, vd)) +#define VSSRLN_H_W(vd, vj, vk) EMIT(type_3R(0b01110000111111010, vk, vj, vd)) +#define VSSRLN_W_D(vd, vj, vk) EMIT(type_3R(0b01110000111111011, vk, vj, vd)) +#define VSSRAN_B_H(vd, vj, vk) EMIT(type_3R(0b01110000111111101, vk, vj, vd)) +#define VSSRAN_H_W(vd, vj, vk) EMIT(type_3R(0b01110000111111110, vk, vj, vd)) +#define VSSRAN_W_D(vd, vj, vk) EMIT(type_3R(0b01110000111111111, vk, vj, vd)) +#define VSSRLN_BU_H(vd, vj, vk) EMIT(type_3R(0b01110001000001001, vk, vj, vd)) +#define VSSRLN_HU_W(vd, vj, vk) EMIT(type_3R(0b01110001000001010, vk, vj, vd)) +#define VSSRLN_WU_D(vd, vj, vk) EMIT(type_3R(0b01110001000001011, vk, vj, vd)) +#define VSSRAN_BU_H(vd, vj, vk) EMIT(type_3R(0b01110001000001101, vk, vj, vd)) +#define VSSRAN_HU_W(vd, vj, vk) EMIT(type_3R(0b01110001000001110, vk, vj, vd)) +#define VSSRAN_WU_D(vd, vj, vk) EMIT(type_3R(0b01110001000001111, vk, vj, vd)) +#define VSSRLRN_B_H(vd, vj, vk) EMIT(type_3R(0b01110001000000001, vk, vj, vd)) +#define VSSRLRN_H_W(vd, vj, vk) EMIT(type_3R(0b01110001000000010, vk, vj, vd)) +#define VSSRLRN_W_D(vd, vj, vk) EMIT(type_3R(0b01110001000000011, vk, vj, vd)) +#define VSSRARN_B_H(vd, vj, vk) EMIT(type_3R(0b01110001000000101, vk, vj, vd)) +#define VSSRARN_H_W(vd, vj, vk) EMIT(type_3R(0b01110001000000110, vk, vj, vd)) +#define VSSRARN_W_D(vd, vj, vk) EMIT(type_3R(0b01110001000000111, vk, vj, vd)) +#define VSSRLRN_BU_H(vd, vj, vk) EMIT(type_3R(0b01110001000010001, vk, vj, vd)) +#define VSSRLRN_HU_W(vd, vj, vk) EMIT(type_3R(0b01110001000010010, vk, vj, vd)) +#define VSSRLRN_WU_D(vd, vj, vk) EMIT(type_3R(0b01110001000010011, vk, vj, vd)) +#define VSSRARN_BU_H(vd, vj, vk) EMIT(type_3R(0b01110001000010101, vk, vj, vd)) +#define VSSRARN_HU_W(vd, vj, vk) EMIT(type_3R(0b01110001000010110, vk, vj, vd)) +#define VSSRARN_WU_D(vd, vj, vk) EMIT(type_3R(0b01110001000010111, vk, vj, vd)) +#define VBITCLR_B(vd, vj, vk) EMIT(type_3R(0b01110001000011000, vk, vj, vd)) +#define VBITCLR_H(vd, vj, vk) EMIT(type_3R(0b01110001000011001, vk, vj, vd)) +#define VBITCLR_W(vd, vj, vk) EMIT(type_3R(0b01110001000011010, vk, vj, vd)) +#define VBITCLR_D(vd, vj, vk) EMIT(type_3R(0b01110001000011011, vk, vj, vd)) +#define VBITSET_B(vd, vj, vk) EMIT(type_3R(0b01110001000011100, vk, vj, vd)) +#define VBITSET_H(vd, vj, vk) EMIT(type_3R(0b01110001000011101, vk, vj, vd)) +#define VBITSET_W(vd, vj, vk) EMIT(type_3R(0b01110001000011110, vk, vj, vd)) +#define VBITSET_D(vd, vj, vk) EMIT(type_3R(0b01110001000011111, vk, vj, vd)) +#define VBITREV_B(vd, vj, vk) EMIT(type_3R(0b01110001000100000, vk, vj, vd)) +#define VBITREV_H(vd, vj, vk) EMIT(type_3R(0b01110001000100001, vk, vj, vd)) +#define VBITREV_W(vd, vj, vk) EMIT(type_3R(0b01110001000100010, vk, vj, vd)) +#define VBITREV_D(vd, vj, vk) EMIT(type_3R(0b01110001000100011, vk, vj, vd)) +#define VFRSTP_B(vd, vj, vk) EMIT(type_3R(0b01110001001010110, vk, vj, vd)) +#define VFRSTP_H(vd, vj, vk) EMIT(type_3R(0b01110001001010111, vk, vj, vd)) +#define VFADD_S(vd, vj, vk) EMIT(type_3R(0b01110001001100001, vk, vj, vd)) +#define VFADD_D(vd, vj, vk) EMIT(type_3R(0b01110001001100010, vk, vj, vd)) +#define VFSUB_S(vd, vj, vk) EMIT(type_3R(0b01110001001100101, vk, vj, vd)) +#define VFSUB_D(vd, vj, vk) EMIT(type_3R(0b01110001001100110, vk, vj, vd)) +#define VFMUL_S(vd, vj, vk) EMIT(type_3R(0b01110001001110001, vk, vj, vd)) +#define VFMUL_D(vd, vj, vk) EMIT(type_3R(0b01110001001110010, vk, vj, vd)) +#define VFDIV_S(vd, vj, vk) EMIT(type_3R(0b01110001001110101, vk, vj, vd)) +#define VFDIV_D(vd, vj, vk) EMIT(type_3R(0b01110001001110110, vk, vj, vd)) +#define VFMAX_S(vd, vj, vk) EMIT(type_3R(0b01110001001111001, vk, vj, vd)) +#define VFMAX_D(vd, vj, vk) EMIT(type_3R(0b01110001001111010, vk, vj, vd)) +#define VFMIN_S(vd, vj, vk) EMIT(type_3R(0b01110001001111101, vk, vj, vd)) +#define VFMIN_D(vd, vj, vk) EMIT(type_3R(0b01110001001111110, vk, vj, vd)) +#define VFMAXA_S(vd, vj, vk) EMIT(type_3R(0b01110001010000001, vk, vj, vd)) +#define VFMAXA_D(vd, vj, vk) EMIT(type_3R(0b01110001010000010, vk, vj, vd)) +#define VFMINA_S(vd, vj, vk) EMIT(type_3R(0b01110001010000101, vk, vj, vd)) +#define VFMINA_D(vd, vj, vk) EMIT(type_3R(0b01110001010000110, vk, vj, vd)) +#define VFCVT_H_S(vd, vj, vk) EMIT(type_3R(0b01110001010001100, vk, vj, vd)) +#define VFCVT_S_D(vd, vj, vk) EMIT(type_3R(0b01110001010001101, vk, vj, vd)) +#define VFTINT_W_D(vd, vj, vk) EMIT(type_3R(0b01110001010010011, vk, vj, vd)) +#define VFTINTRM_W_D(vd, vj, vk) EMIT(type_3R(0b01110001010010100, vk, vj, vd)) +#define VFTINTRP_W_D(vd, vj, vk) EMIT(type_3R(0b01110001010010101, vk, vj, vd)) +#define VFTINTRZ_W_D(vd, vj, vk) EMIT(type_3R(0b01110001010010110, vk, vj, vd)) +#define VFTINTRNE_W_D(vd, vj, vk) EMIT(type_3R(0b01110001010010111, vk, vj, vd)) +#define VFFINT_S_L(vd, vj, vk) EMIT(type_3R(0b01110001010010000, vk, vj, vd)) +#define VSEQ_B(vd, vj, vk) EMIT(type_3R(0b01110000000000000, vk, vj, vd)) +#define VSEQ_H(vd, vj, vk) EMIT(type_3R(0b01110000000000001, vk, vj, vd)) +#define VSEQ_W(vd, vj, vk) EMIT(type_3R(0b01110000000000010, vk, vj, vd)) +#define VSEQ_D(vd, vj, vk) EMIT(type_3R(0b01110000000000011, vk, vj, vd)) +#define VSLE_B(vd, vj, vk) EMIT(type_3R(0b01110000000000100, vk, vj, vd)) +#define VSLE_H(vd, vj, vk) EMIT(type_3R(0b01110000000000101, vk, vj, vd)) +#define VSLE_W(vd, vj, vk) EMIT(type_3R(0b01110000000000110, vk, vj, vd)) +#define VSLE_D(vd, vj, vk) EMIT(type_3R(0b01110000000000111, vk, vj, vd)) +#define VSLE_BU(vd, vj, vk) EMIT(type_3R(0b01110000000001000, vk, vj, vd)) +#define VSLE_HU(vd, vj, vk) EMIT(type_3R(0b01110000000001001, vk, vj, vd)) +#define VSLE_WU(vd, vj, vk) EMIT(type_3R(0b01110000000001010, vk, vj, vd)) +#define VSLE_DU(vd, vj, vk) EMIT(type_3R(0b01110000000001011, vk, vj, vd)) +#define VSLT_B(vd, vj, vk) EMIT(type_3R(0b01110000000001100, vk, vj, vd)) +#define VSLT_H(vd, vj, vk) EMIT(type_3R(0b01110000000001101, vk, vj, vd)) +#define VSLT_W(vd, vj, vk) EMIT(type_3R(0b01110000000001110, vk, vj, vd)) +#define VSLT_D(vd, vj, vk) EMIT(type_3R(0b01110000000001111, vk, vj, vd)) +#define VSLT_BU(vd, vj, vk) EMIT(type_3R(0b01110000000010000, vk, vj, vd)) +#define VSLT_HU(vd, vj, vk) EMIT(type_3R(0b01110000000010001, vk, vj, vd)) +#define VSLT_WU(vd, vj, vk) EMIT(type_3R(0b01110000000010010, vk, vj, vd)) +#define VSLT_DU(vd, vj, vk) EMIT(type_3R(0b01110000000010011, vk, vj, vd)) +#define VPACKEV_B(vd, vj, vk) EMIT(type_3R(0b01110001000101100, vk, vj, vd)) +#define VPACKEV_H(vd, vj, vk) EMIT(type_3R(0b01110001000101101, vk, vj, vd)) +#define VPACKEV_W(vd, vj, vk) EMIT(type_3R(0b01110001000101110, vk, vj, vd)) +#define VPACKEV_D(vd, vj, vk) EMIT(type_3R(0b01110001000101111, vk, vj, vd)) +#define VPACKOD_B(vd, vj, vk) EMIT(type_3R(0b01110001000110000, vk, vj, vd)) +#define VPACKOD_H(vd, vj, vk) EMIT(type_3R(0b01110001000110001, vk, vj, vd)) +#define VPACKOD_W(vd, vj, vk) EMIT(type_3R(0b01110001000110010, vk, vj, vd)) +#define VPACKOD_D(vd, vj, vk) EMIT(type_3R(0b01110001000110011, vk, vj, vd)) +#define VPICKEV_B(vd, vj, vk) EMIT(type_3R(0b01110001000111100, vk, vj, vd)) +#define VPICKEV_H(vd, vj, vk) EMIT(type_3R(0b01110001000111101, vk, vj, vd)) +#define VPICKEV_W(vd, vj, vk) EMIT(type_3R(0b01110001000111110, vk, vj, vd)) +#define VPICKEV_D(vd, vj, vk) EMIT(type_3R(0b01110001000111111, vk, vj, vd)) +#define VPICKOD_B(vd, vj, vk) EMIT(type_3R(0b01110001001000000, vk, vj, vd)) +#define VPICKOD_H(vd, vj, vk) EMIT(type_3R(0b01110001001000001, vk, vj, vd)) +#define VPICKOD_W(vd, vj, vk) EMIT(type_3R(0b01110001001000010, vk, vj, vd)) +#define VPICKOD_D(vd, vj, vk) EMIT(type_3R(0b01110001001000011, vk, vj, vd)) +#define VILVL_B(vd, vj, vk) EMIT(type_3R(0b01110001000110100, vk, vj, vd)) +#define VILVL_H(vd, vj, vk) EMIT(type_3R(0b01110001000110101, vk, vj, vd)) +#define VILVL_W(vd, vj, vk) EMIT(type_3R(0b01110001000110110, vk, vj, vd)) +#define VILVL_D(vd, vj, vk) EMIT(type_3R(0b01110001000110111, vk, vj, vd)) +#define VILVH_B(vd, vj, vk) EMIT(type_3R(0b01110001000111000, vk, vj, vd)) +#define VILVH_H(vd, vj, vk) EMIT(type_3R(0b01110001000111001, vk, vj, vd)) +#define VILVH_W(vd, vj, vk) EMIT(type_3R(0b01110001000111010, vk, vj, vd)) +#define VILVH_D(vd, vj, vk) EMIT(type_3R(0b01110001000111011, vk, vj, vd)) +#define VSHUF_H(vd, vj, vk) EMIT(type_3R(0b01110001011110101, vk, vj, vd)) +#define VSHUF_W(vd, vj, vk) EMIT(type_3R(0b01110001011110110, vk, vj, vd)) +#define VSHUF_D(vd, vj, vk) EMIT(type_3R(0b01110001011110111, vk, vj, vd)) + +#define XVADD_B(vd, vj, vk) EMIT(type_3R(0b01110100000010100, vk, vj, vd)) +#define XVADD_H(vd, vj, vk) EMIT(type_3R(0b01110100000010101, vk, vj, vd)) +#define XVADD_W(vd, vj, vk) EMIT(type_3R(0b01110100000010110, vk, vj, vd)) +#define XVADD_D(vd, vj, vk) EMIT(type_3R(0b01110100000010111, vk, vj, vd)) +#define XVADD_Q(vd, vj, vk) EMIT(type_3R(0b01110101001011010, vk, vj, vd)) +#define XVSUB_B(vd, vj, vk) EMIT(type_3R(0b01110100000011000, vk, vj, vd)) +#define XVSUB_H(vd, vj, vk) EMIT(type_3R(0b01110100000011001, vk, vj, vd)) +#define XVSUB_W(vd, vj, vk) EMIT(type_3R(0b01110100000011010, vk, vj, vd)) +#define XVSUB_D(vd, vj, vk) EMIT(type_3R(0b01110100000011011, vk, vj, vd)) +#define XVSUB_Q(vd, vj, vk) EMIT(type_3R(0b01110101001011011, vk, vj, vd)) +#define XVSADD_B(vd, vj, vk) EMIT(type_3R(0b01110100010001100, vk, vj, vd)) +#define XVSADD_H(vd, vj, vk) EMIT(type_3R(0b01110100010001101, vk, vj, vd)) +#define XVSADD_W(vd, vj, vk) EMIT(type_3R(0b01110100010001110, vk, vj, vd)) +#define XVSADD_D(vd, vj, vk) EMIT(type_3R(0b01110100010001111, vk, vj, vd)) +#define XVSADD_BU(vd, vj, vk) EMIT(type_3R(0b01110100010010100, vk, vj, vd)) +#define XVSADD_HU(vd, vj, vk) EMIT(type_3R(0b01110100010010101, vk, vj, vd)) +#define XVSADD_WU(vd, vj, vk) EMIT(type_3R(0b01110100010010110, vk, vj, vd)) +#define XVSADD_DU(vd, vj, vk) EMIT(type_3R(0b01110100010010111, vk, vj, vd)) +#define XVSSUB_B(vd, vj, vk) EMIT(type_3R(0b01110100010010000, vk, vj, vd)) +#define XVSSUB_H(vd, vj, vk) EMIT(type_3R(0b01110100010010001, vk, vj, vd)) +#define XVSSUB_W(vd, vj, vk) EMIT(type_3R(0b01110100010010010, vk, vj, vd)) +#define XVSSUB_D(vd, vj, vk) EMIT(type_3R(0b01110100010010011, vk, vj, vd)) +#define XVSSUB_BU(vd, vj, vk) EMIT(type_3R(0b01110100010011000, vk, vj, vd)) +#define XVSSUB_HU(vd, vj, vk) EMIT(type_3R(0b01110100010011001, vk, vj, vd)) +#define XVSSUB_WU(vd, vj, vk) EMIT(type_3R(0b01110100010011010, vk, vj, vd)) +#define XVSSUB_DU(vd, vj, vk) EMIT(type_3R(0b01110100010011011, vk, vj, vd)) +#define XVHADDW_H_B(vd, vj, vk) EMIT(type_3R(0b01110100010101000, vk, vj, vd)) +#define XVHADDW_W_H(vd, vj, vk) EMIT(type_3R(0b01110100010101001, vk, vj, vd)) +#define XVHADDW_D_W(vd, vj, vk) EMIT(type_3R(0b01110100010101010, vk, vj, vd)) +#define XVHADDW_Q_D(vd, vj, vk) EMIT(type_3R(0b01110100010101011, vk, vj, vd)) +#define XVHADDW_HU_BU(vd, vj, vk) EMIT(type_3R(0b01110100010110000, vk, vj, vd)) +#define XVHADDW_WU_HU(vd, vj, vk) EMIT(type_3R(0b01110100010110001, vk, vj, vd)) +#define XVHADDW_DU_WU(vd, vj, vk) EMIT(type_3R(0b01110100010110010, vk, vj, vd)) +#define XVHADDW_QU_DU(vd, vj, vk) EMIT(type_3R(0b01110100010110011, vk, vj, vd)) +#define XVHSUBW_H_B(vd, vj, vk) EMIT(type_3R(0b01110100010101100, vk, vj, vd)) +#define XVHSUBW_W_H(vd, vj, vk) EMIT(type_3R(0b01110100010101101, vk, vj, vd)) +#define XVHSUBW_D_W(vd, vj, vk) EMIT(type_3R(0b01110100010101110, vk, vj, vd)) +#define XVHSUBW_Q_D(vd, vj, vk) EMIT(type_3R(0b01110100010101111, vk, vj, vd)) +#define XVHSUBW_HU_BU(vd, vj, vk) EMIT(type_3R(0b01110100010110100, vk, vj, vd)) +#define XVHSUBW_WU_HU(vd, vj, vk) EMIT(type_3R(0b01110100010110101, vk, vj, vd)) +#define XVHSUBW_DU_WU(vd, vj, vk) EMIT(type_3R(0b01110100010110110, vk, vj, vd)) +#define XVHSUBW_QU_DU(vd, vj, vk) EMIT(type_3R(0b01110100010110111, vk, vj, vd)) +#define XVADDWEV_H_B(vd, vj, vk) EMIT(type_3R(0b01110100000111100, vk, vj, vd)) +#define XVADDWEV_W_H(vd, vj, vk) EMIT(type_3R(0b01110100000111101, vk, vj, vd)) +#define XVADDWEV_D_W(vd, vj, vk) EMIT(type_3R(0b01110100000111110, vk, vj, vd)) +#define XVADDWEV_Q_D(vd, vj, vk) EMIT(type_3R(0b01110100000111111, vk, vj, vd)) +#define XVADDWOD_H_B(vd, vj, vk) EMIT(type_3R(0b01110100001000100, vk, vj, vd)) +#define XVADDWOD_W_H(vd, vj, vk) EMIT(type_3R(0b01110100001000101, vk, vj, vd)) +#define XVADDWOD_D_W(vd, vj, vk) EMIT(type_3R(0b01110100001000110, vk, vj, vd)) +#define XVADDWOD_Q_D(vd, vj, vk) EMIT(type_3R(0b01110100001000111, vk, vj, vd)) +#define XVSUBWEV_H_B(vd, vj, vk) EMIT(type_3R(0b01110100001000000, vk, vj, vd)) +#define XVSUBWEV_W_H(vd, vj, vk) EMIT(type_3R(0b01110100001000001, vk, vj, vd)) +#define XVSUBWEV_D_W(vd, vj, vk) EMIT(type_3R(0b01110100001000010, vk, vj, vd)) +#define XVSUBWEV_Q_D(vd, vj, vk) EMIT(type_3R(0b01110100001000011, vk, vj, vd)) +#define XVSUBWOD_H_B(vd, vj, vk) EMIT(type_3R(0b01110100001001000, vk, vj, vd)) +#define XVSUBWOD_W_H(vd, vj, vk) EMIT(type_3R(0b01110100001001001, vk, vj, vd)) +#define XVSUBWOD_D_W(vd, vj, vk) EMIT(type_3R(0b01110100001001010, vk, vj, vd)) +#define XVSUBWOD_Q_D(vd, vj, vk) EMIT(type_3R(0b01110100001001011, vk, vj, vd)) +#define XVADDWEV_H_BU(vd, vj, vk) EMIT(type_3R(0b01110100001011100, vk, vj, vd)) +#define XVADDWEV_W_HU(vd, vj, vk) EMIT(type_3R(0b01110100001011101, vk, vj, vd)) +#define XVADDWEV_D_WU(vd, vj, vk) EMIT(type_3R(0b01110100001011110, vk, vj, vd)) +#define XVADDWEV_Q_DU(vd, vj, vk) EMIT(type_3R(0b01110100001011111, vk, vj, vd)) +#define XVADDWOD_H_BU(vd, vj, vk) EMIT(type_3R(0b01110100001100100, vk, vj, vd)) +#define XVADDWOD_W_HU(vd, vj, vk) EMIT(type_3R(0b01110100001100101, vk, vj, vd)) +#define XVADDWOD_D_WU(vd, vj, vk) EMIT(type_3R(0b01110100001100110, vk, vj, vd)) +#define XVADDWOD_Q_DU(vd, vj, vk) EMIT(type_3R(0b01110100001100111, vk, vj, vd)) +#define XVSUBWEV_H_BU(vd, vj, vk) EMIT(type_3R(0b01110100001100000, vk, vj, vd)) +#define XVSUBWEV_W_HU(vd, vj, vk) EMIT(type_3R(0b01110100001100001, vk, vj, vd)) +#define XVSUBWEV_D_WU(vd, vj, vk) EMIT(type_3R(0b01110100001100010, vk, vj, vd)) +#define XVSUBWEV_Q_DU(vd, vj, vk) EMIT(type_3R(0b01110100001100011, vk, vj, vd)) +#define XVSUBWOD_H_BU(vd, vj, vk) EMIT(type_3R(0b01110100001101000, vk, vj, vd)) +#define XVSUBWOD_W_HU(vd, vj, vk) EMIT(type_3R(0b01110100001101001, vk, vj, vd)) +#define XVSUBWOD_D_WU(vd, vj, vk) EMIT(type_3R(0b01110100001101010, vk, vj, vd)) +#define XVSUBWOD_Q_DU(vd, vj, vk) EMIT(type_3R(0b01110100001101011, vk, vj, vd)) +#define XVADDWEV_H_BU_B(vd, vj, vk) EMIT(type_3R(0b01110100001111100, vk, vj, vd)) +#define XVADDWEV_W_HU_H(vd, vj, vk) EMIT(type_3R(0b01110100001111101, vk, vj, vd)) +#define XVADDWEV_D_WU_W(vd, vj, vk) EMIT(type_3R(0b01110100001111110, vk, vj, vd)) +#define XVADDWEV_Q_DU_D(vd, vj, vk) EMIT(type_3R(0b01110100001111111, vk, vj, vd)) +#define XVADDWOD_H_BU_B(vd, vj, vk) EMIT(type_3R(0b01110100010000000, vk, vj, vd)) +#define XVADDWOD_W_HU_H(vd, vj, vk) EMIT(type_3R(0b01110100010000001, vk, vj, vd)) +#define XVADDWOD_D_WU_W(vd, vj, vk) EMIT(type_3R(0b01110100010000010, vk, vj, vd)) +#define XVADDWOD_Q_DU_D(vd, vj, vk) EMIT(type_3R(0b01110100010000011, vk, vj, vd)) +#define XVAVG_B(vd, vj, vk) EMIT(type_3R(0b01110100011001000, vk, vj, vd)) +#define XVAVG_H(vd, vj, vk) EMIT(type_3R(0b01110100011001001, vk, vj, vd)) +#define XVAVG_W(vd, vj, vk) EMIT(type_3R(0b01110100011001010, vk, vj, vd)) +#define XVAVG_D(vd, vj, vk) EMIT(type_3R(0b01110100011001011, vk, vj, vd)) +#define XVAVG_BU(vd, vj, vk) EMIT(type_3R(0b01110100011001100, vk, vj, vd)) +#define XVAVG_HU(vd, vj, vk) EMIT(type_3R(0b01110100011001101, vk, vj, vd)) +#define XVAVG_WU(vd, vj, vk) EMIT(type_3R(0b01110100011001110, vk, vj, vd)) +#define XVAVG_DU(vd, vj, vk) EMIT(type_3R(0b01110100011001111, vk, vj, vd)) +#define XVAVGR_B(vd, vj, vk) EMIT(type_3R(0b01110100011010000, vk, vj, vd)) +#define XVAVGR_H(vd, vj, vk) EMIT(type_3R(0b01110100011010001, vk, vj, vd)) +#define XVAVGR_W(vd, vj, vk) EMIT(type_3R(0b01110100011010010, vk, vj, vd)) +#define XVAVGR_D(vd, vj, vk) EMIT(type_3R(0b01110100011010011, vk, vj, vd)) +#define XVAVGR_BU(vd, vj, vk) EMIT(type_3R(0b01110100011010100, vk, vj, vd)) +#define XVAVGR_HU(vd, vj, vk) EMIT(type_3R(0b01110100011010101, vk, vj, vd)) +#define XVAVGR_WU(vd, vj, vk) EMIT(type_3R(0b01110100011010110, vk, vj, vd)) +#define XVAVGR_DU(vd, vj, vk) EMIT(type_3R(0b01110100011010111, vk, vj, vd)) +#define XVABSD_B(vd, vj, vk) EMIT(type_3R(0b01110100011000000, vk, vj, vd)) +#define XVABSD_H(vd, vj, vk) EMIT(type_3R(0b01110100011000001, vk, vj, vd)) +#define XVABSD_W(vd, vj, vk) EMIT(type_3R(0b01110100011000010, vk, vj, vd)) +#define XVABSD_D(vd, vj, vk) EMIT(type_3R(0b01110100011000011, vk, vj, vd)) +#define XVABSD_BU(vd, vj, vk) EMIT(type_3R(0b01110100011000100, vk, vj, vd)) +#define XVABSD_HU(vd, vj, vk) EMIT(type_3R(0b01110100011000101, vk, vj, vd)) +#define XVABSD_WU(vd, vj, vk) EMIT(type_3R(0b01110100011000110, vk, vj, vd)) +#define XVABSD_DU(vd, vj, vk) EMIT(type_3R(0b01110100011000111, vk, vj, vd)) +#define XVADDA_B(vd, vj, vk) EMIT(type_3R(0b01110100010111000, vk, vj, vd)) +#define XVADDA_H(vd, vj, vk) EMIT(type_3R(0b01110100010111001, vk, vj, vd)) +#define XVADDA_W(vd, vj, vk) EMIT(type_3R(0b01110100010111010, vk, vj, vd)) +#define XVADDA_D(vd, vj, vk) EMIT(type_3R(0b01110100010111011, vk, vj, vd)) +#define XVMAX_B(vd, vj, vk) EMIT(type_3R(0b01110100011100000, vk, vj, vd)) +#define XVMAX_H(vd, vj, vk) EMIT(type_3R(0b01110100011100001, vk, vj, vd)) +#define XVMAX_W(vd, vj, vk) EMIT(type_3R(0b01110100011100010, vk, vj, vd)) +#define XVMAX_D(vd, vj, vk) EMIT(type_3R(0b01110100011100011, vk, vj, vd)) +#define XVMAX_BU(vd, vj, vk) EMIT(type_3R(0b01110100011101000, vk, vj, vd)) +#define XVMAX_HU(vd, vj, vk) EMIT(type_3R(0b01110100011101001, vk, vj, vd)) +#define XVMAX_WU(vd, vj, vk) EMIT(type_3R(0b01110100011101010, vk, vj, vd)) +#define XVMAX_DU(vd, vj, vk) EMIT(type_3R(0b01110100011101011, vk, vj, vd)) +#define XVMIN_B(vd, vj, vk) EMIT(type_3R(0b01110100011100100, vk, vj, vd)) +#define XVMIN_H(vd, vj, vk) EMIT(type_3R(0b01110100011100101, vk, vj, vd)) +#define XVMIN_W(vd, vj, vk) EMIT(type_3R(0b01110100011100110, vk, vj, vd)) +#define XVMIN_D(vd, vj, vk) EMIT(type_3R(0b01110100011100111, vk, vj, vd)) +#define XVMIN_BU(vd, vj, vk) EMIT(type_3R(0b01110100011101100, vk, vj, vd)) +#define XVMIN_HU(vd, vj, vk) EMIT(type_3R(0b01110100011101101, vk, vj, vd)) +#define XVMIN_WU(vd, vj, vk) EMIT(type_3R(0b01110100011101110, vk, vj, vd)) +#define XVMIN_DU(vd, vj, vk) EMIT(type_3R(0b01110100011101111, vk, vj, vd)) +#define XVMUL_B(vd, vj, vk) EMIT(type_3R(0b01110100100001000, vk, vj, vd)) +#define XVMUL_H(vd, vj, vk) EMIT(type_3R(0b01110100100001001, vk, vj, vd)) +#define XVMUL_W(vd, vj, vk) EMIT(type_3R(0b01110100100001010, vk, vj, vd)) +#define XVMUL_D(vd, vj, vk) EMIT(type_3R(0b01110100100001011, vk, vj, vd)) +#define XVMUH_B(vd, vj, vk) EMIT(type_3R(0b01110100100001100, vk, vj, vd)) +#define XVMUH_H(vd, vj, vk) EMIT(type_3R(0b01110100100001101, vk, vj, vd)) +#define XVMUH_W(vd, vj, vk) EMIT(type_3R(0b01110100100001110, vk, vj, vd)) +#define XVMUH_D(vd, vj, vk) EMIT(type_3R(0b01110100100001111, vk, vj, vd)) +#define XVMUH_BU(vd, vj, vk) EMIT(type_3R(0b01110100100010000, vk, vj, vd)) +#define XVMUH_HU(vd, vj, vk) EMIT(type_3R(0b01110100100010001, vk, vj, vd)) +#define XVMUH_WU(vd, vj, vk) EMIT(type_3R(0b01110100100010010, vk, vj, vd)) +#define XVMUH_DU(vd, vj, vk) EMIT(type_3R(0b01110100100010011, vk, vj, vd)) +#define XVMULWEV_H_B(vd, vj, vk) EMIT(type_3R(0b01110100100100000, vk, vj, vd)) +#define XVMULWEV_W_H(vd, vj, vk) EMIT(type_3R(0b01110100100100001, vk, vj, vd)) +#define XVMULWEV_D_W(vd, vj, vk) EMIT(type_3R(0b01110100100100010, vk, vj, vd)) +#define XVMULWEV_Q_D(vd, vj, vk) EMIT(type_3R(0b01110100100100011, vk, vj, vd)) +#define XVMULWOD_H_B(vd, vj, vk) EMIT(type_3R(0b01110100100100100, vk, vj, vd)) +#define XVMULWOD_W_H(vd, vj, vk) EMIT(type_3R(0b01110100100100101, vk, vj, vd)) +#define XVMULWOD_D_W(vd, vj, vk) EMIT(type_3R(0b01110100100100110, vk, vj, vd)) +#define XVMULWOD_Q_D(vd, vj, vk) EMIT(type_3R(0b01110100100100111, vk, vj, vd)) +#define XVMULWEV_H_BU(vd, vj, vk) EMIT(type_3R(0b01110100100110000, vk, vj, vd)) +#define XVMULWEV_W_HU(vd, vj, vk) EMIT(type_3R(0b01110100100110001, vk, vj, vd)) +#define XVMULWEV_D_WU(vd, vj, vk) EMIT(type_3R(0b01110100100110010, vk, vj, vd)) +#define XVMULWEV_Q_DU(vd, vj, vk) EMIT(type_3R(0b01110100100110011, vk, vj, vd)) +#define XVMULWOD_H_BU(vd, vj, vk) EMIT(type_3R(0b01110100100110100, vk, vj, vd)) +#define XVMULWOD_W_HU(vd, vj, vk) EMIT(type_3R(0b01110100100110101, vk, vj, vd)) +#define XVMULWOD_D_WU(vd, vj, vk) EMIT(type_3R(0b01110100100110110, vk, vj, vd)) +#define XVMULWOD_Q_DU(vd, vj, vk) EMIT(type_3R(0b01110100100110111, vk, vj, vd)) +#define XVMULWEV_H_BU_B(vd, vj, vk) EMIT(type_3R(0b01110100101000000, vk, vj, vd)) +#define XVMULWEV_W_HU_H(vd, vj, vk) EMIT(type_3R(0b01110100101000001, vk, vj, vd)) +#define XVMULWEV_D_WU_W(vd, vj, vk) EMIT(type_3R(0b01110100101000010, vk, vj, vd)) +#define XVMULWEV_Q_DU_D(vd, vj, vk) EMIT(type_3R(0b01110100101000011, vk, vj, vd)) +#define XVMULWOD_H_BU_B(vd, vj, vk) EMIT(type_3R(0b01110100101000100, vk, vj, vd)) +#define XVMULWOD_W_HU_H(vd, vj, vk) EMIT(type_3R(0b01110100101000101, vk, vj, vd)) +#define XVMULWOD_D_WU_W(vd, vj, vk) EMIT(type_3R(0b01110100101000110, vk, vj, vd)) +#define XVMULWOD_Q_DU_D(vd, vj, vk) EMIT(type_3R(0b01110100101000111, vk, vj, vd)) +#define XVMADD_B(vd, vj, vk) EMIT(type_3R(0b01110100101010000, vk, vj, vd)) +#define XVMADD_H(vd, vj, vk) EMIT(type_3R(0b01110100101010001, vk, vj, vd)) +#define XVMADD_W(vd, vj, vk) EMIT(type_3R(0b01110100101010010, vk, vj, vd)) +#define XVMADD_D(vd, vj, vk) EMIT(type_3R(0b01110100101010011, vk, vj, vd)) +#define XVMSUB_B(vd, vj, vk) EMIT(type_3R(0b01110100101010100, vk, vj, vd)) +#define XVMSUB_H(vd, vj, vk) EMIT(type_3R(0b01110100101010101, vk, vj, vd)) +#define XVMSUB_W(vd, vj, vk) EMIT(type_3R(0b01110100101010110, vk, vj, vd)) +#define XVMSUB_D(vd, vj, vk) EMIT(type_3R(0b01110100101010111, vk, vj, vd)) +#define XVMADDWEV_H_B(vd, vj, vk) EMIT(type_3R(0b01110100101011000, vk, vj, vd)) +#define XVMADDWEV_W_H(vd, vj, vk) EMIT(type_3R(0b01110100101011001, vk, vj, vd)) +#define XVMADDWEV_D_W(vd, vj, vk) EMIT(type_3R(0b01110100101011010, vk, vj, vd)) +#define XVMADDWEV_Q_D(vd, vj, vk) EMIT(type_3R(0b01110100101011011, vk, vj, vd)) +#define XVMADDWOD_H_B(vd, vj, vk) EMIT(type_3R(0b01110100101011100, vk, vj, vd)) +#define XVMADDWOD_W_H(vd, vj, vk) EMIT(type_3R(0b01110100101011101, vk, vj, vd)) +#define XVMADDWOD_D_W(vd, vj, vk) EMIT(type_3R(0b01110100101011110, vk, vj, vd)) +#define XVMADDWOD_Q_D(vd, vj, vk) EMIT(type_3R(0b01110100101011111, vk, vj, vd)) +#define XVMADDWEV_H_BU(vd, vj, vk) EMIT(type_3R(0b01110100101101000, vk, vj, vd)) +#define XVMADDWEV_W_HU(vd, vj, vk) EMIT(type_3R(0b01110100101101001, vk, vj, vd)) +#define XVMADDWEV_D_WU(vd, vj, vk) EMIT(type_3R(0b01110100101101010, vk, vj, vd)) +#define XVMADDWEV_Q_DU(vd, vj, vk) EMIT(type_3R(0b01110100101101011, vk, vj, vd)) +#define XVMADDWOD_H_BU(vd, vj, vk) EMIT(type_3R(0b01110100101101100, vk, vj, vd)) +#define XVMADDWOD_W_HU(vd, vj, vk) EMIT(type_3R(0b01110100101101101, vk, vj, vd)) +#define XVMADDWOD_D_WU(vd, vj, vk) EMIT(type_3R(0b01110100101101110, vk, vj, vd)) +#define XVMADDWOD_Q_DU(vd, vj, vk) EMIT(type_3R(0b01110100101101111, vk, vj, vd)) +#define XVMADDWEV_H_BU_B(vd, vj, vk) EMIT(type_3R(0b01110100101111000, vk, vj, vd)) +#define XVMADDWEV_W_HU_H(vd, vj, vk) EMIT(type_3R(0b01110100101111001, vk, vj, vd)) +#define XVMADDWEV_D_WU_W(vd, vj, vk) EMIT(type_3R(0b01110100101111010, vk, vj, vd)) +#define XVMADDWEV_Q_DU_D(vd, vj, vk) EMIT(type_3R(0b01110100101111011, vk, vj, vd)) +#define XVMADDWOD_H_BU_B(vd, vj, vk) EMIT(type_3R(0b01110100101111100, vk, vj, vd)) +#define XVMADDWOD_W_HU_H(vd, vj, vk) EMIT(type_3R(0b01110100101111101, vk, vj, vd)) +#define XVMADDWOD_D_WU_W(vd, vj, vk) EMIT(type_3R(0b01110100101111110, vk, vj, vd)) +#define XVMADDWOD_Q_DU_D(vd, vj, vk) EMIT(type_3R(0b01110100101111111, vk, vj, vd)) +#define XVDIV_B(vd, vj, vk) EMIT(type_3R(0b01110100111000000, vk, vj, vd)) +#define XVDIV_H(vd, vj, vk) EMIT(type_3R(0b01110100111000001, vk, vj, vd)) +#define XVDIV_W(vd, vj, vk) EMIT(type_3R(0b01110100111000010, vk, vj, vd)) +#define XVDIV_D(vd, vj, vk) EMIT(type_3R(0b01110100111000011, vk, vj, vd)) +#define XVMOD_B(vd, vj, vk) EMIT(type_3R(0b01110100111000100, vk, vj, vd)) +#define XVMOD_H(vd, vj, vk) EMIT(type_3R(0b01110100111000101, vk, vj, vd)) +#define XVMOD_W(vd, vj, vk) EMIT(type_3R(0b01110100111000110, vk, vj, vd)) +#define XVMOD_D(vd, vj, vk) EMIT(type_3R(0b01110100111000111, vk, vj, vd)) +#define XVDIV_BU(vd, vj, vk) EMIT(type_3R(0b01110100111001000, vk, vj, vd)) +#define XVDIV_HU(vd, vj, vk) EMIT(type_3R(0b01110100111001001, vk, vj, vd)) +#define XVDIV_WU(vd, vj, vk) EMIT(type_3R(0b01110100111001010, vk, vj, vd)) +#define XVDIV_DU(vd, vj, vk) EMIT(type_3R(0b01110100111001011, vk, vj, vd)) +#define XVMOD_BU(vd, vj, vk) EMIT(type_3R(0b01110100111001100, vk, vj, vd)) +#define XVMOD_HU(vd, vj, vk) EMIT(type_3R(0b01110100111001101, vk, vj, vd)) +#define XVMOD_WU(vd, vj, vk) EMIT(type_3R(0b01110100111001110, vk, vj, vd)) +#define XVMOD_DU(vd, vj, vk) EMIT(type_3R(0b01110100111001111, vk, vj, vd)) +#define XVSIGNCOV_B(vd, vj, vk) EMIT(type_3R(0b01110101001011100, vk, vj, vd)) +#define XVSIGNCOV_H(vd, vj, vk) EMIT(type_3R(0b01110101001011101, vk, vj, vd)) +#define XVSIGNCOV_W(vd, vj, vk) EMIT(type_3R(0b01110101001011110, vk, vj, vd)) +#define XVSIGNCOV_D(vd, vj, vk) EMIT(type_3R(0b01110101001011111, vk, vj, vd)) +#define XVAND_V(vd, vj, vk) EMIT(type_3R(0b01110101001001100, vk, vj, vd)) +#define XVOR_V(vd, vj, vk) EMIT(type_3R(0b01110101001001101, vk, vj, vd)) +#define XVXOR_V(vd, vj, vk) EMIT(type_3R(0b01110101001001110, vk, vj, vd)) +#define XVNOR_V(vd, vj, vk) EMIT(type_3R(0b01110101001001111, vk, vj, vd)) +#define XVANDN_V(vd, vj, vk) EMIT(type_3R(0b01110101001010000, vk, vj, vd)) +#define XVORN_V(vd, vj, vk) EMIT(type_3R(0b01110101001010001, vk, vj, vd)) +#define XVSLL_B(vd, vj, vk) EMIT(type_3R(0b01110100111010000, vk, vj, vd)) +#define XVSLL_H(vd, vj, vk) EMIT(type_3R(0b01110100111010001, vk, vj, vd)) +#define XVSLL_W(vd, vj, vk) EMIT(type_3R(0b01110100111010010, vk, vj, vd)) +#define XVSLL_D(vd, vj, vk) EMIT(type_3R(0b01110100111010011, vk, vj, vd)) +#define XVSRL_B(vd, vj, vk) EMIT(type_3R(0b01110100111010100, vk, vj, vd)) +#define XVSRL_H(vd, vj, vk) EMIT(type_3R(0b01110100111010101, vk, vj, vd)) +#define XVSRL_W(vd, vj, vk) EMIT(type_3R(0b01110100111010110, vk, vj, vd)) +#define XVSRL_D(vd, vj, vk) EMIT(type_3R(0b01110100111010111, vk, vj, vd)) +#define XVSRA_B(vd, vj, vk) EMIT(type_3R(0b01110100111011000, vk, vj, vd)) +#define XVSRA_H(vd, vj, vk) EMIT(type_3R(0b01110100111011001, vk, vj, vd)) +#define XVSRA_W(vd, vj, vk) EMIT(type_3R(0b01110100111011010, vk, vj, vd)) +#define XVSRA_D(vd, vj, vk) EMIT(type_3R(0b01110100111011011, vk, vj, vd)) +#define XVROTR_B(vd, vj, vk) EMIT(type_3R(0b01110100111011100, vk, vj, vd)) +#define XVROTR_H(vd, vj, vk) EMIT(type_3R(0b01110100111011101, vk, vj, vd)) +#define XVROTR_W(vd, vj, vk) EMIT(type_3R(0b01110100111011110, vk, vj, vd)) +#define XVROTR_D(vd, vj, vk) EMIT(type_3R(0b01110100111011111, vk, vj, vd)) +#define XVSRLR_B(vd, vj, vk) EMIT(type_3R(0b01110100111100000, vk, vj, vd)) +#define XVSRLR_H(vd, vj, vk) EMIT(type_3R(0b01110100111100001, vk, vj, vd)) +#define XVSRLR_W(vd, vj, vk) EMIT(type_3R(0b01110100111100010, vk, vj, vd)) +#define XVSRLR_D(vd, vj, vk) EMIT(type_3R(0b01110100111100011, vk, vj, vd)) +#define XVSRAR_B(vd, vj, vk) EMIT(type_3R(0b01110100111100100, vk, vj, vd)) +#define XVSRAR_H(vd, vj, vk) EMIT(type_3R(0b01110100111100101, vk, vj, vd)) +#define XVSRAR_W(vd, vj, vk) EMIT(type_3R(0b01110100111100110, vk, vj, vd)) +#define XVSRAR_D(vd, vj, vk) EMIT(type_3R(0b01110100111100111, vk, vj, vd)) +#define XVSRLN_B_H(vd, vj, vk) EMIT(type_3R(0b01110100111101001, vk, vj, vd)) +#define XVSRLN_H_W(vd, vj, vk) EMIT(type_3R(0b01110100111101010, vk, vj, vd)) +#define XVSRLN_W_D(vd, vj, vk) EMIT(type_3R(0b01110100111101011, vk, vj, vd)) +#define XVSRAN_B_H(vd, vj, vk) EMIT(type_3R(0b01110100111101101, vk, vj, vd)) +#define XVSRAN_H_W(vd, vj, vk) EMIT(type_3R(0b01110100111101110, vk, vj, vd)) +#define XVSRAN_W_D(vd, vj, vk) EMIT(type_3R(0b01110100111101111, vk, vj, vd)) +#define XVSRLRN_B_H(vd, vj, vk) EMIT(type_3R(0b01110100111110001, vk, vj, vd)) +#define XVSRLRN_H_W(vd, vj, vk) EMIT(type_3R(0b01110100111110010, vk, vj, vd)) +#define XVSRLRN_W_D(vd, vj, vk) EMIT(type_3R(0b01110100111110011, vk, vj, vd)) +#define XVSRARN_B_H(vd, vj, vk) EMIT(type_3R(0b01110100111110101, vk, vj, vd)) +#define XVSRARN_H_W(vd, vj, vk) EMIT(type_3R(0b01110100111110110, vk, vj, vd)) +#define XVSRARN_W_D(vd, vj, vk) EMIT(type_3R(0b01110100111110111, vk, vj, vd)) +#define XVSSRLRN_B_H(vd, vj, vk) EMIT(type_3R(0b01110101000000001, vk, vj, vd)) +#define XVSSRLRN_H_W(vd, vj, vk) EMIT(type_3R(0b01110101000000010, vk, vj, vd)) +#define XVSSRLRN_W_D(vd, vj, vk) EMIT(type_3R(0b01110101000000011, vk, vj, vd)) +#define XVSSRARN_B_H(vd, vj, vk) EMIT(type_3R(0b01110101000000101, vk, vj, vd)) +#define XVSSRARN_H_W(vd, vj, vk) EMIT(type_3R(0b01110101000000110, vk, vj, vd)) +#define XVSSRARN_W_D(vd, vj, vk) EMIT(type_3R(0b01110101000000111, vk, vj, vd)) +#define XVSSRLRN_BU_H(vd, vj, vk) EMIT(type_3R(0b01110101000010001, vk, vj, vd)) +#define XVSSRLRN_HU_W(vd, vj, vk) EMIT(type_3R(0b01110101000010010, vk, vj, vd)) +#define XVSSRLRN_WU_D(vd, vj, vk) EMIT(type_3R(0b01110101000010011, vk, vj, vd)) +#define XVSSRARN_BU_H(vd, vj, vk) EMIT(type_3R(0b01110101000010101, vk, vj, vd)) +#define XVSSRARN_HU_W(vd, vj, vk) EMIT(type_3R(0b01110101000010110, vk, vj, vd)) +#define XVSSRARN_WU_D(vd, vj, vk) EMIT(type_3R(0b01110101000010111, vk, vj, vd)) +#define XVBITCLR_B(vd, vj, vk) EMIT(type_3R(0b01110101000011000, vk, vj, vd)) +#define XVBITCLR_H(vd, vj, vk) EMIT(type_3R(0b01110101000011001, vk, vj, vd)) +#define XVBITCLR_W(vd, vj, vk) EMIT(type_3R(0b01110101000011010, vk, vj, vd)) +#define XVBITCLR_D(vd, vj, vk) EMIT(type_3R(0b01110101000011011, vk, vj, vd)) +#define XVBITSET_B(vd, vj, vk) EMIT(type_3R(0b01110101000011100, vk, vj, vd)) +#define XVBITSET_H(vd, vj, vk) EMIT(type_3R(0b01110101000011101, vk, vj, vd)) +#define XVBITSET_W(vd, vj, vk) EMIT(type_3R(0b01110101000011110, vk, vj, vd)) +#define XVBITSET_D(vd, vj, vk) EMIT(type_3R(0b01110101000011111, vk, vj, vd)) +#define XVBITREV_B(vd, vj, vk) EMIT(type_3R(0b01110101000100000, vk, vj, vd)) +#define XVBITREV_H(vd, vj, vk) EMIT(type_3R(0b01110101000100001, vk, vj, vd)) +#define XVBITREV_W(vd, vj, vk) EMIT(type_3R(0b01110101000100010, vk, vj, vd)) +#define XVBITREV_D(vd, vj, vk) EMIT(type_3R(0b01110101000100011, vk, vj, vd)) +#define XVFRSTP_B(vd, vj, vk) EMIT(type_3R(0b01110101001010110, vk, vj, vd)) +#define XVFRSTP_H(vd, vj, vk) EMIT(type_3R(0b01110101001010111, vk, vj, vd)) +#define XVFADD_S(vd, vj, vk) EMIT(type_3R(0b01110101001100001, vk, vj, vd)) +#define XVFADD_D(vd, vj, vk) EMIT(type_3R(0b01110101001100010, vk, vj, vd)) +#define XVFSUB_S(vd, vj, vk) EMIT(type_3R(0b01110101001100101, vk, vj, vd)) +#define XVFSUB_D(vd, vj, vk) EMIT(type_3R(0b01110101001100110, vk, vj, vd)) +#define XVFMUL_S(vd, vj, vk) EMIT(type_3R(0b01110101001110001, vk, vj, vd)) +#define XVFMUL_D(vd, vj, vk) EMIT(type_3R(0b01110101001110010, vk, vj, vd)) +#define XVFDIV_S(vd, vj, vk) EMIT(type_3R(0b01110101001110101, vk, vj, vd)) +#define XVFDIV_D(vd, vj, vk) EMIT(type_3R(0b01110101001110110, vk, vj, vd)) +#define XVFMAX_S(vd, vj, vk) EMIT(type_3R(0b01110101001111001, vk, vj, vd)) +#define XVFMAX_D(vd, vj, vk) EMIT(type_3R(0b01110101001111010, vk, vj, vd)) +#define XVFMIN_S(vd, vj, vk) EMIT(type_3R(0b01110101001111101, vk, vj, vd)) +#define XVFMIN_D(vd, vj, vk) EMIT(type_3R(0b01110101001111110, vk, vj, vd)) +#define XVFMAXA_S(vd, vj, vk) EMIT(type_3R(0b01110101010000001, vk, vj, vd)) +#define XVFMAXA_D(vd, vj, vk) EMIT(type_3R(0b01110101010000010, vk, vj, vd)) +#define XVFMINA_S(vd, vj, vk) EMIT(type_3R(0b01110101010000101, vk, vj, vd)) +#define XVFMINA_D(vd, vj, vk) EMIT(type_3R(0b01110101010000110, vk, vj, vd)) +#define XVFCVT_H_S(vd, vj, vk) EMIT(type_3R(0b01110101010001100, vk, vj, vd)) +#define XVFCVT_S_D(vd, vj, vk) EMIT(type_3R(0b01110101010001101, vk, vj, vd)) +#define XVFTINTRNE_W_D(vd, vj, vk) EMIT(type_3R(0b01110101010010111, vk, vj, vd)) +#define XVFTINTRZ_W_D(vd, vj, vk) EMIT(type_3R(0b01110101010010110, vk, vj, vd)) +#define XVFTINTRP_W_D(vd, vj, vk) EMIT(type_3R(0b01110101010010101, vk, vj, vd)) +#define XVFTINTRM_W_D(vd, vj, vk) EMIT(type_3R(0b01110101010010100, vk, vj, vd)) +#define XVFTINT_W_D(vd, vj, vk) EMIT(type_3R(0b01110101010010011, vk, vj, vd)) +#define XVFFINT_S_L(vd, vj, vk) EMIT(type_3R(0b01110101010010000, vk, vj, vd)) +#define XVSEQ_B(vd, vj, vk) EMIT(type_3R(0b01110100000000000, vk, vj, vd)) +#define XVSEQ_H(vd, vj, vk) EMIT(type_3R(0b01110100000000001, vk, vj, vd)) +#define XVSEQ_W(vd, vj, vk) EMIT(type_3R(0b01110100000000010, vk, vj, vd)) +#define XVSEQ_D(vd, vj, vk) EMIT(type_3R(0b01110100000000011, vk, vj, vd)) +#define XVSLE_B(vd, vj, vk) EMIT(type_3R(0b01110100000000100, vk, vj, vd)) +#define XVSLE_H(vd, vj, vk) EMIT(type_3R(0b01110100000000101, vk, vj, vd)) +#define XVSLE_W(vd, vj, vk) EMIT(type_3R(0b01110100000000110, vk, vj, vd)) +#define XVSLE_D(vd, vj, vk) EMIT(type_3R(0b01110100000000111, vk, vj, vd)) +#define XVSLE_BU(vd, vj, vk) EMIT(type_3R(0b01110100000001000, vk, vj, vd)) +#define XVSLE_HU(vd, vj, vk) EMIT(type_3R(0b01110100000001001, vk, vj, vd)) +#define XVSLE_WU(vd, vj, vk) EMIT(type_3R(0b01110100000001010, vk, vj, vd)) +#define XVSLE_DU(vd, vj, vk) EMIT(type_3R(0b01110100000001011, vk, vj, vd)) +#define XVSLT_B(vd, vj, vk) EMIT(type_3R(0b01110100000001100, vk, vj, vd)) +#define XVSLT_H(vd, vj, vk) EMIT(type_3R(0b01110100000001101, vk, vj, vd)) +#define XVSLT_W(vd, vj, vk) EMIT(type_3R(0b01110100000001110, vk, vj, vd)) +#define XVSLT_D(vd, vj, vk) EMIT(type_3R(0b01110100000001111, vk, vj, vd)) +#define XVSLT_BU(vd, vj, vk) EMIT(type_3R(0b01110100000010000, vk, vj, vd)) +#define XVSLT_HU(vd, vj, vk) EMIT(type_3R(0b01110100000010001, vk, vj, vd)) +#define XVSLT_WU(vd, vj, vk) EMIT(type_3R(0b01110100000010010, vk, vj, vd)) +#define XVSLT_DU(vd, vj, vk) EMIT(type_3R(0b01110100000010011, vk, vj, vd)) +#define XVPACKEV_B(vd, vj, vk) EMIT(type_3R(0b01110101000101100, vk, vj, vd)) +#define XVPACKEV_H(vd, vj, vk) EMIT(type_3R(0b01110101000101101, vk, vj, vd)) +#define XVPACKEV_W(vd, vj, vk) EMIT(type_3R(0b01110101000101110, vk, vj, vd)) +#define XVPACKEV_D(vd, vj, vk) EMIT(type_3R(0b01110101000101111, vk, vj, vd)) +#define XVPACKOD_B(vd, vj, vk) EMIT(type_3R(0b01110101000110000, vk, vj, vd)) +#define XVPACKOD_H(vd, vj, vk) EMIT(type_3R(0b01110101000110001, vk, vj, vd)) +#define XVPACKOD_W(vd, vj, vk) EMIT(type_3R(0b01110101000110010, vk, vj, vd)) +#define XVPACKOD_D(vd, vj, vk) EMIT(type_3R(0b01110101000110011, vk, vj, vd)) +#define XVPICKEV_B(vd, vj, vk) EMIT(type_3R(0b01110101000111100, vk, vj, vd)) +#define XVPICKEV_H(vd, vj, vk) EMIT(type_3R(0b01110101000111101, vk, vj, vd)) +#define XVPICKEV_W(vd, vj, vk) EMIT(type_3R(0b01110101000111110, vk, vj, vd)) +#define XVPICKEV_D(vd, vj, vk) EMIT(type_3R(0b01110101000111111, vk, vj, vd)) +#define XVPICKOD_B(vd, vj, vk) EMIT(type_3R(0b01110101001000000, vk, vj, vd)) +#define XVPICKOD_H(vd, vj, vk) EMIT(type_3R(0b01110101001000001, vk, vj, vd)) +#define XVPICKOD_W(vd, vj, vk) EMIT(type_3R(0b01110101001000010, vk, vj, vd)) +#define XVPICKOD_D(vd, vj, vk) EMIT(type_3R(0b01110101001000011, vk, vj, vd)) +#define XVILVL_B(vd, vj, vk) EMIT(type_3R(0b01110101000110100, vk, vj, vd)) +#define XVILVL_H(vd, vj, vk) EMIT(type_3R(0b01110101000110101, vk, vj, vd)) +#define XVILVL_W(vd, vj, vk) EMIT(type_3R(0b01110101000110110, vk, vj, vd)) +#define XVILVL_D(vd, vj, vk) EMIT(type_3R(0b01110101000110111, vk, vj, vd)) +#define XVILVH_B(vd, vj, vk) EMIT(type_3R(0b01110101000111000, vk, vj, vd)) +#define XVILVH_H(vd, vj, vk) EMIT(type_3R(0b01110101000111001, vk, vj, vd)) +#define XVILVH_W(vd, vj, vk) EMIT(type_3R(0b01110101000111010, vk, vj, vd)) +#define XVILVH_D(vd, vj, vk) EMIT(type_3R(0b01110101000111011, vk, vj, vd)) +#define XVSHUF_H(vd, vj, vk) EMIT(type_3R(0b01110101011110101, vk, vj, vd)) +#define XVSHUF_W(vd, vj, vk) EMIT(type_3R(0b01110101011110110, vk, vj, vd)) +#define XVSHUF_D(vd, vj, vk) EMIT(type_3R(0b01110101011110111, vk, vj, vd)) +#define XVPERM_W(vd, vj, vk) EMIT(type_3R(0b01110101011111010, vk, vj, vd)) + //////////////////////////////////////////////////////////////////////////////// -// LBT extension instructions +// (undocumented) LBT extension instructions /* 5 new registers: LBT0 LBT1 LBT2 LBT3: scratch registers dedicated for the LBT extension. |