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| author | ptitSeb <sebastien.chev@gmail.com> | 2025-07-16 18:52:51 +0200 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2025-07-16 18:52:51 +0200 |
| commit | 609ff66c2cc8d29a983f49f62227c215e0736161 (patch) | |
| tree | 754eea6598e119c79872457a9634ceec72244d9b /src | |
| parent | 1a4bfc2feb910b20d2cc22d28dfb1dfe8d186593 (diff) | |
| download | box64-609ff66c2cc8d29a983f49f62227c215e0736161.tar.gz box64-609ff66c2cc8d29a983f49f62227c215e0736161.zip | |
[ARM64_DYNAREC] Small optim on (V/F)COMI(SS/SD) opcodes
Diffstat (limited to 'src')
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_0f.c | 4 | ||||
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_660f.c | 4 | ||||
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_6664.c | 4 | ||||
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_67.c | 4 | ||||
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_avx_0f.c | 4 | ||||
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_avx_66_0f.c | 4 | ||||
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_db.c | 20 | ||||
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_df.c | 24 | ||||
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_helper.h | 8 |
9 files changed, 48 insertions, 28 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_0f.c b/src/dynarec/arm64/dynarec_arm64_0f.c index cb66b319..9d9ebda4 100644 --- a/src/dynarec/arm64/dynarec_arm64_0f.c +++ b/src/dynarec/arm64/dynarec_arm64_0f.c @@ -536,7 +536,9 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop = F8; GETGX(v0, 0); GETEXSS(s0, 0, 0); - FCMPS(v0, s0); + IFX(X_CF|X_PF|X_ZF) { + FCMPS(v0, s0); + } FCOMI(x1, x2); break; case 0x30: diff --git a/src/dynarec/arm64/dynarec_arm64_660f.c b/src/dynarec/arm64/dynarec_arm64_660f.c index cb396e0e..0c3a02cb 100644 --- a/src/dynarec/arm64/dynarec_arm64_660f.c +++ b/src/dynarec/arm64/dynarec_arm64_660f.c @@ -305,7 +305,9 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n nextop = F8; GETGX(v0, 0); GETEXSD(q0, 0, 0); - FCMPD(v0, q0); + IFX(X_CF|X_PF|X_ZF) { + FCMPD(v0, q0); + } FCOMI(x1, x2); break; diff --git a/src/dynarec/arm64/dynarec_arm64_6664.c b/src/dynarec/arm64/dynarec_arm64_6664.c index bf754f63..e788124d 100644 --- a/src/dynarec/arm64/dynarec_arm64_6664.c +++ b/src/dynarec/arm64/dynarec_arm64_6664.c @@ -64,7 +64,9 @@ uintptr_t dynarec64_6664(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n v1 = fpu_get_scratch(dyn, ninst); VLD64(v1, ed, fixedaddress); } - FCMPD(v0, v1); + IFX(X_CF|X_PF|X_ZF) { + FCMPD(v0, v1); + } FCOMI(x1, x2); break; diff --git a/src/dynarec/arm64/dynarec_arm64_67.c b/src/dynarec/arm64/dynarec_arm64_67.c index 46fa86c6..c0eaf181 100644 --- a/src/dynarec/arm64/dynarec_arm64_67.c +++ b/src/dynarec/arm64/dynarec_arm64_67.c @@ -230,7 +230,9 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin addr = geted32(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0); VLD32(s0, ed, fixedaddress); } - FCMPS(v0, s0); + IFX(X_CF|X_PF|X_ZF) { + FCMPS(v0, s0); + } FCOMI(x1, x2); break; default: diff --git a/src/dynarec/arm64/dynarec_arm64_avx_0f.c b/src/dynarec/arm64/dynarec_arm64_avx_0f.c index 668ece1d..47ad8949 100644 --- a/src/dynarec/arm64/dynarec_arm64_avx_0f.c +++ b/src/dynarec/arm64/dynarec_arm64_avx_0f.c @@ -294,7 +294,9 @@ uintptr_t dynarec64_AVX_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nextop = F8; GETGX(v0, 0); GETEXSS(s0, 0, 0); - FCMPS(v0, s0); + IFX(X_CF|X_PF|X_ZF) { + FCMPS(v0, s0); + } FCOMI(x1, x2); break; diff --git a/src/dynarec/arm64/dynarec_arm64_avx_66_0f.c b/src/dynarec/arm64/dynarec_arm64_avx_66_0f.c index b5b4736d..cbadcfaa 100644 --- a/src/dynarec/arm64/dynarec_arm64_avx_66_0f.c +++ b/src/dynarec/arm64/dynarec_arm64_avx_66_0f.c @@ -268,7 +268,9 @@ uintptr_t dynarec64_AVX_66_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, nextop = F8; GETGX(v0, 0); GETEXSD(q0, 0, 0); - FCMPD(v0, q0); + IFX(X_CF|X_PF|X_ZF) { + FCMPD(v0, q0); + } FCOMI(x1, x2); break; diff --git a/src/dynarec/arm64/dynarec_arm64_db.c b/src/dynarec/arm64/dynarec_arm64_db.c index 2d98f0cb..b4b1e2c0 100644 --- a/src/dynarec/arm64/dynarec_arm64_db.c +++ b/src/dynarec/arm64/dynarec_arm64_db.c @@ -148,10 +148,12 @@ uintptr_t dynarec64_DB(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin SETFLAGS(X_ALL, SF_SET); v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop&7)); v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7, X87_COMBINE(0, nextop&7)); - if(ST_IS_F(0)) { - FCMPS(v1, v2); - } else { - FCMPD(v1, v2); + IFX(X_CF|X_PF|X_ZF) { + if(ST_IS_F(0)) { + FCMPS(v1, v2); + } else { + FCMPD(v1, v2); + } } FCOMI(x1, x2); break; @@ -167,10 +169,12 @@ uintptr_t dynarec64_DB(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin SETFLAGS(X_ALL, SF_SET); v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop&7)); v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7, X87_COMBINE(0, nextop&7)); - if(ST_IS_F(0)) { - FCMPS(v1, v2); - } else { - FCMPD(v1, v2); + IFX(X_CF|X_PF|X_ZF) { + if(ST_IS_F(0)) { + FCMPS(v1, v2); + } else { + FCMPD(v1, v2); + } } FCOMI(x1, x2); break; diff --git a/src/dynarec/arm64/dynarec_arm64_df.c b/src/dynarec/arm64/dynarec_arm64_df.c index e0e06059..25f34e77 100644 --- a/src/dynarec/arm64/dynarec_arm64_df.c +++ b/src/dynarec/arm64/dynarec_arm64_df.c @@ -101,11 +101,13 @@ uintptr_t dynarec64_DF(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin SETFLAGS(X_ALL, SF_SET); v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop&7)); v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7, X87_COMBINE(0, nextop&7)); - if(ST_IS_F(0)) - { - FCMPS(v1, v2); - } else { - FCMPD(v1, v2); + IFX(X_CF|X_PF|X_ZF) { + if(ST_IS_F(0)) + { + FCMPS(v1, v2); + } else { + FCMPD(v1, v2); + } } FCOMI(x1, x2); X87_POP_OR_FAIL(dyn, ninst, x3); @@ -122,11 +124,13 @@ uintptr_t dynarec64_DF(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin SETFLAGS(X_ALL, SF_SET); v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop&7)); v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7, X87_COMBINE(0, nextop&7)); - if(ST_IS_F(0)) - { - FCMPS(v1, v2); - } else { - FCMPD(v1, v2); + IFX(X_CF|X_PF|X_ZF) { + if(ST_IS_F(0)) + { + FCMPS(v1, v2); + } else { + FCMPD(v1, v2); + } } FCOMI(x1, x2); X87_POP_OR_FAIL(dyn, ninst, x3); diff --git a/src/dynarec/arm64/dynarec_arm64_helper.h b/src/dynarec/arm64/dynarec_arm64_helper.h index 266f988c..040031fc 100644 --- a/src/dynarec/arm64/dynarec_arm64_helper.h +++ b/src/dynarec/arm64/dynarec_arm64_helper.h @@ -962,19 +962,19 @@ // Generate FCOMI with s1 and s2 scratch regs (the VCMP is already done) #define FCOMI(s1, s2) \ - IFX(X_OF|X_AF|X_SF|X_PEND) { \ + IFX(X_OF|X_AF|X_SF) { \ MOV32w(s2, 0b100011010101); \ BICw_REG(xFlags, xFlags, s2); \ - IFX(X_CF|X_PF|X_ZF|X_PEND) { \ + IFX(X_CF|X_PF|X_ZF) { \ MOV32w(s2, 0b01000101); \ } \ } else { \ - IFX(X_CF|X_PF|X_ZF|X_PEND) { \ + IFX(X_CF|X_PF|X_ZF) { \ MOV32w(s2, 0b01000101); \ BICw_REG(xFlags, xFlags, s2); \ } \ } \ - IFX(X_CF|X_PF|X_ZF|X_PEND) { \ + IFX(X_CF|X_PF|X_ZF) { \ CSETw(s1, cMI); /* 1 if less than, 0 else */ \ /*s2 already set */ /* unordered */ \ CSELw(s1, s2, s1, cVS); \ |