[RV64_DYNAREC] Fixed 66 0F C2 CMPPD opcode for scalar and more (#1975)

* [RV64_DYNAREC] Fixed 66 0F C2 CMPPD opcode for scalar

* more minor fixes

5 files changed, 10 insertions, 10 deletions

diff --git a/src/dynarec/la64/dynarec_la64_f20f.c b/src/dynarec/la64/dynarec_la64_f20f.c
index ee68cda5..034e33be 100644
--- a/src/dynarec/la64/dynarec_la64_f20f.c
+++ b/src/dynarec/la64/dynarec_la64_f20f.c
@@ -129,7 +129,7 @@ uintptr_t dynarec64_F20F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int
             if (!rex.w) ZEROUP(gd);
             if (!box64_dynarec_fastround) {
                 MOVFCSR2GR(x5, FCSR2); // get back FPSR to check
-                MOV32w(x3, (1 << FR_V));
+                MOV32w(x3, (1 << FR_V) | (1 << FR_O));
                 AND(x5, x5, x3);
                 CBZ_NEXT(x5);
                 if (rex.w) {
@@ -160,7 +160,7 @@ uintptr_t dynarec64_F20F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int
             x87_restoreround(dyn, ninst, u8);
             if (!box64_dynarec_fastround) {
                 MOVFCSR2GR(x5, FCSR2); // get back FPSR to check
-                MOV32w(x3, (1 << FR_V)); 
+                MOV32w(x3, (1 << FR_V) | (1 << FR_O));
                 AND(x5, x5, x3);
                 CBZ_NEXT(x5);
                 if (rex.w) {
diff --git a/src/dynarec/la64/dynarec_la64_f30f.c b/src/dynarec/la64/dynarec_la64_f30f.c
index 4a8cd4e0..f0cfaf76 100644
--- a/src/dynarec/la64/dynarec_la64_f30f.c
+++ b/src/dynarec/la64/dynarec_la64_f30f.c
@@ -118,7 +118,7 @@ uintptr_t dynarec64_F30F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int
             }
             if (!box64_dynarec_fastround) {
                 MOVFCSR2GR(x5, FCSR2); // get back FPSR to check
-                MOV32w(x3, (1 << FR_V));
+                MOV32w(x3, (1 << FR_V) | (1 << FR_O));
                 AND(x5, x5, x3);
                 CBZ_NEXT(x5);
                 if (rex.w) {
@@ -151,7 +151,7 @@ uintptr_t dynarec64_F30F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int
             x87_restoreround(dyn, ninst, u8);
             if (!box64_dynarec_fastround) {
                 MOVFCSR2GR(x5, FCSR2); // get back FPSR to check
-                MOV32w(x3, (1 << FR_V));
+                MOV32w(x3, (1 << FR_V) | (1 << FR_O));
                 AND(x5, x5, x3);
                 CBZ_NEXT(x5);
                 if (rex.w) {
diff --git a/src/dynarec/rv64/dynarec_rv64_660f.c b/src/dynarec/rv64/dynarec_rv64_660f.c
index e6a4d524..9450f22d 100644
--- a/src/dynarec/rv64/dynarec_rv64_660f.c
+++ b/src/dynarec/rv64/dynarec_rv64_660f.c
@@ -1470,11 +1470,11 @@ uintptr_t dynarec64_660F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int
 
                     switch (u8 & 7) {
                         case 1:
-                            BEQ_MARK(x3, xZR);
+                            BEQ(x3, xZR, 8); // MARK
                             FLTD(x3, d0, d1);
                             break; // Less than
                         case 2:
-                            BEQ_MARK(x3, xZR);
+                            BEQ(x3, xZR, 8); // MARK
                             FLED(x3, d0, d1);
                             break;                      // Less or equal
                         case 3: XORI(x3, x3, 1); break; // NaN
diff --git a/src/dynarec/rv64/dynarec_rv64_f20f.c b/src/dynarec/rv64/dynarec_rv64_f20f.c
index ebb58484..04ca2c06 100644
--- a/src/dynarec/rv64/dynarec_rv64_f20f.c
+++ b/src/dynarec/rv64/dynarec_rv64_f20f.c
@@ -111,7 +111,7 @@ uintptr_t dynarec64_F20F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int
             if (!rex.w) ZEROUP(gd);
             if(!box64_dynarec_fastround) {
                 FRFLAGS(x5); // get back FPSR to check the IOC bit
-                ANDI(x5, x5, (1 << FR_NV));
+                ANDI(x5, x5, (1 << FR_NV) | (1 << FR_OF));
                 CBZ_NEXT(x5);
                 if(rex.w) {
                     MOV64x(gd, 0x8000000000000000LL);
@@ -134,7 +134,7 @@ uintptr_t dynarec64_F20F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int
             x87_restoreround(dyn, ninst, u8);
             if(!box64_dynarec_fastround) {
                 FRFLAGS(x5);   // get back FPSR to check the IOC bit
-                ANDI(x5, x5, (1 << FR_NV));
+                ANDI(x5, x5, (1 << FR_NV) | (1 << FR_OF));
                 CBZ_NEXT(x5);
                 if(rex.w) {
                     MOV64x(gd, 0x8000000000000000LL);
diff --git a/src/dynarec/rv64/dynarec_rv64_f20f_vector.c b/src/dynarec/rv64/dynarec_rv64_f20f_vector.c
index ce46c0e0..8c5b5ffa 100644
--- a/src/dynarec/rv64/dynarec_rv64_f20f_vector.c
+++ b/src/dynarec/rv64/dynarec_rv64_f20f_vector.c
@@ -142,7 +142,7 @@ uintptr_t dynarec64_F20F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t i
                 FCVTLDxw(gd, v0, RD_RTZ);
                 if (!rex.w) ZEROUP(gd);
                 FRFLAGS(x5); // get back FPSR to check the IOC bit
-                ANDI(x5, x5, (1 << FR_NV));
+                ANDI(x5, x5, (1 << FR_NV) | (1 << FR_OF));
                 CBZ_NEXT(x5);
                 if (rex.w) {
                     MOV64x(gd, 0x8000000000000000LL);
@@ -179,7 +179,7 @@ uintptr_t dynarec64_F20F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t i
                 if (!rex.w) ZEROUP(gd);
                 x87_restoreround(dyn, ninst, u8);
                 FRFLAGS(x5); // get back FPSR to check the IOC bit
-                ANDI(x5, x5, (1 << FR_NV));
+                ANDI(x5, x5, (1 << FR_NV) | (1 << FR_OF));
                 CBZ_NEXT(x5);
                 if (rex.w) {
                     MOV64x(gd, 0x8000000000000000LL);