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| author | ptitSeb <sebastien.chev@gmail.com> | 2023-10-11 10:04:30 +0200 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2023-10-11 10:04:30 +0200 |
| commit | 6ac200f5978d7d14c97eb2d993393ee28ee93b89 (patch) | |
| tree | e7bc33b3a4142e336bcac97ceae25f7588f0f085 /src | |
| parent | d7f635586d89c9e3641d7bdcd8880ac8e4f09915 (diff) | |
| download | box64-6ac200f5978d7d14c97eb2d993393ee28ee93b89.tar.gz box64-6ac200f5978d7d14c97eb2d993393ee28ee93b89.zip | |
Small change on cpuid feature flags for leaf 0x80000001
Diffstat (limited to 'src')
| -rw-r--r-- | src/tools/my_cpuid.c | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/src/tools/my_cpuid.c b/src/tools/my_cpuid.c index 5a1fa30d..5106a543 100644 --- a/src/tools/my_cpuid.c +++ b/src/tools/my_cpuid.c @@ -299,9 +299,14 @@ void my_cpuid(x64emu_t* emu, uint32_t tmp32u) R_EAX = 0; // reserved R_EBX = 0; // reserved R_ECX = (1<<5) | (1<<8); // LZCNT | PREFETCHW - R_EDX = 1 | (1<<29); // x87 FPU? bit 29 is 64bits available - //AMD flags? - //R_EDX = 1 | (1<<8) | (1<<11) | (1<<15) | (1<<23) | (1<<29); // fpu+cmov+cx8+syscall+mmx+lm (mmxext=22, 3dnow=31, 3dnowext=30) + R_EDX = 1 // x87 FPU + | (1<<8) // cx8: cmpxchg8b opcode + | (1<<11) // syscall + | (1<<15) // cmov: FCMOV opcodes + | (1<<23) // mmx: MMX available + | (1<<24) // fxsave + | (1<<27) // rdtscp + | (1<<29); // long mode 64bits available break; case 0x80000002: // Brand part 1 (branding signature) R_EAX = ((uint32_t*)branding)[0]; |