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| author | ptitSeb <sebastien.chev@gmail.com> | 2025-04-23 18:21:07 +0200 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2025-04-23 18:21:15 +0200 |
| commit | 6f0db360a430c7c8fc8526b79166501e2337c5d7 (patch) | |
| tree | 8d4546dc98d7150aa16d3930592988f9cbc8bc69 /src | |
| parent | 223de50ec94de8b0bf0bce39fcd235c74992d135 (diff) | |
| download | box64-6f0db360a430c7c8fc8526b79166501e2337c5d7.tar.gz box64-6f0db360a430c7c8fc8526b79166501e2337c5d7.zip | |
[ARM64_DYNAREC] Few fixes and small cosmetic changes to some partial (V)MOV opcodes
Diffstat (limited to 'src')
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_0f.c | 16 | ||||
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_64.c | 2 | ||||
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_660f.c | 4 | ||||
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_6664.c | 6 | ||||
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_avx_0f.c | 17 | ||||
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_avx_66_0f.c | 19 | ||||
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_avx_f3_0f.c | 19 | ||||
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_f30f.c | 11 |
8 files changed, 36 insertions, 58 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_0f.c b/src/dynarec/arm64/dynarec_arm64_0f.c index 7071d5d2..4cc1dffd 100644 --- a/src/dynarec/arm64/dynarec_arm64_0f.c +++ b/src/dynarec/arm64/dynarec_arm64_0f.c @@ -279,12 +279,12 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin case 0x12: nextop = F8; if(MODREG) { - INST_NAME("MOVHLPS Gx,Ex"); + INST_NAME("MOVHLPS Gx, Ex"); GETGX(v0, 1); v1 = sse_get_reg(dyn, ninst, x1, (nextop&7)+(rex.b<<3), 0); VMOVeD(v0, 0, v1, 1); } else { - INST_NAME("MOVLPS Gx,Ex"); + INST_NAME("MOVLPS Gx, Ex"); GETGX(v0, 1); SMREAD(); addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0); @@ -293,11 +293,11 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 0x13: nextop = F8; - INST_NAME("MOVLPS Ex,Gx"); + INST_NAME("MOVLPS Ex, Gx"); GETGX(v0, 0); if(MODREG) { - v1 = sse_get_reg(dyn, ninst, x1, (nextop&7)+(rex.b<<3), 1); - VMOVeD(v1, 0, v0, 0); + DEFAULT; + return addr; } else { addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0); VST1_64(v0, 0, ed); // better to use VST1 than VSTR_64, to avoid NEON->VFPU transfert I assume @@ -321,12 +321,12 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin case 0x16: nextop = F8; if(MODREG) { - INST_NAME("MOVLHPS Gx,Ex"); + INST_NAME("MOVLHPS Gx, Ex"); GETGX(v0, 1); v1 = sse_get_reg(dyn, ninst, x1, (nextop&7)+(rex.b<<3), 0); VMOVeD(v0, 1, v1, 0); } else { - INST_NAME("MOVHPS Gx,Ex"); + INST_NAME("MOVHPS Gx, Ex"); SMREAD(); GETGX(v0, 1); addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0); @@ -335,7 +335,7 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 0x17: nextop = F8; - INST_NAME("MOVHPS Ex,Gx"); + INST_NAME("MOVHPS Ex, Gx"); GETGX(v0, 0); if(MODREG) { v1 = sse_get_reg(dyn, ninst, x1, (nextop&7)+(rex.b<<3), 1); diff --git a/src/dynarec/arm64/dynarec_arm64_64.c b/src/dynarec/arm64/dynarec_arm64_64.c index 616d9d00..f5c46cd2 100644 --- a/src/dynarec/arm64/dynarec_arm64_64.c +++ b/src/dynarec/arm64/dynarec_arm64_64.c @@ -264,7 +264,7 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin SMREAD(); addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<4, 15, rex, NULL, 0, 0); ADDz_REG(x4, x4, ed); - VLD128(v0, ed, fixedaddress); + VLD128(v0, x4, fixedaddress); } break; default: diff --git a/src/dynarec/arm64/dynarec_arm64_660f.c b/src/dynarec/arm64/dynarec_arm64_660f.c index 6b35db00..88fbe3ac 100644 --- a/src/dynarec/arm64/dynarec_arm64_660f.c +++ b/src/dynarec/arm64/dynarec_arm64_660f.c @@ -87,12 +87,12 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n case 0x12: INST_NAME("MOVLPD Gx, Eq"); nextop = F8; - GETGX(v0, 1); if(MODREG) { // access register instead of memory is bad opcode! DEFAULT; return addr; } + GETGX(v0, 1); SMREAD(); addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0); VLD1_64(v0, 0, ed); @@ -100,12 +100,12 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n case 0x13: INST_NAME("MOVLPD Eq, Gx"); nextop = F8; - GETGX(v0, 0); if(MODREG) { // access register instead of memory is bad opcode! DEFAULT; return addr; } + GETGX(v0, 0); addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0); VST1_64(v0, 0, ed); SMWRITE2(); diff --git a/src/dynarec/arm64/dynarec_arm64_6664.c b/src/dynarec/arm64/dynarec_arm64_6664.c index 0b5ff101..465e7fd6 100644 --- a/src/dynarec/arm64/dynarec_arm64_6664.c +++ b/src/dynarec/arm64/dynarec_arm64_6664.c @@ -81,8 +81,7 @@ uintptr_t dynarec64_6664(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<4, 15, rex, NULL, 0, 0); SMREAD(); ADDz_REG(x4, x4, ed); - ed = x4; - VLD128(v0, ed, fixedaddress); + VLD128(v0, x4, fixedaddress); } break; @@ -97,8 +96,7 @@ uintptr_t dynarec64_6664(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n grab_segdata(dyn, addr, ninst, x4, seg, (MODREG)); addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<4, 15, rex, NULL, 0, 0); ADDz_REG(x4, x4, ed); - ed = x4; - VST128(v0, ed, fixedaddress); + VST128(v0, x4, fixedaddress); SMWRITE2(); } break; diff --git a/src/dynarec/arm64/dynarec_arm64_avx_0f.c b/src/dynarec/arm64/dynarec_arm64_avx_0f.c index 4deb01a9..e37a9221 100644 --- a/src/dynarec/arm64/dynarec_arm64_avx_0f.c +++ b/src/dynarec/arm64/dynarec_arm64_avx_0f.c @@ -141,17 +141,14 @@ uintptr_t dynarec64_AVX_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int break; case 0x13: nextop = F8; - INST_NAME("VMOVLPS Ex, Vx, Gx"); + INST_NAME("VMOVLPS Ex, Gx"); GETGX(v0, 0); - GETVX(v2, 0); - if(v1!=v2) - VMOVQ(v0, v2); if(MODREG) { - v1 = sse_get_reg(dyn, ninst, x1, (nextop&7)+(rex.b<<3), 1); - if(v0!=v1) VMOVeD(v1, 0, v0, 0); + DEFAULT; + return addr; } else { addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0); - VST1_64(v0, 0, ed); // better to use VST1 than VSTR_64, to avoid NEON->VFPU transfert I assume + VST1_64(v0, 0, ed); SMWRITE2(); } break; @@ -199,12 +196,14 @@ uintptr_t dynarec64_AVX_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int YMM0(gd); break; case 0x17: - INST_NAME("VMOVHPS Ex,Gx"); + INST_NAME("VMOVHPS Ex, Gx"); nextop = F8; GETGX(v0, 0); if(MODREG) { - v1 = sse_get_reg(dyn, ninst, x1, (nextop&7)+(rex.b<<3), 1); + ed = (nextop&7)+(rex.b<<3); + v1 = sse_get_reg(dyn, ninst, x1, ed, 1); VMOVeD(v1, 0, v0, 1); + YMM0(ed); } else { addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0); VST1_64(v0, 1, ed); diff --git a/src/dynarec/arm64/dynarec_arm64_avx_66_0f.c b/src/dynarec/arm64/dynarec_arm64_avx_66_0f.c index 31da91af..520adbf2 100644 --- a/src/dynarec/arm64/dynarec_arm64_avx_66_0f.c +++ b/src/dynarec/arm64/dynarec_arm64_avx_66_0f.c @@ -121,14 +121,11 @@ uintptr_t dynarec64_AVX_66_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, return addr; } GETGX_empty_VX(v0, v2); - if(v0==v2) { - q0 = fpu_get_scratch(dyn, ninst); - VMOVQ(q0, v2); - } SMREAD(); addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0); VLD1_64(v0, 0, ed); - VMOVeD(v0, 1, (v0==v2)?q0:v2, 1); + if(v0!=v2) + VMOVeD(v0, 1, v2, 1); YMM0(gd); break; case 0x13: @@ -171,25 +168,22 @@ uintptr_t dynarec64_AVX_66_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, return addr; } GETGX_empty_VX(v0, v2); - if(v0==v2) { - q0 = fpu_get_scratch(dyn, ninst); - VMOVQ(q0, v2); - } SMREAD(); addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0); VLD1_64(v0, 1, ed); - VMOVeD(v0, 0, (v0==v2)?q0:v2, 0); + if(v0!=v2) + VMOVeD(v0, 0, v2, 0); YMM0(gd); break; case 0x17: INST_NAME("VMOVHPD Eq, Gx"); nextop = F8; - GETGX(v0, 0); if(MODREG) { // access register instead of memory is bad opcode! DEFAULT; return addr; } + GETGX(v0, 0); addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0); VST1_64(v0, 1, ed); SMWRITE2(); @@ -788,8 +782,7 @@ uintptr_t dynarec64_AVX_66_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, INST_NAME("VMOVDQA Gx, Ex"); nextop = F8; if(MODREG) { - v1 = sse_get_reg(dyn, ninst, x1, (nextop&7)+(rex.b<<3), 0); - GETGX_empty(v0); + GETGX_empty_EX(v0, v1, 0); VMOVQ(v0, v1); if(vex.l) { GETGY_empty_EY(v0, v1); diff --git a/src/dynarec/arm64/dynarec_arm64_avx_f3_0f.c b/src/dynarec/arm64/dynarec_arm64_avx_f3_0f.c index 181170c9..36ff5f76 100644 --- a/src/dynarec/arm64/dynarec_arm64_avx_f3_0f.c +++ b/src/dynarec/arm64/dynarec_arm64_avx_f3_0f.c @@ -438,13 +438,10 @@ uintptr_t dynarec64_AVX_F3_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, INST_NAME("VMOVDQU Gx, Ex");// no alignment constraint on NEON here, so same as MOVDQA nextop = F8; if(MODREG) { - ed = (nextop&7)+(rex.b<<3); - v1 = sse_get_reg(dyn, ninst, x1, ed, 0); - GETGX_empty(v0); + GETGX_empty_EX(v0, v1, 0); VMOVQ(v0, v1); if(vex.l) { - v1 = ymm_get_reg(dyn, ninst, x1, ed, 0, gd, -1, -1); - GETGY_empty(v0, ed, -1, -1); + GETGY_empty_EY(v0, v1); VMOVQ(v0, v1); } } else { @@ -522,19 +519,15 @@ uintptr_t dynarec64_AVX_F3_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, IF_UNALIGNED(ip) { MESSAGE(LOG_DEBUG, "\tUnaligned path"); addr = geted(dyn, addr, ninst, nextop, &wback, x1, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0); - if(wback!=x1) { - MOVx_REG(x1, wback); - wback = x1; - } for(int i=0; i<16; ++i) { - VST1_8(v0, i, wback); - ADDx_U12(wback, wback, 1); + VST1_8(v0, i, i?x1:wback); + ADDx_U12(x1, i?x1:wback, 1); } if(vex.l) { GETGY(v0, 0, -1, -1, -1); for(int i=0; i<16; ++i) { - VST1_8(v0, i, wback); - ADDx_U12(wback, wback, 1); + VST1_8(v0, i, x1); + ADDx_U12(x1, x1, 1); } } } else { diff --git a/src/dynarec/arm64/dynarec_arm64_f30f.c b/src/dynarec/arm64/dynarec_arm64_f30f.c index a0cf44c9..ec9c0cca 100644 --- a/src/dynarec/arm64/dynarec_arm64_f30f.c +++ b/src/dynarec/arm64/dynarec_arm64_f30f.c @@ -415,8 +415,7 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n INST_NAME("MOVDQU Gx,Ex");// no alignment constraint on NEON here, so same as MOVDQA nextop = F8; if(MODREG) { - v1 = sse_get_reg(dyn, ninst, x1, (nextop&7)+(rex.b<<3), 0); - GETGX_empty(v0); + GETGX_empty_EX(v0, v1, 0); VMOVQ(v0, v1); } else { GETGX_empty(v0); @@ -476,13 +475,9 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n IF_UNALIGNED(ip) { MESSAGE(LOG_DEBUG, "\tUnaligned path"); addr = geted(dyn, addr, ninst, nextop, &wback, x1, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0); - if(wback!=x1) { - MOVx_REG(x1, wback); - wback = x1; - } for(int i=0; i<16; ++i) { - VST1_8(v0, i, wback); - ADDx_U12(wback, wback, 1); + VST1_8(v0, i, i?x1:wback); + ADDx_U12(x1, i?x1:wback, 1); } } else { addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<4, 15, rex, NULL, 0, 0); |