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| author | ptitSeb <sebastien.chev@gmail.com> | 2024-01-05 13:55:17 +0100 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2024-01-05 13:55:17 +0100 |
| commit | 6f6a42642418ea34a77a0648a75957a28b733a1e (patch) | |
| tree | 27c378196fc41d58ae19001bce6267f27ce3b7be /src | |
| parent | 163158cf126a7b774ccb8c0c1e9d94b696b343bb (diff) | |
| download | box64-6f6a42642418ea34a77a0648a75957a28b733a1e.tar.gz box64-6f6a42642418ea34a77a0648a75957a28b733a1e.zip | |
[ARM64_DYNAREC] Attempt to use FRINTTS extension
Diffstat (limited to 'src')
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_db.c | 111 | ||||
| -rw-r--r-- | src/include/debug.h | 1 |
2 files changed, 55 insertions, 57 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_db.c b/src/dynarec/arm64/dynarec_arm64_db.c index f7cb9358..02eb0659 100644 --- a/src/dynarec/arm64/dynarec_arm64_db.c +++ b/src/dynarec/arm64/dynarec_arm64_db.c @@ -199,25 +199,24 @@ uintptr_t dynarec64_DB(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin v1 = x87_get_st(dyn, ninst, x1, x2, 0, NEON_CACHE_ST_D); addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0); s0 = fpu_get_scratch(dyn); - #if 0 - ed = x1; - FRINT32ZD(s0, v1); - FCVTZSwD(ed, s0); - WBACK; - #else - MRS_fpsr(x5); - BFCw(x5, FPSR_IOC, 1); // reset IOC bit - MSR_fpsr(x5); - FRINTZD(s0, v1); - VFCVTZSd(s0, s0); - SQXTN_S_D(s0, s0); - VST32(s0, wback, fixedaddress); - MRS_fpsr(x5); // get back FPSR to check the IOC bit - TBZ_MARK3(x5, FPSR_IOC); - MOV32w(x5, 0x80000000); - STW(x5, wback, fixedaddress); - MARK3; - #endif + if(arm64_frintts) { + FRINT32ZD(s0, v1); + FCVTZSwD(x5, s0); + STW(x5, wback, fixedaddress); + } else { + MRS_fpsr(x5); + BFCw(x5, FPSR_IOC, 1); // reset IOC bit + MSR_fpsr(x5); + FRINTZD(s0, v1); + VFCVTZSd(s0, s0); + SQXTN_S_D(s0, s0); + VST32(s0, wback, fixedaddress); + MRS_fpsr(x5); // get back FPSR to check the IOC bit + TBZ_MARK3(x5, FPSR_IOC); + MOV32w(x5, 0x80000000); + STW(x5, wback, fixedaddress); + MARK3; + } X87_POP_OR_FAIL(dyn, ninst, x3); break; case 2: @@ -226,25 +225,24 @@ uintptr_t dynarec64_DB(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin u8 = x87_setround(dyn, ninst, x1, x2, x4); // x1 have the modified RPSCR reg addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0); s0 = fpu_get_scratch(dyn); - #if 0 - ed = x1; - FRINT32XD(s0, v1); - FCVTZSwD(ed, s0); - WBACK; - #else - MRS_fpsr(x5); - BFCw(x5, FPSR_IOC, 1); // reset IOC bit - MSR_fpsr(x5); - FRINTXD(s0, v1); - VFCVTZSd(s0, s0); - SQXTN_S_D(s0, s0); - VST32(s0, wback, fixedaddress); - MRS_fpsr(x5); // get back FPSR to check the IOC bit - TBZ_MARK3(x5, FPSR_IOC); - MOV32w(x5, 0x80000000); - STW(x5, wback, fixedaddress); - MARK3; - #endif + if(arm64_frintts) { + FRINT32XD(s0, v1); + FCVTZSwD(x5, s0); + STW(x5, wback, fixedaddress); + } else { + MRS_fpsr(x5); + BFCw(x5, FPSR_IOC, 1); // reset IOC bit + MSR_fpsr(x5); + FRINTXD(s0, v1); + VFCVTZSd(s0, s0); + SQXTN_S_D(s0, s0); + VST32(s0, wback, fixedaddress); + MRS_fpsr(x5); // get back FPSR to check the IOC bit + TBZ_MARK3(x5, FPSR_IOC); + MOV32w(x5, 0x80000000); + STW(x5, wback, fixedaddress); + MARK3; + } x87_restoreround(dyn, ninst, u8); break; case 3: @@ -253,25 +251,24 @@ uintptr_t dynarec64_DB(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin u8 = x87_setround(dyn, ninst, x1, x2, x4); // x1 have the modified RPSCR reg addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0); s0 = fpu_get_scratch(dyn); - #if 0 - ed = x1; - FRINT32XD(s0, v1); - FCVTZSwD(ed, s0); - WBACK; - #else - MRS_fpsr(x5); - BFCw(x5, FPSR_IOC, 1); // reset IOC bit - MSR_fpsr(x5); - FRINTXD(s0, v1); - VFCVTZSd(s0, s0); - SQXTN_S_D(s0, s0); - VST32(s0, wback, fixedaddress); - MRS_fpsr(x5); // get back FPSR to check the IOC bit - TBZ_MARK3(x5, FPSR_IOC); - MOV32w(x5, 0x80000000); - STW(x5, wback, fixedaddress); - MARK3; - #endif + if(arm64_frintts) { + FRINT32XD(s0, v1); + FCVTZSwD(x5, s0); + STW(x5, wback, fixedaddress); + } else { + MRS_fpsr(x5); + BFCw(x5, FPSR_IOC, 1); // reset IOC bit + MSR_fpsr(x5); + FRINTXD(s0, v1); + VFCVTZSd(s0, s0); + SQXTN_S_D(s0, s0); + VST32(s0, wback, fixedaddress); + MRS_fpsr(x5); // get back FPSR to check the IOC bit + TBZ_MARK3(x5, FPSR_IOC); + MOV32w(x5, 0x80000000); + STW(x5, wback, fixedaddress); + MARK3; + } x87_restoreround(dyn, ninst, u8); X87_POP_OR_FAIL(dyn, ninst, x3); break; diff --git a/src/include/debug.h b/src/include/debug.h index 08018633..4ab2e80a 100644 --- a/src/include/debug.h +++ b/src/include/debug.h @@ -40,6 +40,7 @@ extern int arm64_sha1; extern int arm64_sha2; extern int arm64_flagm; extern int arm64_flagm2; +extern int arm64_frintts; #elif defined(RV64) extern int rv64_zba; extern int rv64_zbb; |