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| author | Yang Liu <liuyang22@iscas.ac.cn> | 2024-12-05 17:16:22 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-12-05 10:16:22 +0100 |
| commit | 6f7b462d53e5a573318a343cf3db0b322e587855 (patch) | |
| tree | d264c180b5f91e1a1370feecee92c4fc080cb510 /src | |
| parent | 95e5724117dc4522ea0270ae28267ed1f5e84b53 (diff) | |
| download | box64-6f7b462d53e5a573318a343cf3db0b322e587855.tar.gz box64-6f7b462d53e5a573318a343cf3db0b322e587855.zip | |
[DYNAREC] Introduced TO_NAT to ease register mapping changes in future (#2111)
Diffstat (limited to 'src')
67 files changed, 4558 insertions, 3960 deletions
diff --git a/src/dynarec/arm64/arm64_emitter.h b/src/dynarec/arm64/arm64_emitter.h index 0ad26893..c4679462 100644 --- a/src/dynarec/arm64/arm64_emitter.h +++ b/src/dynarec/arm64/arm64_emitter.h @@ -60,6 +60,10 @@ p0-p3 are used to pass scalable predicate arguments to a subroutine and to retur #define xFlags 26 #define xRIP 27 #define xSavedSP 28 + +// convert a x86 register to native according to the register mapping +#define TO_NAT(A) (xRAX + (A)) + // 32bits version #define wEAX xRAX #define wECX xRCX diff --git a/src/dynarec/arm64/dynarec_arm64_00.c b/src/dynarec/arm64/dynarec_arm64_00.c index 450cb1b9..d09d135e 100644 --- a/src/dynarec/arm64/dynarec_arm64_00.c +++ b/src/dynarec/arm64/dynarec_arm64_00.c @@ -617,7 +617,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin case 0x47: INST_NAME("INC Reg (32bits)"); SETFLAGS(X_ALL&~X_CF, SF_SUBSET); - gd = xRAX + (opcode&7); + gd = TO_NAT(opcode & 7); emit_inc32(dyn, ninst, rex, gd, x1, x2); break; case 0x48: @@ -630,7 +630,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin case 0x4F: INST_NAME("DEC Reg (32bits)"); SETFLAGS(X_ALL&~X_CF, SF_SUBSET); - gd = xRAX + (opcode&7); + gd = TO_NAT(opcode & 7); emit_dec32(dyn, ninst, rex, gd, x1, x2); break; case 0x50: @@ -646,7 +646,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin SKIPTEST(x1); dyn->doublepush = 0; } else { - gd = xRAX+(opcode&0x07)+(rex.b<<3); + gd = TO_NAT((opcode & 0x07) + (rex.b << 3)); u32 = PK(0); i32 = 1; rex.rex = 0; @@ -657,7 +657,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin i32++; } if(!box64_dynarec_test && u32>=0x50 && u32<=0x57 && (dyn->size>(ninst+1) && dyn->insts[ninst+1].pred_sz==1) && gd != xRSP) { - u32= xRAX+(u32&0x07)+(rex.b<<3); + u32 = TO_NAT((u32 & 0x07) + (rex.b << 3)); if(u32==xRSP) { PUSH1z(gd); } else { @@ -691,7 +691,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin dyn->doublepop = 0; } else { SMREAD(); - gd = xRAX+(opcode&0x07)+(rex.b<<3); + gd = TO_NAT((opcode & 0x07) + (rex.b << 3)); u32 = PK(0); i32 = 1; rex.rex = 0; @@ -703,7 +703,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin } if(!box64_dynarec_test && (gd!=xRSP) && u32>=0x58 && u32<=0x5f && (dyn->size>(ninst+1) && dyn->insts[ninst+1].pred_sz==1)) { // double pop! - u32= xRAX+(u32&0x07)+(rex.b<<3); + u32 = TO_NAT((u32 & 0x07) + (rex.b << 3)); MESSAGE(LOG_DUMP, "DOUBLE POP\n"); if(gd==u32) { ADDz_U12(xRSP, xRSP, rex.is32bits?0x4:0x8); @@ -771,7 +771,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin GETGD; if(rex.w) { if(MODREG) { // reg <= reg - SXTWx(gd, xRAX+(nextop&7)+(rex.b<<3)); + SXTWx(gd, TO_NAT((nextop & 7) + (rex.b << 3))); } else { // mem <= reg SMREAD(); addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0); @@ -779,7 +779,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin } } else { if(MODREG) { // reg <= reg - MOVw_REG(gd, xRAX+(nextop&7)+(rex.b<<3)); + MOVw_REG(gd, TO_NAT((nextop & 7) + (rex.b << 3))); } else { // mem <= reg SMREAD(); addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0); @@ -1183,12 +1183,12 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin GETGB(x4); if(MODREG) { if(rex.rex) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); eb1 = ed; eb2 = 0; } else { ed = (nextop&7); - eb1 = xRAX+(ed&3); + eb1 = TO_NAT(ed & 3); eb2 = ((ed&4)<<1); } UBFXw(x1, eb1, eb2, 8); @@ -1267,10 +1267,10 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin gd = ((nextop&0x38)>>3)+(rex.r<<3); if(rex.rex) { gb2 = 0; - gb1 = xRAX + gd; + gb1 = TO_NAT(gd); } else { gb2 = ((gd&4)<<1); - gb1 = xRAX+(gd&3); + gb1 = TO_NAT(gd & 3); } if(gb2) { gd = x4; @@ -1281,10 +1281,10 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin if(MODREG) { ed = (nextop&7) + (rex.b<<3); if(rex.rex) { - eb1 = xRAX+ed; + eb1 = TO_NAT(ed); eb2 = 0; } else { - eb1 = xRAX+(ed&3); // Ax, Cx, Dx or Bx + eb1 = TO_NAT(ed & 3); // Ax, Cx, Dx or Bx eb2 = ((ed&4)>>2); // L or H } BFIx(eb1, gd, eb2*8, 8); @@ -1299,7 +1299,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop=F8; GETGD; if(MODREG) { // reg <= reg - MOVxw_REG(xRAX+(nextop&7)+(rex.b<<3), gd); + MOVxw_REG(TO_NAT((nextop & 7) + (rex.b << 3)), gd); } else { // mem <= reg addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff << (2 + rex.w), (1 << (2 + rex.w)) - 1, rex, &lock, 0, 0); STxw(gd, ed, fixedaddress); @@ -1310,21 +1310,21 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin INST_NAME("MOV Gb, Eb"); nextop = F8; if(rex.rex) { - gb1 = gd = xRAX+((nextop&0x38)>>3)+(rex.r<<3); + gb1 = gd = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)); gb2=0; } else { gd = (nextop&0x38)>>3; - gb1 = xRAX+(gd&3); + gb1 = TO_NAT(gd & 3); gb2 = ((gd&4)<<1); } if(MODREG) { if(rex.rex) { - wback = xRAX+(nextop&7)+(rex.b<<3); + wback = TO_NAT((nextop & 7) + (rex.b << 3)); wb2 = 0; } else { wback = (nextop&7); wb2 = (wback>>2); - wback = xRAX+(wback&3); + wback = TO_NAT(wback & 3); } if(wb2) { UBFXw(x4, wback, wb2*8, 8); @@ -1345,7 +1345,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop=F8; GETGD; if(MODREG) { - MOVxw_REG(gd, xRAX+(nextop&7)+(rex.b<<3)); + MOVxw_REG(gd, TO_NAT((nextop & 7) + (rex.b << 3))); } else { addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, &lock, 0, 0); SMREADLOCK(lock); @@ -1357,7 +1357,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop=F8; u8 = (nextop&0x38)>>3; if((nextop&0xC0)==0xC0) { // reg <= seg - gd = xRAX+(nextop&7)+(rex.b<<3); + gd = TO_NAT((nextop & 7) + (rex.b << 3)); LDRH_U12(gd, xEmu, offsetof(x64emu_t, segs[u8])); UXTHw(gd, gd); } else { // mem <= seg @@ -1388,7 +1388,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop = F8; u8 = (nextop&0x38)>>3; if((nextop&0xC0)==0xC0) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); } else { SMREAD(); addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff<<1, 1, rex, NULL, 0, 0); @@ -1403,7 +1403,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop = F8; SMREAD(); if(MODREG) { - POP1z(xRAX+(nextop&7)+(rex.b<<3)); + POP1z(TO_NAT((nextop & 7) + (rex.b << 3))); } else { POP1z(x2); // so this can handle POP [ESP] and maybe some variant too addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, 0); @@ -1425,7 +1425,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin case 0x95: case 0x96: case 0x97: - gd = xRAX+(opcode&0x07)+(rex.b<<3); + gd = TO_NAT((opcode & 0x07) + (rex.b << 3)); if(gd==xRAX) { if (rep == 2) { INST_NAME("PAUSE"); @@ -1871,9 +1871,9 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin u8 = F8; MOV32w(x1, u8); if(rex.rex) - gb1 = xRAX+(opcode&7)+(rex.b<<3); + gb1 = TO_NAT((opcode & 7) + (rex.b << 3)); else - gb1 = xRAX+(opcode&3); + gb1 = TO_NAT(opcode & 3); BFIx(gb1, x1, 0, 8); break; case 0xB4: @@ -1884,10 +1884,10 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin u8 = F8; MOV32w(x1, u8); if(rex.rex) { - gb1 = xRAX+(opcode&7)+(rex.b<<3); + gb1 = TO_NAT((opcode & 7) + (rex.b << 3)); BFIx(gb1, x1, 0, 8); } else { - gb1 = xRAX+(opcode&3); + gb1 = TO_NAT(opcode & 3); BFIx(gb1, x1, 8, 8); } break; @@ -1900,7 +1900,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin case 0xBE: case 0xBF: INST_NAME("MOV Reg, Id"); - gd = xRAX+(opcode&7)+(rex.b<<3); + gd = TO_NAT((opcode & 7) + (rex.b << 3)); if(rex.w) { u64 = F64; MOV64x(gd, u64); @@ -2237,10 +2237,10 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin u8 = F8; if(!rex.rex) { ed = (nextop&7); - eb1 = xRAX+(ed&3); // Ax, Cx, Dx or Bx + eb1 = TO_NAT(ed & 3); // Ax, Cx, Dx or Bx eb2 = (ed&4)>>2; // L or H } else { - eb1 = xRAX+(nextop&7)+(rex.b<<3); + eb1 = TO_NAT((nextop & 7) + (rex.b << 3)); eb2 = 0; } MOV32w(x3, u8); @@ -2262,7 +2262,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop=F8; if(MODREG) { // reg <= i32 i64 = F32S; - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); MOV64xw(ed, i64); } else { // mem <= i32 addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, &lock, 0, 4); diff --git a/src/dynarec/arm64/dynarec_arm64_0f.c b/src/dynarec/arm64/dynarec_arm64_0f.c index 894c8320..dbfd4822 100644 --- a/src/dynarec/arm64/dynarec_arm64_0f.c +++ b/src/dynarec/arm64/dynarec_arm64_0f.c @@ -85,7 +85,7 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin case 0xE6: case 0xE7: INST_NAME("SMSW Ed"); - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); MOV32w(ed, (1<<0) | (1<<4)); // only PE and ET set... break; case 0xF9: @@ -856,7 +856,7 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop=F8; GETGD; if(MODREG) { - REVxw(gd, xRAX+(nextop&7)+(rex.b<<3)); + REVxw(gd, TO_NAT((nextop & 7) + (rex.b << 3))); } else { SMREAD(); addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, NULL, 0, 0); @@ -869,7 +869,7 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop=F8; GETGD; if(MODREG) { // reg <= reg - REVxw(xRAX+(nextop&7)+(rex.b<<3), gd); + REVxw(TO_NAT((nextop & 7) + (rex.b << 3)), gd); } else { // mem <= reg addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, NULL, 0, 0); REVxw(x1, gd); @@ -979,19 +979,19 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin } break; - #define GO(GETFLAGS, NO, YES, F) \ - READFLAGS(F); \ - GETFLAGS; \ - nextop=F8; \ - GETGD; \ - if(MODREG) { \ - ed = xRAX+(nextop&7)+(rex.b<<3); \ - CSELxw(gd, ed, gd, YES); \ - } else { \ - addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, NULL, 0, 0); \ - Bcond(NO, +8); \ - LDxw(gd, ed, fixedaddress); \ - if(!rex.w) {MOVw_REG(gd, gd);} \ + #define GO(GETFLAGS, NO, YES, F) \ + READFLAGS(F); \ + GETFLAGS; \ + nextop = F8; \ + GETGD; \ + if (MODREG) { \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ + CSELxw(gd, ed, gd, YES); \ + } else { \ + addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff << (2 + rex.w), (1 << (2 + rex.w)) - 1, rex, NULL, 0, 0); \ + Bcond(NO, +8); \ + LDxw(gd, ed, fixedaddress); \ + if (!rex.w) { MOVw_REG(gd, gd); } \ } GOCOND(0x40, "CMOV", "Gd, Ed"); @@ -1284,7 +1284,7 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin gd = (nextop&0x38)>>3; v0 = mmx_get_reg_empty(dyn, ninst, x1, x2, x3, gd); if(MODREG) { - ed = xRAX + (nextop&7) + (rex.b<<3); + ed = TO_NAT((nextop & 0x07) + (rex.b << 3)); if(rex.w) { FMOVDx(v0, ed); } else { @@ -1533,7 +1533,7 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop = F8; GETGM(v0); if((nextop&0xC0)==0xC0) { - ed = xRAX + (nextop&7) + (rex.b<<3); + ed = TO_NAT((nextop & 0x07) + (rex.b << 3)); if(rex.w) { FMOVxD(ed, v0); } else { @@ -1599,25 +1599,25 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin GOCOND(0x80, "J", "Id"); #undef GO - #define GO(GETFLAGS, NO, YES, F) \ - READFLAGS(F); \ - GETFLAGS; \ - nextop=F8; \ - CSETw(x3, YES); \ - if(MODREG) { \ - if(rex.rex) { \ - eb1= xRAX+(nextop&7)+(rex.b<<3); \ - eb2 = 0; \ - } else { \ - ed = (nextop&7); \ - eb2 = (ed>>2)*8; \ - eb1 = xRAX+(ed&3); \ - } \ - BFIx(eb1, x3, eb2, 8); \ - } else { \ + #define GO(GETFLAGS, NO, YES, F) \ + READFLAGS(F); \ + GETFLAGS; \ + nextop = F8; \ + CSETw(x3, YES); \ + if (MODREG) { \ + if (rex.rex) { \ + eb1 = TO_NAT((nextop & 7) + (rex.b << 3)); \ + eb2 = 0; \ + } else { \ + ed = (nextop & 7); \ + eb2 = (ed >> 2) * 8; \ + eb1 = TO_NAT (ed & 3); \ + } \ + BFIx(eb1, x3, eb2, 8); \ + } else { \ addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff, 0, rex, NULL, 0, 0); \ - STB(x3, ed, fixedaddress); \ - SMWRITE(); \ + STB(x3, ed, fixedaddress); \ + SMWRITE(); \ } GOCOND(0x90, "SET", "Eb"); @@ -1646,7 +1646,7 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop = F8; GETGD; if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); } else { SMREAD(); addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, NULL, 0, 0); @@ -1719,7 +1719,7 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop = F8; GETGD; if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); wback = 0; } else { SMREAD(); @@ -1932,7 +1932,7 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop = F8; GETGD; if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); wback = 0; UFLAG_IF {emit_cmp32(dyn, ninst, rex, xRAX, ed, x3, x4, x5);} MOVxw_REG(x1, ed); // save value @@ -1959,7 +1959,7 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop = F8; GETGD; if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); wback = 0; } else { SMREAD(); @@ -1995,11 +1995,11 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin GETGD; if(MODREG) { if(rex.rex) { - eb1 = xRAX+(nextop&7)+(rex.b<<3); + eb1 = TO_NAT((nextop & 7) + (rex.b << 3)); eb2 = 0; \ } else { ed = (nextop&7); - eb1 = xRAX+(ed&3); // Ax, Cx, Dx or Bx + eb1 = TO_NAT(ed&3); // Ax, Cx, Dx or Bx eb2 = (ed&4)>>2; // L or H } UBFXxw(gd, eb1, eb2*8, 8); @@ -2014,7 +2014,7 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop = F8; GETGD; if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); UBFXxw(gd, ed, 0, 16); } else { SMREAD(); @@ -2032,7 +2032,7 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin SET_DFNONE(x1); gd = x2; if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); } else { SMREAD(); addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, NULL, 0, 1); @@ -2048,7 +2048,7 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin SETFLAGS(X_CF, SF_SUBSET); SET_DFNONE(x1); if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); wback = 0; } else { SMREAD(); @@ -2073,7 +2073,7 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin SETFLAGS(X_CF, SF_SUBSET); SET_DFNONE(x1); if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); wback = 0; } else { SMREAD(); @@ -2097,7 +2097,7 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin SETFLAGS(X_CF, SF_SUBSET); SET_DFNONE(x1); if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); wback = 0; } else { SMREAD(); @@ -2128,7 +2128,7 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop = F8; GETGD; if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); wback = 0; } else { SMREAD(); @@ -2210,12 +2210,12 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin GETGD; if(MODREG) { if(rex.rex) { - wback = xRAX+(nextop&7)+(rex.b<<3); + wback = TO_NAT((nextop & 7) + (rex.b << 3)); wb2 = 0; } else { wback = (nextop&7); wb2 = (wback>>2)*8; - wback = xRAX+(wback&3); + wback = TO_NAT(wback&3); } SBFXxw(gd, wback, wb2, 8); } else { @@ -2229,7 +2229,7 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop = F8; GETGD; if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); SXTHxw(gd, ed); } else { SMREAD(); @@ -2296,7 +2296,7 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop=F8; GETGD; if(MODREG) { // reg <= reg - MOVxw_REG(xRAX+(nextop&7)+(rex.b<<3), gd); + MOVxw_REG(TO_NAT((nextop & 7) + (rex.b << 3)), gd); } else { // mem <= reg addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, NULL, 0, 0); STxw(gd, ed, fixedaddress); @@ -2308,7 +2308,7 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin GETGM(v0); if(MODREG) { u8 = (F8)&3; - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); VMOVQHfrom(v0, u8, ed); } else { addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 1); @@ -2472,7 +2472,7 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin case 0xCE: case 0xCF: /* BSWAP reg */ INST_NAME("BSWAP Reg"); - gd = xRAX+(opcode&7)+(rex.b<<3); + gd = TO_NAT((opcode&7)+(rex.b<<3)); REVxw(gd, gd); break; case 0xD1: diff --git a/src/dynarec/arm64/dynarec_arm64_64.c b/src/dynarec/arm64/dynarec_arm64_64.c index 5cea1394..fd9580d3 100644 --- a/src/dynarec/arm64/dynarec_arm64_64.c +++ b/src/dynarec/arm64/dynarec_arm64_64.c @@ -340,11 +340,11 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin GETGD; if(MODREG) { if(rex.rex) { - eb1 = xRAX+(nextop&7)+(rex.b<<3); + eb1 = TO_NAT((nextop & 7) + (rex.b << 3)); eb2 = 0; \ } else { ed = (nextop&7); - eb1 = xRAX+(ed&3); // Ax, Cx, Dx or Bx + eb1 = TO_NAT(ed & 3); // Ax, Cx, Dx or Bx eb2 = (ed&4)>>2; // L or H } UBFXxw(gd, eb1, eb2*8, 8); @@ -490,7 +490,7 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin GETGD; if(rex.w) { if(MODREG) { // reg <= reg - SXTWx(gd, xRAX+(nextop&7)+(rex.b<<3)); + SXTWx(gd, TO_NAT((nextop & 7) + (rex.b << 3))); } else { // mem <= reg grab_segdata(dyn, addr, ninst, x4, seg); SMREAD(); @@ -502,7 +502,7 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin } } else { if(MODREG) { // reg <= reg - MOVw_REG(gd, xRAX+(nextop&7)+(rex.b<<3)); + MOVw_REG(gd, TO_NAT((nextop & 7) + (rex.b << 3))); } else { // mem <= reg grab_segdata(dyn, addr, ninst, x4, seg); SMREAD(); @@ -815,10 +815,10 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin gd = ((nextop&0x38)>>3)+(rex.r<<3); if(rex.rex) { gb2 = 0; - gb1 = xRAX + gd; + gb1 = TO_NAT(gd); } else { gb2 = ((gd&4)<<1); - gb1 = xRAX+(gd&3); + gb1 = TO_NAT(gd & 3); } if(gb2) { gd = x4; @@ -829,10 +829,10 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin if(MODREG) { ed = (nextop&7) + (rex.b<<3); if(rex.rex) { - eb1 = xRAX+ed; + eb1 = TO_NAT(ed); eb2 = 0; } else { - eb1 = xRAX+(ed&3); // Ax, Cx, Dx or Bx + eb1 = TO_NAT(ed & 3); // Ax, Cx, Dx or Bx eb2 = ((ed&4)>>2); // L or H } BFIx(eb1, gd, eb2*8, 8); @@ -851,7 +851,7 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop=F8; GETGD; if(MODREG) { // reg <= reg - MOVxw_REG(xRAX+(nextop&7)+(rex.b<<3), gd); + MOVxw_REG(TO_NAT((nextop & 7) + (rex.b << 3)), gd); } else { // mem <= reg addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0); if(rex.is32bits) @@ -865,21 +865,21 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin INST_NAME("MOV Gb, Eb"); nextop = F8; if(rex.rex) { - gb1 = gd = xRAX+((nextop&0x38)>>3)+(rex.r<<3); + gb1 = gd = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)); gb2=0; } else { gd = (nextop&0x38)>>3; - gb1 = xRAX+(gd&3); + gb1 = TO_NAT(gd & 3); gb2 = ((gd&4)<<1); } if(MODREG) { if(rex.rex) { - wback = xRAX+(nextop&7)+(rex.b<<3); + wback = TO_NAT((nextop & 7) + (rex.b << 3)); wb2 = 0; } else { wback = (nextop&7); wb2 = (wback>>2); - wback = xRAX+(wback&3); + wback = TO_NAT(wback & 3); } if(wb2) { UBFXw(x4, wback, wb2*8, 8); @@ -905,7 +905,7 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop=F8; GETGD; if(MODREG) { // reg <= reg - MOVxw_REG(gd, xRAX+(nextop&7)+(rex.b<<3)); + MOVxw_REG(gd, TO_NAT((nextop & 7) + (rex.b << 3))); } else { // mem <= reg SMREAD(); addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0); @@ -938,7 +938,7 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop = F8; u8 = (nextop&0x38)>>3; if((nextop&0xC0)==0xC0) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); } else { SMREAD(); addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0); @@ -956,7 +956,7 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin grab_segdata(dyn, addr, ninst, x4, seg); nextop = F8; if(MODREG) { - POP1z(xRAX+(nextop&7)+(rex.b<<3)); + POP1z(TO_NAT((nextop & 7) + (rex.b << 3))); } else { POP1z(x2); // so this can handle POP [ESP] and maybe some variant too addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0, 0, rex, NULL, 0, 0); @@ -1055,10 +1055,10 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin u8 = F8; if(!rex.rex) { ed = (nextop&7); - eb1 = xRAX+(ed&3); // Ax, Cx, Dx or Bx + eb1 = TO_NAT(ed & 3); // Ax, Cx, Dx or Bx eb2 = (ed&4)>>2; // L or H } else { - eb1 = xRAX+(nextop&7)+(rex.b<<3); + eb1 = TO_NAT((nextop & 7) + (rex.b << 3)); eb2 = 0; } MOV32w(x3, u8); @@ -1080,7 +1080,7 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop=F8; if(MODREG) { // reg <= i32 i64 = F32S; - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); MOV64xw(ed, i64); } else { // mem <= i32 addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 4); diff --git a/src/dynarec/arm64/dynarec_arm64_66.c b/src/dynarec/arm64/dynarec_arm64_66.c index e8880dc2..b50c0dae 100644 --- a/src/dynarec/arm64/dynarec_arm64_66.c +++ b/src/dynarec/arm64/dynarec_arm64_66.c @@ -324,7 +324,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin case 0x47: INST_NAME("INC Reg16 (32bits)"); SETFLAGS(X_ALL&~X_CF, SF_SUBSET); - gd = xRAX + (opcode&7); + gd = TO_NAT (opcode&7); UXTHw(x1, gd); emit_inc16(dyn, ninst, x1, x2, x3); BFIz(gd, x1, 0, 16); @@ -339,7 +339,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin case 0x4F: INST_NAME("DEC Reg16 (32bits)"); SETFLAGS(X_ALL&~X_CF, SF_SUBSET); - gd = xRAX + (opcode&7); + gd = TO_NAT (opcode&7); UXTHw(x1, gd); emit_dec16(dyn, ninst, x1, x2, x3); BFIz(gd, x1, 0, 16); @@ -353,7 +353,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin case 0x56: case 0x57: INST_NAME("PUSH reg"); - gd = xRAX+(opcode&0x07)+(rex.b<<3); + gd = TO_NAT((opcode & 0x07) + (rex.b << 3)); if (gd==xRSP) { MOVw_REG(x1, xRSP); PUSH1_16(x1); @@ -370,7 +370,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin case 0x5E: case 0x5F: INST_NAME("POP reg"); - gd = xRAX+(opcode&0x07)+(rex.b<<3); + gd = TO_NAT((opcode & 0x07) + (rex.b << 3)); POP1_16(x1); BFIz(gd, x1, 0, 16); break; @@ -612,7 +612,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop = F8; GETGD; // don't need GETGW here if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); if(ed!=gd) { BFIz(ed, gd, 0, 16); } @@ -627,7 +627,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop = F8; GETGD; // don't need GETGW neither if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); if(ed!=gd) { BFIz(gd, ed, 0, 16); } @@ -644,7 +644,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin u8 = (nextop&0x38)>>3; LDRH_U12(x3, xEmu, offsetof(x64emu_t, segs[u8])); if((nextop&0xC0)==0xC0) { // reg <= seg - BFIz(xRAX+(nextop&7)+(rex.b<<3), x3, 0, 16); + BFIz(TO_NAT((nextop & 7) + (rex.b << 3)), x3, 0, 16); } else { // mem <= seg addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff<<1, 1, rex, NULL, 0, 0); STH(x3, wback, fixedaddress); @@ -657,7 +657,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop = F8; u8 = (nextop&0x38)>>3; if((nextop&0xC0)==0xC0) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); } else { SMREAD(); addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff<<1, 1, rex, NULL, 0, 0); @@ -672,7 +672,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop = F8; POP1_16(x1); if((nextop&0xC0)==0xC0) { - wback = xRAX+(nextop&7)+(rex.b<<3); + wback = TO_NAT((nextop & 7) + (rex.b << 3)); BFIz(wback, x1, 0, 16); } else { SMREAD(); @@ -688,7 +688,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin case 0x95: case 0x96: case 0x97: - gd = xRAX+(opcode&0x07)+(rex.b<<3); + gd = TO_NAT((opcode & 0x07) + (rex.b << 3)); if(gd==xRAX) { INST_NAME("NOP"); } else { @@ -963,7 +963,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin INST_NAME("MOV Reg16, Iw"); u16 = F16; MOV32w(x1, u16); - gd = xRAX+(opcode&7)+(rex.b<<3); + gd = TO_NAT((opcode & 7) + (rex.b << 3)); BFIz(gd, x1, 0, 16); break; @@ -1072,7 +1072,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin INST_NAME("MOV Ew, Iw"); nextop = F8; if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); u16 = F16; MOV32w(x1, u16); BFIz(ed, x1, 0, 16); diff --git a/src/dynarec/arm64/dynarec_arm64_660f.c b/src/dynarec/arm64/dynarec_arm64_660f.c index 458b24ba..eb04aca7 100644 --- a/src/dynarec/arm64/dynarec_arm64_660f.c +++ b/src/dynarec/arm64/dynarec_arm64_660f.c @@ -888,9 +888,9 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n case 0xF0: INST_NAME("MOVBE Gw, Ew"); nextop=F8; - gd = xRAX+((nextop&0x38)>>3)+(rex.r<<3); + gd = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)); if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); REV16x(x1, ed); BFIx(gd, x1, 0, 16); } else { @@ -904,9 +904,9 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n case 0xF1: INST_NAME("MOVBE Ew, Gw"); nextop=F8; - gd = xRAX+((nextop&0x38)>>3)+(rex.r<<3); + gd = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)); if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); REV16x(x1, gd); BFIx(ed, x1, 0, 16); } else { @@ -1093,7 +1093,7 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n nextop = F8; GETGX(q0, 0); if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); u8 = F8; VMOVBto(ed, q0, (u8&15)); } else { @@ -1108,7 +1108,7 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n nextop = F8; GETGX(q0, 0); if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); u8 = F8; VMOVHto(ed, q0, (u8&7)); } else { @@ -1123,7 +1123,7 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n nextop = F8; GETGX(q0, 0); if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); u8 = F8; if(rex.w) { VMOVQDto(ed, q0, (u8&1)); @@ -1146,7 +1146,7 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n nextop = F8; GETGX(q0, 0); if (MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); u8 = F8&0b11; MOVx_REG(ed, xZR); VMOVSto(ed, q0, u8); @@ -1592,20 +1592,20 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n } break; - #define GO(GETFLAGS, NO, YES, F) \ - READFLAGS(F); \ - GETFLAGS; \ - nextop=F8; \ - GETGD; \ - if(MODREG) { \ - ed = xRAX+(nextop&7)+(rex.b<<3); \ - } else { \ - SMREAD(); \ - addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<1, 1, rex, NULL, 0, 0); \ - LDH(x1, ed, fixedaddress); \ - ed = x1; \ - } \ - Bcond(NO, +8); \ + #define GO(GETFLAGS, NO, YES, F) \ + READFLAGS(F); \ + GETFLAGS; \ + nextop = F8; \ + GETGD; \ + if (MODREG) { \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ + } else { \ + SMREAD(); \ + addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff << 1, 1, rex, NULL, 0, 0); \ + LDH(x1, ed, fixedaddress); \ + ed = x1; \ + } \ + Bcond(NO, +8); \ BFIx(gd, ed, 0, 16); GOCOND(0x40, "CMOV", "Gw, Ew"); @@ -2281,7 +2281,7 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n GETGX(v0, 0); if(rex.w) { if(MODREG) { - ed = xRAX + (nextop&7) + (rex.b<<3); + ed = TO_NAT((nextop & 0x07) + (rex.b << 3)); VMOVQDto(ed, v0, 0); } else { addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, 0); @@ -2290,7 +2290,7 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n } } else { if(MODREG) { - ed = xRAX + (nextop&7) + (rex.b<<3); + ed = TO_NAT((nextop & 0x07) + (rex.b << 3)); VMOVSto(ed, v0, 0); } else { addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0); @@ -2318,9 +2318,9 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n SETFLAGS(X_CF, SF_SUBSET); SET_DFNONE(x1); nextop = F8; - gd = xRAX+((nextop&0x38)>>3)+(rex.r<<3); // GETGD + gd = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)); // GETGD if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); } else { SMREAD(); addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff<<2, (1<<2)-1, rex, NULL, 0, 0); @@ -2372,9 +2372,9 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n SETFLAGS(X_CF, SF_SUBSET); SET_DFNONE(x1); nextop = F8; - gd = xRAX+((nextop&0x38)>>3)+(rex.r<<3); // GETGD + gd = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)); // GETGD if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); wback = 0; } else { addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff<<2, (1<<2)-1, rex, NULL, 0, 0); @@ -2446,9 +2446,9 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n SETFLAGS(X_CF, SF_SUBSET); SET_DFNONE(x1); nextop = F8; - gd = xRAX+((nextop&0x38)>>3)+(rex.r<<3); // GETGD + gd = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)); // GETGD if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); wback = 0; } else { SMREAD(); @@ -2476,11 +2476,11 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n nextop = F8; if(MODREG) { if(rex.rex) { - eb1 = xRAX+(nextop&7)+(rex.b<<3); + eb1 = TO_NAT((nextop & 7) + (rex.b << 3)); eb2 = 0; } else { ed = (nextop&7); - eb1 = xRAX+(ed&3); // Ax, Cx, Dx or Bx + eb1 = TO_NAT(ed & 3); // Ax, Cx, Dx or Bx eb2 = (ed&4)>>2; // L or H } UBFXxw(x1, eb1, eb2*8, 8); @@ -2489,21 +2489,21 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff, 0, rex, NULL, 0, 0); LDB(x1, ed, fixedaddress); } - gd = xRAX+((nextop&0x38)>>3)+(rex.r<<3); // GETGW + gd = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)); // GETGW BFIx(gd, x1, 0, 16); // insert in Gw break; case 0xB7: INST_NAME("MOVZX Gw, Ew"); nextop = F8; if(MODREG) { - eb1 = xRAX+(nextop&7)+(rex.b<<3); + eb1 = TO_NAT((nextop & 7) + (rex.b << 3)); UBFXxw(x1, eb1, 0, 16); } else { SMREAD(); addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff>>1, 1, rex, NULL, 0, 0); LDH(x1, ed, fixedaddress); } - gd = xRAX+((nextop&0x38)>>3)+(rex.r<<3); // GETGW + gd = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)); // GETGW BFIx(gd, x1, 0, 16); // insert in Gw break; @@ -2571,9 +2571,9 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n SETFLAGS(X_CF, SF_SUBSET); SET_DFNONE(x1); nextop = F8; - gd = xRAX+((nextop&0x38)>>3)+(rex.r<<3); // GETGD + gd = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)); // GETGD if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); wback = 0; } else { SMREAD(); @@ -2653,12 +2653,12 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n GETGD; if(MODREG) { if(rex.rex) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); eb1=ed; eb2=0; } else { ed = (nextop&7); - eb1 = xRAX+(ed&3); // Ax, Cx, Dx or Bx + eb1 = TO_NAT(ed & 3); // Ax, Cx, Dx or Bx eb2 = (ed&4)>>2; // L or H } SBFXw(x1, eb1, eb2*8, 8); @@ -2674,7 +2674,7 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n nextop = F8; GETGD; if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); SXTHxw(x1, ed); } else { SMREAD(); @@ -2690,7 +2690,7 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n nextop = F8; GETGW(x1); GETEW(x2, 0); - BFIx(xRAX+((nextop&0x38)>>3)+(rex.r<<3), ed, 0, 16); + BFIx(TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)), ed, 0, 16); emit_add16(dyn, ninst, ed, gd, x4, x5); EWBACK; break; @@ -2732,7 +2732,7 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n GETGX(v0, 1); if(MODREG) { u8 = (F8)&7; - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); VMOVQHfrom(v0, u8, ed); } else { SMREAD(); @@ -2786,7 +2786,7 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n case 0xCE: case 0xCF: /* BSWAP reg */ INST_NAME("BSWAP Reg"); - gd = xRAX+(opcode&7)+(rex.b<<3); + gd = TO_NAT((opcode & 7) + (rex.b << 3)); if(rex.w) { REV64x(gd, gd); } else { diff --git a/src/dynarec/arm64/dynarec_arm64_6664.c b/src/dynarec/arm64/dynarec_arm64_6664.c index 7685d1b8..23ca8147 100644 --- a/src/dynarec/arm64/dynarec_arm64_6664.c +++ b/src/dynarec/arm64/dynarec_arm64_6664.c @@ -224,7 +224,7 @@ uintptr_t dynarec64_6664(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n nextop = F8; GETGD; // don't need GETGW here if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); if(rex.w) { MOVx_REG(ed, gd); } else { @@ -252,7 +252,7 @@ uintptr_t dynarec64_6664(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n nextop=F8; GETGD; if(MODREG) { // reg <= reg - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); if(rex.w) { MOVx_REG(gd, ed); } else { diff --git a/src/dynarec/arm64/dynarec_arm64_66f0.c b/src/dynarec/arm64/dynarec_arm64_66f0.c index 7f2b2d0f..7ee6e9a3 100644 --- a/src/dynarec/arm64/dynarec_arm64_66f0.c +++ b/src/dynarec/arm64/dynarec_arm64_66f0.c @@ -55,7 +55,7 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n nextop = F8; GETGW(x5); if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); UXTHw(x6, ed); emit_add16(dyn, ninst, x6, x5, x3, x4); BFIx(ed, x6, 0, 16); @@ -85,7 +85,7 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n nextop = F8; GETGW(x5); if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); UXTHw(x6, ed); emit_or16(dyn, ninst, x6, x5, x3, x4); BFIx(ed, x6, 0, 16); @@ -120,7 +120,7 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n GETGD; UXTHw(x6, xRAX); if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); wback = 0; UXTHw(x1, ed); CMPSxw_REG(x6, x1); @@ -177,10 +177,10 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n INST_NAME("LOCK XADD Gw, Ew"); SETFLAGS(X_ALL, SF_SET_PENDING); nextop = F8; - gd = xRAX+((nextop&0x38)>>3)+(rex.r<<3); + gd = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)); UXTHx(x5, gd); if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); BFIx(gd, ed, 0, 16); emit_add16(dyn, ninst, x5, gd, x3, x4); BFIx(ed, x5, 0, 16); @@ -216,7 +216,7 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n nextop = F8; GETGW(x5); if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); UXTHw(x6, ed); emit_adc16(dyn, ninst, x6, x5, x3, x4); BFIx(ed, x6, 0, 16); @@ -237,7 +237,7 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n nextop = F8; GETGW(x5); if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); UXTHw(x6, ed); emit_and16(dyn, ninst, x6, gd, x3, x4); BFIx(ed, x6, 0, 16); @@ -275,7 +275,7 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n SETFLAGS(X_ALL, SF_SET_PENDING); if(MODREG) { if(opcode==0x81) i16 = F16S; else i16 = F8S; - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); MOV32w(x5, i16); UXTHw(x6, ed); emit_add16(dyn, ninst, x6, x5, x3, x4); @@ -326,7 +326,7 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n SETFLAGS(X_ALL, SF_SET_PENDING); if(MODREG) { if(opcode==0x81) i16 = F16S; else i16 = F8S; - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); UXTHw(x6, ed); emit_or16c(dyn, ninst, x6, i16, x3, x4); BFIx(ed, x6, 0, 16); @@ -363,7 +363,7 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n SETFLAGS(X_ALL, SF_SET_PENDING); if(MODREG) { if(opcode==0x81) i16 = F16S; else i16 = F8S; - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); MOV32w(x5, i16); UXTHw(x6, ed); emit_adc16(dyn, ninst, x6, x5, x3, x4); @@ -386,7 +386,7 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n SETFLAGS(X_ALL, SF_SET_PENDING); if(MODREG) { if(opcode==0x81) i16 = F16S; else i16 = F8S; - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); MOV32w(x5, i16); UXTHw(x6, ed); emit_sbb16(dyn, ninst, x6, x5, x3, x4); @@ -408,7 +408,7 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n SETFLAGS(X_ALL, SF_SET_PENDING); if(MODREG) { if(opcode==0x81) i16 = F16S; else i16 = F8S; - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); UXTHw(x6, ed); emit_and16c(dyn, ninst, x6, i16, x3, x4); BFIx(ed, x6, 0, 16); @@ -449,7 +449,7 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n SETFLAGS(X_ALL, SF_SET_PENDING); if(MODREG) { if(opcode==0x81) i16 = F16S; else i16 = F8S; - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); MOV32w(x5, i16); UXTHw(x6, ed); emit_sub16(dyn, ninst, x6, x5, x3, x4); @@ -503,7 +503,7 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n SETFLAGS(X_ALL, SF_SET_PENDING); if(MODREG) { if(opcode==0x81) i16 = F16S; else i16 = F8S; - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); UXTHw(x6, ed); emit_xor16c(dyn, ninst, x6, i16, x3, x4); BFIx(ed, x6, 0, 16); @@ -557,7 +557,7 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n INST_NAME("LOCK INC Ew"); SETFLAGS(X_ALL&~X_CF, SF_SUBSET); if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); UXTHw(x6, ed); emit_inc16(dyn, ninst, x6, x5, x3); BFIx(ed, x6, 0, 16); @@ -585,7 +585,7 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n INST_NAME("LOCK DEC Ew"); SETFLAGS(X_ALL&~X_CF, SF_SUBSET); if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); UXTHw(x6, ed); emit_dec16(dyn, ninst, x6, x5, x3); BFIx(ed, x6, 0, 16); diff --git a/src/dynarec/arm64/dynarec_arm64_67.c b/src/dynarec/arm64/dynarec_arm64_67.c index 5316866e..a4cc6f6e 100644 --- a/src/dynarec/arm64/dynarec_arm64_67.c +++ b/src/dynarec/arm64/dynarec_arm64_67.c @@ -330,11 +330,11 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin GETGD; if(MODREG) { if(rex.rex) { - eb1 = xRAX+(nextop&7)+(rex.b<<3); + eb1 = TO_NAT((nextop & 7) + (rex.b << 3)); eb2 = 0; } else { ed = (nextop&7); - eb1 = xRAX+(ed&3); // Ax, Cx, Dx or Bx + eb1 = TO_NAT(ed & 3); // Ax, Cx, Dx or Bx eb2 = (ed&4)>>2; // L or H } UBFXxw(gd, eb1, eb2*8, 8); @@ -349,7 +349,7 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop = F8; GETGD; if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); UBFXxw(gd, ed, 0, 16); } else { SMREAD(); @@ -707,7 +707,7 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin GETGD; if(rex.w) { if(MODREG) { // reg <= reg - SXTWx(gd, xRAX+(nextop&7)+(rex.b<<3)); + SXTWx(gd, TO_NAT((nextop & 7) + (rex.b << 3))); } else { // mem <= reg SMREAD(); addr = geted32(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0); @@ -715,7 +715,7 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin } } else { if(MODREG) { // reg <= reg - MOVw_REG(gd, xRAX+(nextop&7)+(rex.b<<3)); + MOVw_REG(gd, TO_NAT((nextop & 7) + (rex.b << 3))); } else { // mem <= reg SMREAD(); addr = geted32(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0); @@ -753,7 +753,7 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin GETGX(v0, 0); if(rex.w) { if(MODREG) { - ed = xRAX + (nextop&7) + (rex.b<<3); + ed = TO_NAT((nextop & 0x07) + (rex.b << 3)); VMOVQDto(ed, v0, 0); } else { addr = geted32(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, 0); @@ -762,7 +762,7 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin } } else { if(MODREG) { - ed = xRAX + (nextop&7) + (rex.b<<3); + ed = TO_NAT((nextop & 0x07) + (rex.b << 3)); VMOVSto(ed, v0, 0); } else { addr = geted32(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0); @@ -883,7 +883,7 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop = F8; GETGD; // don't need GETGW here if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); if(ed!=gd) { BFIx(ed, gd, 0, 16); } @@ -1077,10 +1077,10 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin gd = ((nextop&0x38)>>3)+(rex.r<<3); if(rex.rex) { gb2 = 0; - gb1 = xRAX + gd; + gb1 = TO_NAT(gd); } else { gb2 = ((gd&4)<<1); - gb1 = xRAX+(gd&3); + gb1 = TO_NAT(gd & 3); } if(gb2) { gd = x4; @@ -1091,10 +1091,10 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin if(MODREG) { ed = (nextop&7) + (rex.b<<3); if(rex.rex) { - eb1 = xRAX+ed; + eb1 = TO_NAT(ed); eb2 = 0; } else { - eb1 = xRAX+(ed&3); // Ax, Cx, Dx or Bx + eb1 = TO_NAT(ed & 3); // Ax, Cx, Dx or Bx eb2 = ((ed&4)>>2); // L or H } BFIx(eb1, gd, eb2*8, 8); @@ -1109,7 +1109,7 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop=F8; GETGD; if(MODREG) { // reg <= reg - MOVxw_REG(xRAX+(nextop&7)+(rex.b<<3), gd); + MOVxw_REG(TO_NAT((nextop & 7) + (rex.b << 3)), gd); } else { // mem <= reg addr = geted32(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff << (2 + rex.w), (1 << (2 + rex.w)) - 1, rex, &lock, 0, 0); STxw(gd, ed, fixedaddress); @@ -1120,21 +1120,21 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin INST_NAME("MOV Gb, Eb"); nextop = F8; if(rex.rex) { - gb1 = gd = xRAX+((nextop&0x38)>>3)+(rex.r<<3); + gb1 = gd = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)); gb2=0; } else { gd = (nextop&0x38)>>3; - gb1 = xRAX+(gd&3); + gb1 = TO_NAT(gd & 3); gb2 = ((gd&4)<<1); } if(MODREG) { if(rex.rex) { - wback = xRAX+(nextop&7)+(rex.b<<3); + wback = TO_NAT((nextop & 7) + (rex.b << 3)); wb2 = 0; } else { wback = (nextop&7); wb2 = (wback>>2); - wback = xRAX+(wback&3); + wback = TO_NAT(wback & 3); } if(wb2) { UBFXw(x4, wback, wb2*8, 8); @@ -1155,7 +1155,7 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop=F8; GETGD; if(MODREG) { - MOVxw_REG(gd, xRAX+(nextop&7)+(rex.b<<3)); + MOVxw_REG(gd, TO_NAT((nextop & 7) + (rex.b << 3))); } else { addr = geted32(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, &lock, 0, 0); SMREADLOCK(lock); @@ -1185,7 +1185,7 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin case 0x95: case 0x96: case 0x97: - gd = xRAX+(opcode&0x07)+(rex.b<<3); + gd = TO_NAT((opcode & 0x07) + (rex.b << 3)); if(gd==xRAX) { INST_NAME("NOP"); } else { @@ -1328,10 +1328,10 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin u8 = F8; if(!rex.rex) { ed = (nextop&7); - eb1 = xRAX+(ed&3); // Ax, Cx, Dx or Bx + eb1 = TO_NAT(ed & 3); // Ax, Cx, Dx or Bx eb2 = (ed&4)>>2; // L or H } else { - eb1 = xRAX+(nextop&7)+(rex.b<<3); + eb1 = TO_NAT((nextop & 7) + (rex.b << 3)); eb2 = 0; } MOV32w(x3, u8); @@ -1353,7 +1353,7 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop=F8; if(MODREG) { // reg <= i32 i64 = F32S; - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); MOV64xw(ed, i64); } else { // mem <= i32 addr = geted32(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, &unscaled, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, &lock, 0, 4); diff --git a/src/dynarec/arm64/dynarec_arm64_6764_32.c b/src/dynarec/arm64/dynarec_arm64_6764_32.c index c5ef6fdc..9ca098cf 100644 --- a/src/dynarec/arm64/dynarec_arm64_6764_32.c +++ b/src/dynarec/arm64/dynarec_arm64_6764_32.c @@ -66,7 +66,7 @@ uintptr_t dynarec64_6764_32(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, in nextop=F8; GETGD; if(MODREG) { // reg <= reg - MOVxw_REG(xRAX+(nextop&7)+(rex.b<<3), gd); + MOVxw_REG(TO_NAT((nextop & 7) + (rex.b << 3)), gd); } else { // mem <= reg grab_segdata(dyn, addr, ninst, x4, seg); addr = geted16(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, NULL, 0, 0, 0); @@ -79,7 +79,7 @@ uintptr_t dynarec64_6764_32(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, in nextop=F8; GETGD; if(MODREG) { // reg => reg - MOVxw_REG(gd, xRAX+(nextop&7)+(rex.b<<3)); + MOVxw_REG(gd, TO_NAT((nextop & 7) + (rex.b << 3))); } else { // mem => reg grab_segdata(dyn, addr, ninst, x4, seg); addr = geted16(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, NULL, 0, 0, 0); @@ -92,7 +92,7 @@ uintptr_t dynarec64_6764_32(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, in nextop=F8; if(MODREG) { // reg <= reg POP1_32(x1); - MOVxw_REG(xRAX+(nextop&7)+(rex.b<<3), x1); + MOVxw_REG(TO_NAT((nextop & 7) + (rex.b << 3)), x1); } else { // mem <= reg grab_segdata(dyn, addr, ninst, x4, seg); POP1_32(x1); diff --git a/src/dynarec/arm64/dynarec_arm64_avx_66_0f.c b/src/dynarec/arm64/dynarec_arm64_avx_66_0f.c index bcd9ed8a..5ef0c6a0 100644 --- a/src/dynarec/arm64/dynarec_arm64_avx_66_0f.c +++ b/src/dynarec/arm64/dynarec_arm64_avx_66_0f.c @@ -1159,7 +1159,7 @@ uintptr_t dynarec64_AVX_66_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, GETGX(v0, 0); if(rex.w) { if(MODREG) { - ed = xRAX + (nextop&7) + (rex.b<<3); + ed = TO_NAT((nextop & 0x07) + (rex.b << 3)); VMOVQDto(ed, v0, 0); } else { addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, 0); @@ -1168,7 +1168,7 @@ uintptr_t dynarec64_AVX_66_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, } } else { if(MODREG) { - ed = xRAX + (nextop&7) + (rex.b<<3); + ed = TO_NAT((nextop & 0x07) + (rex.b << 3)); VMOVSto(ed, v0, 0); } else { addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 0); @@ -1239,7 +1239,7 @@ uintptr_t dynarec64_AVX_66_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, if(v0!=v2) VMOVQ(v0, v2); if(MODREG) { u8 = (F8)&7; - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); VMOVQHfrom(v0, u8, ed); } else { SMREAD(); diff --git a/src/dynarec/arm64/dynarec_arm64_avx_66_0f38.c b/src/dynarec/arm64/dynarec_arm64_avx_66_0f38.c index 9582a810..bf02da03 100644 --- a/src/dynarec/arm64/dynarec_arm64_avx_66_0f38.c +++ b/src/dynarec/arm64/dynarec_arm64_avx_66_0f38.c @@ -1104,7 +1104,7 @@ uintptr_t dynarec64_AVX_66_0F38(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip MOV64x(x5, F32S64); eb1 = x5; } else - eb1 = xRAX + (u8&0x7)+(rex.b<<3); // base + eb1 = TO_NAT((u8 & 0x7) + (rex.b << 3)); // base eb2 = ((u8>>3)&7)+(rex.x<<3); // index if(nextop&0x40) i32 = F8S; @@ -1163,7 +1163,7 @@ uintptr_t dynarec64_AVX_66_0F38(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip MOV64x(x5, F32S64); eb1 = x5; } else - eb1 = xRAX + (u8&0x7)+(rex.b<<3); // base + eb1 = TO_NAT((u8 & 0x7) + (rex.b << 3)); // base eb2 = ((u8>>3)&7)+(rex.x<<3); // index if(nextop&0x40) i32 = F8S; diff --git a/src/dynarec/arm64/dynarec_arm64_avx_66_0f3a.c b/src/dynarec/arm64/dynarec_arm64_avx_66_0f3a.c index f92c2a71..dee4a568 100644 --- a/src/dynarec/arm64/dynarec_arm64_avx_66_0f3a.c +++ b/src/dynarec/arm64/dynarec_arm64_avx_66_0f3a.c @@ -368,7 +368,7 @@ uintptr_t dynarec64_AVX_66_0F3A(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip nextop = F8; GETGX(v0, 0); if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); } else { SMREAD(); addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff, 0, rex, NULL, 0, 1); @@ -385,7 +385,7 @@ uintptr_t dynarec64_AVX_66_0F3A(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip nextop = F8; GETGX(v0, 0); if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); } else { SMREAD(); addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff<<1, 1, rex, NULL, 0, 1); @@ -402,7 +402,7 @@ uintptr_t dynarec64_AVX_66_0F3A(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip nextop = F8; GETGX(v0, 0); if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); } else { SMREAD(); addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, NULL, 0, 1); @@ -423,7 +423,7 @@ uintptr_t dynarec64_AVX_66_0F3A(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip nextop = F8; GETGX(v0, 0); if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); } else { SMREAD(); addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, 1); diff --git a/src/dynarec/arm64/dynarec_arm64_f0.c b/src/dynarec/arm64/dynarec_arm64_f0.c index 9ddc0b3a..780377af 100644 --- a/src/dynarec/arm64/dynarec_arm64_f0.c +++ b/src/dynarec/arm64/dynarec_arm64_f0.c @@ -62,12 +62,12 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin GETGB(x2); if((nextop&0xC0)==0xC0) { if(rex.rex) { - wback = xRAX + (nextop&7) + (rex.b<<3); + wback = TO_NAT((nextop & 0x07) + (rex.b << 3)); wb2 = 0; } else { wback = (nextop&7); wb2 = (wback>>2); - wback = xRAX+(wback&3); + wback = TO_NAT(wback & 3); } UBFXw(x1, wback, wb2*8, 8); emit_add8(dyn, ninst, x1, x2, x4, x3); @@ -97,7 +97,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop = F8; GETGD; if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); emit_add32(dyn, ninst, rex, ed, gd, x3, x4); } else { addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, LOCK_LOCK, 0, 0); @@ -149,12 +149,12 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin GETGB(x2); if((nextop&0xC0)==0xC0) { if(rex.rex) { - wback = xRAX + (nextop&7) + (rex.b<<3); + wback = TO_NAT((nextop & 0x07) + (rex.b << 3)); wb2 = 0; } else { wback = (nextop&7); wb2 = (wback>>2); - wback = xRAX+(wback&3); + wback = TO_NAT(wback & 3); } UBFXw(x1, wback, wb2*8, 8); emit_or8(dyn, ninst, x1, x2, x4, x3); @@ -182,7 +182,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop = F8; GETGD; if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); emit_or32(dyn, ninst, rex, ed, gd, x3, x4); } else { addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, LOCK_LOCK, 0, 0); @@ -213,7 +213,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop = F8; GETGD; if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); wback = 0; if(rex.w) { ANDx_mask(x2, gd, 1, 0, 0b00101); //mask=0x000000000000003f @@ -260,12 +260,12 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin UBFXx(x6, xRAX, 0, 8); if(MODREG) { if(rex.rex) { - wback = xRAX+(nextop&7)+(rex.b<<3); + wback = TO_NAT((nextop & 7) + (rex.b << 3)); wb2 = 0; } else { wback = (nextop&7); wb2 = (wback>>2)*8; - wback = xRAX+(wback&3); + wback = TO_NAT(wback & 3); } UBFXx(x2, wback, wb2, 8); wb1 = 0; @@ -317,7 +317,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop = F8; GETGD; if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); wback = 0; UFLAG_IF {emit_cmp32(dyn, ninst, rex, xRAX, ed, x3, x4, x5);} MOVxw_REG(x1, ed); // save value @@ -400,7 +400,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop = F8; GETGD; if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); wback = 0; if(rex.w) { ANDx_mask(x2, gd, 1, 0, 0b00101); //mask=0x000000000000003f @@ -447,7 +447,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin SET_DFNONE(x1); gd = x2; if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); u8 = F8; u8&=rex.w?0x3f:0x1f; BFXILxw(xFlags, ed, u8, 1); // inject 1 bit from u8 to F_CF (i.e. pos 0) @@ -471,7 +471,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin SETFLAGS(X_CF, SF_SUBSET); SET_DFNONE(x1); if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); wback = 0; u8 = F8; u8&=(rex.w?0x3f:0x1f); @@ -503,7 +503,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin SETFLAGS(X_CF, SF_SUBSET); SET_DFNONE(x1); if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); wback = 0; u8 = F8; u8&=(rex.w?0x3f:0x1f); @@ -532,7 +532,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin SETFLAGS(X_CF, SF_SUBSET); SET_DFNONE(x1); if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); wback = 0; u8 = F8; u8&=(rex.w?0x3f:0x1f); @@ -570,7 +570,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop = F8; GETGB(x1); if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); GETEB(x2, 0); gd = x2; ed = x1; // swap gd/ed emit_add8(dyn, ninst, x1, x2, x4, x5); @@ -616,7 +616,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop = F8; GETGD; if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); MOVxw_REG(x1, ed); MOVxw_REG(ed, gd); MOVxw_REG(gd, x1); @@ -796,12 +796,12 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin GETGB(x2); if((nextop&0xC0)==0xC0) { if(rex.rex) { - wback = xRAX + (nextop&7) + (rex.b<<3); + wback = TO_NAT((nextop & 0x07) + (rex.b << 3)); wb2 = 0; } else { wback = (nextop&7); wb2 = (wback>>2); - wback = xRAX+(wback&3); + wback = TO_NAT(wback & 3); } UBFXw(x1, wback, wb2*8, 8); emit_adc8(dyn, ninst, x1, x2, x4, x5); @@ -823,7 +823,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop = F8; GETGD; if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); emit_adc32(dyn, ninst, rex, ed, gd, x3, x4); } else { addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, LOCK_LOCK, 0, 0); @@ -872,7 +872,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop = F8; GETGD; if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); emit_and32(dyn, ninst, rex, ed, gd, x3, x4); } else { addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, LOCK_LOCK, 0, 0); @@ -901,7 +901,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop = F8; GETGD; if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); emit_sub32(dyn, ninst, rex, ed, gd, x3, x4); } else { addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, LOCK_LOCK, 0, 0); @@ -952,7 +952,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin nextop = F8; GETGD; if((nextop&0xC0)==0xC0) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); emit_xor32(dyn, ninst, rex, ed, gd, x3, x4); } else { addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, LOCK_LOCK, 0, 0); @@ -1232,7 +1232,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin SETFLAGS(X_ALL, SF_SET_PENDING); if(MODREG) { if(opcode==0x81) i64 = F32S; else i64 = F8S; - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); MOV64xw(x5, i64); emit_add32(dyn, ninst, rex, ed, x5, x3, x4); } else { @@ -1285,7 +1285,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin SETFLAGS(X_ALL, SF_SET_PENDING); if(MODREG) { if(opcode==0x81) i64 = F32S; else i64 = F8S; - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); MOV64xw(x5, i64); emit_or32(dyn, ninst, rex, ed, x5, x3, x4); } else { @@ -1315,7 +1315,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin SETFLAGS(X_ALL, SF_SET_PENDING); if(MODREG) { if(opcode==0x81) i64 = F32S; else i64 = F8S; - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); MOV64xw(x5, i64); emit_adc32(dyn, ninst, rex, ed, x5, x3, x4); } else { @@ -1336,7 +1336,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin SETFLAGS(X_ALL, SF_SET_PENDING); if(MODREG) { if(opcode==0x81) i64 = F32S; else i64 = F8S; - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); MOV64xw(x5, i64); emit_sbb32(dyn, ninst, rex, ed, x5, x3, x4); } else { @@ -1356,7 +1356,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin SETFLAGS(X_ALL, SF_SET_PENDING); if(MODREG) { if(opcode==0x81) i64 = F32S; else i64 = F8S; - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); MOV64xw(x5, i64); emit_and32(dyn, ninst, rex, ed, x5, x3, x4); } else { @@ -1387,7 +1387,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin SETFLAGS(X_ALL, SF_SET_PENDING); if(MODREG) { if(opcode==0x81) i64 = F32S; else i64 = F8S; - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); MOV64xw(x5, i64); emit_sub32(dyn, ninst, rex, ed, x5, x3, x4); } else { @@ -1441,7 +1441,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin SETFLAGS(X_ALL, SF_SET_PENDING); if(MODREG) { if(opcode==0x81) i64 = F32S; else i64 = F8S; - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); MOV64xw(x5, i64); emit_xor32(dyn, ninst, rex, ed, x5, x3, x4); } else { @@ -1488,12 +1488,12 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin if(MODREG) { GETGB(x4); if(rex.rex) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); eb1 = ed; eb2 = 0; } else { ed = (nextop&7); - eb1 = xRAX+(ed&3); + eb1 = TO_NAT(ed & 3); eb2 = ((ed&4)<<1); } UBFXw(x1, eb1, eb2, 8); @@ -1672,7 +1672,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin INST_NAME("LOCK INC Ed"); SETFLAGS(X_ALL&~X_CF, SF_SUBSET); if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); emit_inc32(dyn, ninst, rex, ed, x3, x4); } else { addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, LOCK_LOCK, 0, 0); @@ -1720,7 +1720,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin INST_NAME("LOCK DEC Ed"); SETFLAGS(X_ALL&~X_CF, SF_SUBSET); if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); emit_dec32(dyn, ninst, rex, ed, x3, x4); } else { addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, LOCK_LOCK, 0, 0); diff --git a/src/dynarec/arm64/dynarec_arm64_helper.c b/src/dynarec/arm64/dynarec_arm64_helper.c index 37f6de8e..3833644e 100644 --- a/src/dynarec/arm64/dynarec_arm64_helper.c +++ b/src/dynarec/arm64/dynarec_arm64_helper.c @@ -59,12 +59,12 @@ uintptr_t geted(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, u if (sib_reg!=4) { if(tmp && ((!((tmp>=absmin) && (tmp<=absmax) && !(tmp&mask))) || !(unscaled && (tmp>-256) && (tmp<256)))) { MOV64x(scratch, tmp); - ADDx_REG_LSL(ret, scratch, xRAX+sib_reg, (sib>>6)); + ADDx_REG_LSL(ret, scratch, TO_NAT(sib_reg), (sib>>6)); } else { if(sib>>6) { - LSLx(ret, xRAX+sib_reg, (sib>>6)); + LSLx(ret, TO_NAT(sib_reg), (sib>>6)); } else - ret = xRAX+sib_reg; + ret = TO_NAT(sib_reg); if(unscaled && (tmp>-256) && (tmp<256)) *unscaled = 1; *fixaddress = tmp; @@ -78,9 +78,9 @@ uintptr_t geted(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, u } } else { if (sib_reg!=4) { - ADDx_REG_LSL(ret, xRAX+(sib&0x7)+(rex.b<<3), xRAX+sib_reg, (sib>>6)); + ADDx_REG_LSL(ret, TO_NAT((sib&0x7)+(rex.b<<3)), TO_NAT(sib_reg), (sib>>6)); } else { - ret = xRAX+(sib&0x7)+(rex.b<<3); + ret = TO_NAT((sib&0x7)+(rex.b<<3)); } } } else if((nextop&7)==5) { @@ -112,7 +112,7 @@ uintptr_t geted(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, u case 2: if(isLockAddress(addr+delta+tmp)) *l=1; break; } } else { - ret = xRAX+(nextop&7)+(rex.b<<3); + ret = TO_NAT((nextop & 7) + (rex.b << 3)); } } else { int64_t i64; @@ -132,24 +132,24 @@ uintptr_t geted(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, u *unscaled = 1; if((nextop&7)==4) { if (sib_reg!=4) { - ADDx_REG_LSL(ret, xRAX+(sib&0x07)+(rex.b<<3), xRAX+sib_reg, (sib>>6)); + ADDx_REG_LSL(ret, TO_NAT((sib&0x07)+(rex.b<<3)), TO_NAT(sib_reg), (sib>>6)); } else { - ret = xRAX+(sib&0x07)+(rex.b<<3); + ret = TO_NAT((sib&0x07)+(rex.b<<3)); } } else - ret = xRAX+(nextop&0x07)+(rex.b<<3); + ret = TO_NAT((nextop & 0x07) + (rex.b << 3)); } else { int64_t sub = (i64<0)?1:0; if(sub) i64 = -i64; if(i64<0x1000) { if((nextop&7)==4) { if (sib_reg!=4) { - ADDx_REG_LSL(scratch, xRAX+(sib&0x07)+(rex.b<<3), xRAX+sib_reg, (sib>>6)); + ADDx_REG_LSL(scratch, TO_NAT((sib&0x07)+(rex.b<<3)), TO_NAT(sib_reg), (sib>>6)); } else { - scratch = xRAX+(sib&0x07)+(rex.b<<3); + scratch = TO_NAT((sib&0x07)+(rex.b<<3)); } } else - scratch = xRAX+(nextop&0x07)+(rex.b<<3); + scratch = TO_NAT((nextop & 0x07) + (rex.b << 3)); if(sub) { SUBx_U12(ret, scratch, i64); } else { @@ -160,13 +160,13 @@ uintptr_t geted(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, u if((nextop&7)==4) { if (sib_reg!=4) { if(sub) { - SUBx_REG(scratch, xRAX+(sib&0x07)+(rex.b<<3), scratch); + SUBx_REG(scratch, TO_NAT((sib&0x07)+(rex.b<<3)), scratch); } else { - ADDx_REG(scratch, scratch, xRAX+(sib&0x07)+(rex.b<<3)); + ADDx_REG(scratch, scratch, TO_NAT((sib&0x07)+(rex.b<<3))); } - ADDx_REG_LSL(ret, scratch, xRAX+sib_reg, (sib>>6)); + ADDx_REG_LSL(ret, scratch, TO_NAT(sib_reg), (sib>>6)); } else { - PASS3(int tmp = xRAX+(sib&0x07)+(rex.b<<3)); + PASS3(int tmp = TO_NAT(sib & 0x07) + (rex.b << 3)); if(sub) { SUBx_REG(ret, tmp, scratch); } else { @@ -174,7 +174,7 @@ uintptr_t geted(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, u } } } else { - PASS3(int tmp = xRAX+(nextop&0x07)+(rex.b<<3)); + PASS3(int tmp = TO_NAT((nextop & 0x07) + (rex.b << 3))); if(sub) { SUBx_REG(ret, tmp, scratch); } else { @@ -214,9 +214,9 @@ static uintptr_t geted_32(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t if (sib_reg!=4) { if(tmp && ((!((tmp>=absmin) && (tmp<=absmax) && !(tmp&mask))) || !(unscaled && (tmp>-256) && (tmp<256)))) { MOV32w(scratch, tmp); - ADDw_REG_LSL(ret, scratch, xRAX+sib_reg, (sib>>6)); + ADDw_REG_LSL(ret, scratch, TO_NAT(sib_reg), (sib >> 6)); } else { - LSLw(ret, xRAX+sib_reg, (sib>>6)); + LSLw(ret, TO_NAT(sib_reg), (sib >> 6)); *fixaddress = tmp; if(unscaled && (tmp>-256) && (tmp<256)) *unscaled = 1; @@ -230,9 +230,9 @@ static uintptr_t geted_32(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t } } else { if (sib_reg!=4) { - ADDw_REG_LSL(ret, xRAX+(sib&0x7), xRAX+sib_reg, (sib>>6)); + ADDw_REG_LSL(ret, TO_NAT(sib & 0x7), TO_NAT(sib_reg), (sib >> 6)); } else { - ret = xRAX+(sib&0x7); + ret = TO_NAT(sib & 0x7); } } } else if((nextop&7)==5) { @@ -243,7 +243,7 @@ static uintptr_t geted_32(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t case 2: if(isLockAddress(tmp)) *l=1; break; } } else { - ret = xRAX+(nextop&7); + ret = TO_NAT(nextop & 7); if(ret==hint) { MOVw_REG(hint, ret); //to clear upper part } @@ -266,12 +266,12 @@ static uintptr_t geted_32(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t *unscaled = 1; if((nextop&7)==4) { if (sib_reg!=4) { - ADDw_REG_LSL(ret, xRAX+(sib&0x07), xRAX+sib_reg, (sib>>6)); + ADDw_REG_LSL(ret, TO_NAT(sib & 0x07), TO_NAT(sib_reg), (sib >> 6)); } else { - ret = xRAX+(sib&0x07); + ret = TO_NAT(sib & 0x07); } } else { - ret = xRAX+(nextop&0x07); + ret = TO_NAT(nextop & 0x07); } } else { int64_t sub = (i32<0)?1:0; @@ -279,12 +279,12 @@ static uintptr_t geted_32(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t if(i32<0x1000) { if((nextop&7)==4) { if (sib_reg!=4) { - ADDw_REG_LSL(scratch, xRAX+(sib&0x07), xRAX+sib_reg, (sib>>6)); + ADDw_REG_LSL(scratch, TO_NAT(sib & 0x07), TO_NAT(sib_reg), (sib >> 6)); } else { - scratch = xRAX+(sib&0x07); + scratch = TO_NAT(sib & 0x07); } } else - scratch = xRAX+(nextop&0x07); + scratch = TO_NAT(nextop & 0x07); if(sub) { SUBw_U12(ret, scratch, i32); } else { @@ -295,13 +295,13 @@ static uintptr_t geted_32(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t if((nextop&7)==4) { if (sib_reg!=4) { if(sub) { - SUBw_REG(scratch, xRAX+(sib&0x07), scratch); + SUBw_REG(scratch, TO_NAT(sib & 0x07), scratch); } else { - ADDw_REG(scratch, scratch, xRAX+(sib&0x07)); + ADDw_REG(scratch, scratch, TO_NAT(sib & 0x07)); } - ADDw_REG_LSL(ret, scratch, xRAX+sib_reg, (sib>>6)); + ADDw_REG_LSL(ret, scratch, TO_NAT(sib_reg), (sib >> 6)); } else { - PASS3(int tmp = xRAX+(sib&0x07)); + PASS3(int tmp = TO_NAT(sib & 0x07)); if(sub) { SUBw_REG(ret, tmp, scratch); } else { @@ -309,7 +309,7 @@ static uintptr_t geted_32(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t } } } else { - PASS3(int tmp = xRAX+(nextop&0x07)); + PASS3(int tmp = TO_NAT(nextop & 0x07)); if(sub) { SUBw_REG(ret, tmp, scratch); } else { @@ -350,9 +350,9 @@ uintptr_t geted32(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, if (sib_reg!=4) { if(tmp && ((!((tmp>=absmin) && (tmp<=absmax) && !(tmp&mask))) || !(unscaled && (tmp>-256) && (tmp<256)))) { MOV64x(scratch, tmp); - ADDw_REG_LSL(ret, scratch, xRAX+sib_reg, (sib>>6)); + ADDw_REG_LSL(ret, scratch, TO_NAT(sib_reg), (sib >> 6)); } else { - LSLw(ret, xRAX+sib_reg, (sib>>6)); + LSLw(ret, TO_NAT(sib_reg), (sib >> 6)); *fixaddress = tmp; if(unscaled && (tmp>-256) && (tmp<256)) *unscaled = 1; @@ -366,9 +366,9 @@ uintptr_t geted32(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, } } else { if (sib_reg!=4) { - ADDw_REG_LSL(ret, xRAX+(sib&0x7)+(rex.b<<3), xRAX+sib_reg, (sib>>6)); + ADDw_REG_LSL(ret, TO_NAT((sib & 0x7) + (rex.b << 3)), TO_NAT(sib_reg), (sib >> 6)); } else { - ret = xRAX+(sib&0x7)+(rex.b<<3); + ret = TO_NAT((sib & 0x7)) + (rex.b << 3); } } } else if((nextop&7)==5) { @@ -381,7 +381,7 @@ uintptr_t geted32(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, case 2: if(isLockAddress(addr+delta+tmp)) *l=1; break; } } else { - ret = xRAX+(nextop&7)+(rex.b<<3); + ret = TO_NAT((nextop & 7) + (rex.b << 3)); if(ret==hint) { MOVw_REG(hint, ret); //to clear upper part } @@ -404,12 +404,12 @@ uintptr_t geted32(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, *unscaled = 1; if((nextop&7)==4) { if (sib_reg!=4) { - ADDw_REG_LSL(ret, xRAX+(sib&0x07)+(rex.b<<3), xRAX+sib_reg, (sib>>6)); + ADDw_REG_LSL(ret, TO_NAT((sib & 0x07) + (rex.b << 3)), TO_NAT(sib_reg), (sib >> 6)); } else { - ret = xRAX+(sib&0x07)+(rex.b<<3); + ret = TO_NAT((sib & 0x07) + (rex.b << 3)); } } else { - ret = xRAX+(nextop&0x07)+(rex.b<<3); + ret = TO_NAT((nextop & 0x07) + (rex.b << 3)); } } else { int64_t sub = (i64<0)?1:0; @@ -417,12 +417,12 @@ uintptr_t geted32(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, if(i64<0x1000) { if((nextop&7)==4) { if (sib_reg!=4) { - ADDw_REG_LSL(scratch, xRAX+(sib&0x07)+(rex.b<<3), xRAX+sib_reg, (sib>>6)); + ADDw_REG_LSL(scratch, TO_NAT((sib & 0x07) + (rex.b << 3)), TO_NAT(sib_reg), (sib >> 6)); } else { - scratch = xRAX+(sib&0x07)+(rex.b<<3); + scratch = TO_NAT((sib & 0x07) + (rex.b << 3)); } } else - scratch = xRAX+(nextop&0x07)+(rex.b<<3); + scratch = TO_NAT((nextop & 0x07) + (rex.b << 3)); if(sub) { SUBw_U12(ret, scratch, i64); } else { @@ -433,13 +433,13 @@ uintptr_t geted32(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, if((nextop&7)==4) { if (sib_reg!=4) { if(sub) { - SUBw_REG(scratch, xRAX+(sib&0x07)+(rex.b<<3), scratch); + SUBw_REG(scratch, TO_NAT((sib & 0x07) + (rex.b << 3)), scratch); } else { - ADDw_REG(scratch, scratch, xRAX+(sib&0x07)+(rex.b<<3)); + ADDw_REG(scratch, scratch, TO_NAT((sib & 0x07) + (rex.b << 3))); } - ADDw_REG_LSL(ret, scratch, xRAX+sib_reg, (sib>>6)); + ADDw_REG_LSL(ret, scratch, TO_NAT(sib_reg), (sib >> 6)); } else { - PASS3(int tmp = xRAX+(sib&0x07)+(rex.b<<3)); + PASS3(int tmp = TO_NAT((sib & 0x07) + (rex.b << 3))); if(sub) { SUBw_REG(ret, tmp, scratch); } else { @@ -447,7 +447,7 @@ uintptr_t geted32(dynarec_arm_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, } } } else { - PASS3(int tmp = xRAX+(nextop&0x07)+(rex.b<<3)); + PASS3(int tmp = TO_NAT((nextop & 0x07) + (rex.b << 3))); if(sub) { SUBw_REG(ret, tmp, scratch); } else { diff --git a/src/dynarec/arm64/dynarec_arm64_helper.h b/src/dynarec/arm64/dynarec_arm64_helper.h index 77cedbf1..3edbec98 100644 --- a/src/dynarec/arm64/dynarec_arm64_helper.h +++ b/src/dynarec/arm64/dynarec_arm64_helper.h @@ -40,37 +40,40 @@ #define LOCK_LOCK (int*)1 // GETGD get x64 register in gd -#define GETGD gd = xRAX+((nextop&0x38)>>3)+(rex.r<<3) +#define GETGD gd = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)) // GETVD get x64 register in vd -#define GETVD vd = xRAX+vex.v +#define GETVD vd = TO_NAT(vex.v) //GETED can use r1 for ed, and r2 for wback. wback is 0 if ed is xEAX..xEDI -#define GETED(D) if(MODREG) { \ - ed = xRAX+(nextop&7)+(rex.b<<3); \ - wback = 0; \ - } else { \ - SMREAD(); \ - addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, NULL, 0, D); \ - LDxw(x1, wback, fixedaddress); \ - ed = x1; \ - } -#define GETEDx(D) if(MODREG) { \ - ed = xRAX+(nextop&7)+(rex.b<<3); \ - wback = 0; \ - } else { \ - SMREAD(); \ - addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, D); \ - LDx(x1, wback, fixedaddress); \ - ed = x1; \ - } -#define GETEDz(D) if(MODREG) { \ - ed = xRAX+(nextop&7)+(rex.b<<3); \ - wback = 0; \ - } else { \ - SMREAD(); \ - addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff<<(3-rex.is32bits), rex.is32bits?3:7, rex, NULL, 0, D); \ - LDz(x1, wback, fixedaddress); \ - ed = x1; \ - } +#define GETED(D) \ + if (MODREG) { \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ + wback = 0; \ + } else { \ + SMREAD(); \ + addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff << (2 + rex.w), (1 << (2 + rex.w)) - 1, rex, NULL, 0, D); \ + LDxw(x1, wback, fixedaddress); \ + ed = x1; \ + } +#define GETEDx(D) \ + if (MODREG) { \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ + wback = 0; \ + } else { \ + SMREAD(); \ + addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff << 3, 7, rex, NULL, 0, D); \ + LDx(x1, wback, fixedaddress); \ + ed = x1; \ + } +#define GETEDz(D) \ + if (MODREG) { \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ + wback = 0; \ + } else { \ + SMREAD(); \ + addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff << (3 - rex.is32bits), rex.is32bits ? 3 : 7, rex, NULL, 0, D); \ + LDz(x1, wback, fixedaddress); \ + ed = x1; \ + } #define GETEDw(D) if((nextop&0xC0)==0xC0) { \ ed = xEAX+(nextop&7)+(rex.b<<3); \ wback = 0; \ @@ -80,77 +83,84 @@ LDW(x1, wback, fixedaddress); \ ed = x1; \ } -#define GETSEDw(D) if((nextop&0xC0)==0xC0) { \ - ed = xRAX+(nextop&7)+(rex.b<<3); \ - SXTWx(x1, ed); \ - wb = x1; \ - wback = 0; \ - } else { \ - SMREAD(); \ - addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, D); \ - LDSW(x1, wback, fixedaddress); \ - wb = ed = x1; \ - } -#define GETED32(D) if(MODREG) { \ - ed = xRAX+(nextop&7)+(rex.b<<3); \ - wback = 0; \ - } else { \ - SMREAD(); \ - addr = geted32(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, NULL, 0, D); \ - LDxw(x1, wback, fixedaddress); \ - ed = x1; \ - } -#define GETSED32w(D) if((nextop&0xC0)==0xC0) { \ - ed = xRAX+(nextop&7)+(rex.b<<3); \ - SXTWx(x1, ed); \ - wb = x1; \ - wback = 0; \ - } else { \ - SMREAD(); \ - addr = geted32(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff<<2, 3, rex, NULL, 0, D); \ - LDSW(x1, wback, fixedaddress); \ - wb = ed = x1; \ - } +#define GETSEDw(D) \ + if ((nextop & 0xC0) == 0xC0) { \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ + SXTWx(x1, ed); \ + wb = x1; \ + wback = 0; \ + } else { \ + SMREAD(); \ + addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff << 2, 3, rex, NULL, 0, D); \ + LDSW(x1, wback, fixedaddress); \ + wb = ed = x1; \ + } +#define GETED32(D) \ + if (MODREG) { \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ + wback = 0; \ + } else { \ + SMREAD(); \ + addr = geted32(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff << (2 + rex.w), (1 << (2 + rex.w)) - 1, rex, NULL, 0, D); \ + LDxw(x1, wback, fixedaddress); \ + ed = x1; \ + } +#define GETSED32w(D) \ + if ((nextop & 0xC0) == 0xC0) { \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ + SXTWx(x1, ed); \ + wb = x1; \ + wback = 0; \ + } else { \ + SMREAD(); \ + addr = geted32(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, &unscaled, 0xfff << 2, 3, rex, NULL, 0, D); \ + LDSW(x1, wback, fixedaddress); \ + wb = ed = x1; \ + } //GETEDH can use hint for ed, and r1 or r2 for wback (depending on hint). wback is 0 if ed is xEAX..xEDI -#define GETEDH(hint, D) if(MODREG) { \ - ed = xRAX+(nextop&7)+(rex.b<<3); \ - wback = 0; \ - } else { \ - SMREAD(); \ - addr = geted(dyn, addr, ninst, nextop, &wback, (hint==x2)?x1:x2, &fixedaddress, &unscaled, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, NULL, 0, D); \ - LDxw(hint, wback, fixedaddress); \ - ed = hint; \ - } -#define GETED32H(hint, D) if(MODREG) { \ - ed = xRAX+(nextop&7)+(rex.b<<3); \ - wback = 0; \ - } else { \ - SMREAD(); \ - addr = geted32(dyn, addr, ninst, nextop, &wback, (hint==x2)?x1:x2, &fixedaddress, &unscaled, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, NULL, 0, D); \ - LDxw(hint, wback, fixedaddress); \ - ed = hint; \ - } +#define GETEDH(hint, D) \ + if (MODREG) { \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ + wback = 0; \ + } else { \ + SMREAD(); \ + addr = geted(dyn, addr, ninst, nextop, &wback, (hint == x2) ? x1 : x2, &fixedaddress, &unscaled, 0xfff << (2 + rex.w), (1 << (2 + rex.w)) - 1, rex, NULL, 0, D); \ + LDxw(hint, wback, fixedaddress); \ + ed = hint; \ + } +#define GETED32H(hint, D) \ + if (MODREG) { \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ + wback = 0; \ + } else { \ + SMREAD(); \ + addr = geted32(dyn, addr, ninst, nextop, &wback, (hint == x2) ? x1 : x2, &fixedaddress, &unscaled, 0xfff << (2 + rex.w), (1 << (2 + rex.w)) - 1, rex, NULL, 0, D); \ + LDxw(hint, wback, fixedaddress); \ + ed = hint; \ + } //GETEDW can use hint for wback and ret for ed. wback is 0 if ed is xEAX..xEDI -#define GETEDW(hint, ret, D) if(MODREG) { \ - ed = xRAX+(nextop&7)+(rex.b<<3); \ - MOVxw_REG(ret, ed); \ - wback = 0; \ - } else { \ - SMREAD(); \ - addr = geted(dyn, addr, ninst, nextop, &wback, hint, &fixedaddress, &unscaled, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, NULL, 0, D); \ - ed = ret; \ - LDxw(ed, wback, fixedaddress); \ - } -#define GETED32W(hint, ret, D) if(MODREG) { \ - ed = xRAX+(nextop&7)+(rex.b<<3); \ - MOVxw_REG(ret, ed); \ - wback = 0; \ - } else { \ - SMREAD(); \ - addr = geted32(dyn, addr, ninst, nextop, &wback, hint, &fixedaddress, &unscaled, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, NULL, 0, D); \ - ed = ret; \ - LDxw(ed, wback, fixedaddress); \ - } +#define GETEDW(hint, ret, D) \ + if (MODREG) { \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ + MOVxw_REG(ret, ed); \ + wback = 0; \ + } else { \ + SMREAD(); \ + addr = geted(dyn, addr, ninst, nextop, &wback, hint, &fixedaddress, &unscaled, 0xfff << (2 + rex.w), (1 << (2 + rex.w)) - 1, rex, NULL, 0, D); \ + ed = ret; \ + LDxw(ed, wback, fixedaddress); \ + } +#define GETED32W(hint, ret, D) \ + if (MODREG) { \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ + MOVxw_REG(ret, ed); \ + wback = 0; \ + } else { \ + SMREAD(); \ + addr = geted32(dyn, addr, ninst, nextop, &wback, hint, &fixedaddress, &unscaled, 0xfff << (2 + rex.w), (1 << (2 + rex.w)) - 1, rex, NULL, 0, D); \ + ed = ret; \ + LDxw(ed, wback, fixedaddress); \ + } // Write back ed in wback (if wback not 0) #define WBACK if(wback) {STxw(ed, wback, fixedaddress); SMWRITE();} // Write back ed in wback (if wback not 0) @@ -158,246 +168,271 @@ // Write back ed in wback (if wback not 0) #define WBACKw if(wback) {STW(ed, wback, fixedaddress); SMWRITE();} //GETEDO can use r1 for ed, and r2 for wback. wback is 0 if ed is xEAX..xEDI -#define GETEDO(O, D) if(MODREG) { \ - ed = xRAX+(nextop&7)+(rex.b<<3); \ - wback = 0; \ - } else { \ - SMREAD(); \ - addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, NULL, 0, D); \ - if(rex.is32bits) \ - LDRxw_REG_SXTW(x1, O, wback); \ - else \ - LDRxw_REG(x1, wback, O); \ - ed = x1; \ - } +#define GETEDO(O, D) \ + if (MODREG) { \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ + wback = 0; \ + } else { \ + SMREAD(); \ + addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, NULL, 0, D); \ + if (rex.is32bits) \ + LDRxw_REG_SXTW(x1, O, wback); \ + else \ + LDRxw_REG(x1, wback, O); \ + ed = x1; \ + } #define WBACKO(O) if(wback) {if(rex.is32bits) STRxw_REG_SXTW(ed, O, wback); else STRxw_REG(ed, wback, O); SMWRITE2();} //GETEDOx can use r1 for ed, and r2 for wback. wback is 0 if ed is xEAX..xEDI -#define GETEDOx(O, D) if(MODREG) { \ - ed = xRAX+(nextop&7)+(rex.b<<3); \ - wback = 0; \ - } else { \ - SMREAD(); \ - addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, NULL, 0, D); \ - if(rex.is32bits) \ - LDRx_REG_SXTW(x1, O, wback); \ - else \ - LDRx_REG(x1, wback, O); \ - ed = x1; \ - } +#define GETEDOx(O, D) \ + if (MODREG) { \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ + wback = 0; \ + } else { \ + SMREAD(); \ + addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, NULL, 0, D); \ + if (rex.is32bits) \ + LDRx_REG_SXTW(x1, O, wback); \ + else \ + LDRx_REG(x1, wback, O); \ + ed = x1; \ + } //GETEDOz can use r1 for ed, and r2 for wback. wback is 0 if ed is xEAX..xEDI -#define GETEDOz(O, D) if(MODREG) { \ - ed = xRAX+(nextop&7)+(rex.b<<3); \ - wback = 0; \ - } else { \ - SMREAD(); \ - addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, NULL, 0, D); \ - if(rex.is32bits) \ - LDRz_REG_SXTW(x1, O, wback); \ - else \ - LDRz_REG(x1, wback, O); \ - ed = x1; \ - } -#define GETSEDOw(O, D) if((nextop&0xC0)==0xC0) { \ - ed = xRAX+(nextop&7)+(rex.b<<3); \ - SXTWx(x1, ed); \ - wb = x1; \ - wback = 0; \ - } else { \ - SMREAD(); \ - addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, NULL, 0, D); \ - if(rex.is32bits) \ - LDRSW_REG_SXTW(x1, O, wback); \ - else \ - LDRSW_REG(x1, wback, O); \ - wb = ed = x1; \ - } +#define GETEDOz(O, D) \ + if (MODREG) { \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ + wback = 0; \ + } else { \ + SMREAD(); \ + addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, NULL, 0, D); \ + if (rex.is32bits) \ + LDRz_REG_SXTW(x1, O, wback); \ + else \ + LDRz_REG(x1, wback, O); \ + ed = x1; \ + } +#define GETSEDOw(O, D) \ + if ((nextop & 0xC0) == 0xC0) { \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ + SXTWx(x1, ed); \ + wb = x1; \ + wback = 0; \ + } else { \ + SMREAD(); \ + addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, NULL, 0, 0, rex, NULL, 0, D); \ + if (rex.is32bits) \ + LDRSW_REG_SXTW(x1, O, wback); \ + else \ + LDRSW_REG(x1, wback, O); \ + wb = ed = x1; \ + } //FAKEELike GETED, but doesn't get anything -#define FAKEED if(!MODREG) { \ - addr = fakeed(dyn, addr, ninst, nextop); \ - } +#define FAKEED \ + if (!MODREG) { \ + addr = fakeed(dyn, addr, ninst, nextop); \ + } + // GETGW extract x64 register in gd, that is i -#define GETGW(i) gd = xRAX+((nextop&0x38)>>3)+(rex.r<<3); UXTHw(i, gd); gd = i; +#define GETGW(i) \ + gd = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)); \ + UXTHw(i, gd); \ + gd = i; + // GETGW extract x64 register in gd, that is i, Signed extented -#define GETSGW(i) gd = xRAX+((nextop&0x38)>>3)+(rex.r<<3); SXTHw(i, gd); gd = i; +#define GETSGW(i) \ + gd = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)); \ + SXTHw(i, gd); \ + gd = i; + //GETEWW will use i for ed, and can use w for wback. -#define GETEWW(w, i, D) if(MODREG) { \ - wback = xRAX+(nextop&7)+(rex.b<<3);\ - UXTHw(i, wback); \ - ed = i; \ - wb1 = 0; \ - } else { \ - SMREAD(); \ - addr = geted(dyn, addr, ninst, nextop, &wback, w, &fixedaddress, &unscaled, 0xfff<<1, (1<<1)-1, rex, NULL, 0, D); \ - LDH(i, wback, fixedaddress);\ - ed = i; \ - wb1 = 1; \ - } +#define GETEWW(w, i, D) \ + if (MODREG) { \ + wback = TO_NAT((nextop & 7) + (rex.b << 3)); \ + UXTHw(i, wback); \ + ed = i; \ + wb1 = 0; \ + } else { \ + SMREAD(); \ + addr = geted(dyn, addr, ninst, nextop, &wback, w, &fixedaddress, &unscaled, 0xfff << 1, (1 << 1) - 1, rex, NULL, 0, D); \ + LDH(i, wback, fixedaddress); \ + ed = i; \ + wb1 = 1; \ + } //GETEW will use i for ed, and can use r3 for wback. -#define GETEW(i, D) if(MODREG) { \ - wback = xRAX+(nextop&7)+(rex.b<<3);\ - UXTHw(i, wback); \ - ed = i; \ - wb1 = 0; \ - } else { \ - SMREAD(); \ - addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff<<1, (1<<1)-1, rex, NULL, 0, D); \ - LDH(i, wback, fixedaddress); \ - ed = i; \ - wb1 = 1; \ - } +#define GETEW(i, D) \ + if (MODREG) { \ + wback = TO_NAT((nextop & 7) + (rex.b << 3)); \ + UXTHw(i, wback); \ + ed = i; \ + wb1 = 0; \ + } else { \ + SMREAD(); \ + addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff << 1, (1 << 1) - 1, rex, NULL, 0, D); \ + LDH(i, wback, fixedaddress); \ + ed = i; \ + wb1 = 1; \ + } //GETEW will use i for ed, and can use r3 for wback. -#define GETEW32(i, D) if(MODREG) { \ - wback = xRAX+(nextop&7)+(rex.b<<3);\ - UXTHw(i, wback); \ - ed = i; \ - wb1 = 0; \ - } else { \ - SMREAD(); \ - addr = geted32(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff<<1, (1<<1)-1, rex, NULL, 0, D); \ - LDH(i, wback, fixedaddress); \ - ed = i; \ - wb1 = 1; \ - } +#define GETEW32(i, D) \ + if (MODREG) { \ + wback = TO_NAT((nextop & 7) + (rex.b << 3)); \ + UXTHw(i, wback); \ + ed = i; \ + wb1 = 0; \ + } else { \ + SMREAD(); \ + addr = geted32(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff << 1, (1 << 1) - 1, rex, NULL, 0, D); \ + LDH(i, wback, fixedaddress); \ + ed = i; \ + wb1 = 1; \ + } //GETEWO will use i for ed, i is also Offset, and can use r3 for wback. -#define GETEWO(i, D) if(MODREG) { \ - wback = xRAX+(nextop&7)+(rex.b<<3);\ - UXTHw(i, wback); \ - ed = i; \ - wb1 = 0; \ - } else { \ - SMREAD(); \ - addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff<<1, (1<<1)-1, rex, NULL, 0, D); \ - ADDz_REG(x3, wback, i); \ - if(wback!=x3) wback = x3; \ - LDH(i, wback, fixedaddress);\ - wb1 = 1; \ - ed = i; \ - } +#define GETEWO(i, D) \ + if (MODREG) { \ + wback = TO_NAT((nextop & 7) + (rex.b << 3)); \ + UXTHw(i, wback); \ + ed = i; \ + wb1 = 0; \ + } else { \ + SMREAD(); \ + addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff << 1, (1 << 1) - 1, rex, NULL, 0, D); \ + ADDz_REG(x3, wback, i); \ + if (wback != x3) wback = x3; \ + LDH(i, wback, fixedaddress); \ + wb1 = 1; \ + ed = i; \ + } //GETSEW will use i for ed, and can use r3 for wback. This is the Signed version -#define GETSEW(i, D) if(MODREG) { \ - wback = xRAX+(nextop&7)+(rex.b<<3);\ - SXTHw(i, wback); \ - ed = i; \ - wb1 = 0; \ - } else { \ - SMREAD(); \ - addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff<<1, (1<<1)-1, rex, NULL, 0, D); \ - LDSHw(i, wback, fixedaddress); \ - ed = i; \ - wb1 = 1; \ - } +#define GETSEW(i, D) \ + if (MODREG) { \ + wback = TO_NAT((nextop & 7) + (rex.b << 3)); \ + SXTHw(i, wback); \ + ed = i; \ + wb1 = 0; \ + } else { \ + SMREAD(); \ + addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff << 1, (1 << 1) - 1, rex, NULL, 0, D); \ + LDSHw(i, wback, fixedaddress); \ + ed = i; \ + wb1 = 1; \ + } // Write ed back to original register / memory #define EWBACK EWBACKW(ed) // Write w back to original register / memory #define EWBACKW(w) if(wb1) {STH(w, wback, fixedaddress); SMWRITE();} else {BFIx(wback, w, 0, 16);} // Write back gd in correct register -#define GWBACK BFIx((xRAX+((nextop&0x38)>>3)+(rex.r<<3)), gd, 0, 16); +#define GWBACK BFIx(TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)), gd, 0, 16); //GETEB will use i for ed, and can use r3 for wback. -#define GETEB(i, D) if(MODREG) { \ - if(rex.rex) { \ - wback = xRAX+(nextop&7)+(rex.b<<3); \ - wb2 = 0; \ - } else { \ - wback = (nextop&7); \ - wb2 = (wback>>2)*8; \ - wback = xRAX+(wback&3); \ - } \ - UBFXx(i, wback, wb2, 8); \ - wb1 = 0; \ - ed = i; \ - } else { \ - SMREAD(); \ - addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff, 0, rex, NULL, 0, D); \ - LDB(i, wback, fixedaddress);\ - wb1 = 1; \ - ed = i; \ - } +#define GETEB(i, D) \ + if (MODREG) { \ + if (rex.rex) { \ + wback = TO_NAT((nextop & 7) + (rex.b << 3)); \ + wb2 = 0; \ + } else { \ + wback = (nextop & 7); \ + wb2 = (wback >> 2) * 8; \ + wback = TO_NAT(wback & 3); \ + } \ + UBFXx(i, wback, wb2, 8); \ + wb1 = 0; \ + ed = i; \ + } else { \ + SMREAD(); \ + addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff, 0, rex, NULL, 0, D); \ + LDB(i, wback, fixedaddress); \ + wb1 = 1; \ + ed = i; \ + } //GETEBO will use i for ed, i is also Offset, and can use r3 for wback. -#define GETEBO(i, D) if(MODREG) { \ - if(rex.rex) { \ - wback = xRAX+(nextop&7)+(rex.b<<3); \ - wb2 = 0; \ - } else { \ - wback = (nextop&7); \ - wb2 = (wback>>2)*8; \ - wback = xRAX+(wback&3); \ - } \ - UBFXx(i, wback, wb2, 8); \ - wb1 = 0; \ - ed = i; \ - } else { \ - SMREAD(); \ - addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff, 0, rex, NULL, 0, D); \ - ADDz_REG(x3, wback, i); \ - if(wback!=x3) wback = x3; \ - LDB(i, wback, fixedaddress);\ - wb1 = 1; \ - ed = i; \ - } +#define GETEBO(i, D) \ + if (MODREG) { \ + if (rex.rex) { \ + wback = TO_NAT((nextop & 7) + (rex.b << 3)); \ + wb2 = 0; \ + } else { \ + wback = (nextop & 7); \ + wb2 = (wback >> 2) * 8; \ + wback = TO_NAT(wback & 3); \ + } \ + UBFXx(i, wback, wb2, 8); \ + wb1 = 0; \ + ed = i; \ + } else { \ + SMREAD(); \ + addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff, 0, rex, NULL, 0, D); \ + ADDz_REG(x3, wback, i); \ + if (wback != x3) wback = x3; \ + LDB(i, wback, fixedaddress); \ + wb1 = 1; \ + ed = i; \ + } //GETSEB sign extend EB, will use i for ed, and can use r3 for wback. -#define GETSEB(i, D) if(MODREG) { \ - if(rex.rex) { \ - wback = xRAX+(nextop&7)+(rex.b<<3); \ - wb2 = 0; \ - } else { \ - wback = (nextop&7); \ - wb2 = (wback>>2)*8; \ - wback = xRAX+(wback&3); \ - } \ - SBFXx(i, wback, wb2, 8); \ - wb1 = 0; \ - ed = i; \ - } else { \ - SMREAD(); \ - addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff, 0, rex, NULL, 0, D); \ - LDSBx(i, wback, fixedaddress); \ - wb1 = 1; \ - ed = i; \ - } +#define GETSEB(i, D) \ + if (MODREG) { \ + if (rex.rex) { \ + wback = TO_NAT((nextop & 7) + (rex.b << 3)); \ + wb2 = 0; \ + } else { \ + wback = (nextop & 7); \ + wb2 = (wback >> 2) * 8; \ + wback = TO_NAT(wback & 3); \ + } \ + SBFXx(i, wback, wb2, 8); \ + wb1 = 0; \ + ed = i; \ + } else { \ + SMREAD(); \ + addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff, 0, rex, NULL, 0, D); \ + LDSBx(i, wback, fixedaddress); \ + wb1 = 1; \ + ed = i; \ + } //GETEB will use i for ed, and can use r3 for wback. -#define GETEB32(i, D) if(MODREG) { \ - if(rex.rex) { \ - wback = xRAX+(nextop&7)+(rex.b<<3); \ - wb2 = 0; \ - } else { \ - wback = (nextop&7); \ - wb2 = (wback>>2)*8; \ - wback = xRAX+(wback&3); \ - } \ - UBFXx(i, wback, wb2, 8); \ - wb1 = 0; \ - ed = i; \ - } else { \ - SMREAD(); \ - addr = geted32(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff, 0, rex, NULL, 0, D); \ - LDB(i, wback, fixedaddress);\ - wb1 = 1; \ - ed = i; \ - } +#define GETEB32(i, D) \ + if (MODREG) { \ + if (rex.rex) { \ + wback = TO_NAT((nextop & 7) + (rex.b << 3)); \ + wb2 = 0; \ + } else { \ + wback = (nextop & 7); \ + wb2 = (wback >> 2) * 8; \ + wback = TO_NAT(wback & 3); \ + } \ + UBFXx(i, wback, wb2, 8); \ + wb1 = 0; \ + ed = i; \ + } else { \ + SMREAD(); \ + addr = geted32(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, &unscaled, 0xfff, 0, rex, NULL, 0, D); \ + LDB(i, wback, fixedaddress); \ + wb1 = 1; \ + ed = i; \ + } // Write eb (ed) back to original register / memory #define EBBACK if(wb1) {STB(ed, wback, fixedaddress); SMWRITE();} else {BFIx(wback, ed, wb2, 8);} //GETGB will use i for gd -#define GETGB(i) if(rex.rex) { \ - gb1 = xRAX+((nextop&0x38)>>3)+(rex.r<<3); \ - gb2 = 0; \ - } else { \ - gd = (nextop&0x38)>>3; \ - gb2 = ((gd&4)<<1); \ - gb1 = xRAX+(gd&3); \ - } \ - gd = i; \ - UBFXx(gd, gb1, gb2, 8); +#define GETGB(i) \ + if (rex.rex) { \ + gb1 = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)); \ + gb2 = 0; \ + } else { \ + gd = (nextop & 0x38) >> 3; \ + gb2 = ((gd & 4) << 1); \ + gb1 = TO_NAT(gd & 3); \ + } \ + gd = i; \ + UBFXx(gd, gb1, gb2, 8); //GETSGB sign extend GB, will use i for gd -#define GETSGB(i) if(rex.rex) { \ - gb1 = xRAX+((nextop&0x38)>>3)+(rex.r<<3); \ - gb2 = 0; \ - } else { \ - gd = (nextop&0x38)>>3; \ - gb2 = ((gd&4)<<1); \ - gb1 = xRAX+(gd&3); \ - } \ - gd = i; \ - SBFXx(gd, gb1, gb2, 8); +#define GETSGB(i) \ + if (rex.rex) { \ + gb1 = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)); \ + gb2 = 0; \ + } else { \ + gd = (nextop & 0x38) >> 3; \ + gb2 = ((gd & 4) << 1); \ + gb1 = TO_NAT(gd & 3); \ + } \ + gd = i; \ + SBFXx(gd, gb1, gb2, 8); // Write gb (gd) back to original register / memory #define GBBACK BFIx(gb1, gd, gb2, 8); @@ -591,10 +626,10 @@ } // Put Back EX if it was a memory and not an emm register -#define PUTEX(a) \ - if(!MODREG) { \ - VST128(a, ed, fixedaddress); \ - SMWRITE2(); \ +#define PUTEX(a) \ + if (!MODREG) { \ + VST128(a, ed, fixedaddress); \ + SMWRITE2(); \ } @@ -610,7 +645,7 @@ } // Get Ex as 64bits, not a quad (warning, x1 get used) -#define GETEX64(a, w, D) GETEXSD(a, w, D) +#define GETEX64(a, w, D) GETEXSD(a, w, D) // Get Ex as a single, not a quad (warning, x1 get used) #define GETEXSS(a, w, D) \ @@ -638,8 +673,8 @@ } // Get GM, might use x1, x2 and x3 -#define GETGM(a) \ - gd = ((nextop&0x38)>>3); \ +#define GETGM(a) \ + gd = ((nextop & 0x38) >> 3); \ a = mmx_get_reg(dyn, ninst, x1, x2, x3, gd) // Get EM, might use x1, x2 and x3 @@ -654,10 +689,10 @@ } // Put Back EM if it was a memory and not an emm register -#define PUTEM(a) \ - if(!MODREG) { \ - VST64(a, ed, fixedaddress); \ - SMWRITE2(); \ +#define PUTEM(a) \ + if (!MODREG) { \ + VST64(a, ed, fixedaddress); \ + SMWRITE2(); \ } #define YMM0(a) ymm_mark_zero(dyn, ninst, a); diff --git a/src/dynarec/la64/dynarec_la64_00.c b/src/dynarec/la64/dynarec_la64_00.c index f571e4e9..67891c7b 100644 --- a/src/dynarec/la64/dynarec_la64_00.c +++ b/src/dynarec/la64/dynarec_la64_00.c @@ -492,7 +492,7 @@ uintptr_t dynarec64_00(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0x47: INST_NAME("INC Reg (32bits)"); SETFLAGS(X_ALL & ~X_CF, SF_SUBSET_PENDING); - gd = TO_LA64(opcode & 7); + gd = TO_NAT(opcode & 7); emit_inc32(dyn, ninst, rex, gd, x1, x2, x3, x4); break; case 0x48: @@ -505,7 +505,7 @@ uintptr_t dynarec64_00(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0x4F: INST_NAME("DEC Reg (32bits)"); SETFLAGS(X_ALL & ~X_CF, SF_SUBSET_PENDING); - gd = TO_LA64(opcode & 7); + gd = TO_NAT(opcode & 7); emit_dec32(dyn, ninst, rex, gd, x1, x2, x3, x4); break; case 0x50: @@ -517,7 +517,7 @@ uintptr_t dynarec64_00(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0x56: case 0x57: INST_NAME("PUSH reg"); - gd = TO_LA64((opcode & 0x07) + (rex.b << 3)); + gd = TO_NAT((opcode & 0x07) + (rex.b << 3)); PUSH1z(gd); break; case 0x58: @@ -529,7 +529,7 @@ uintptr_t dynarec64_00(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0x5E: case 0x5F: INST_NAME("POP reg"); - gd = TO_LA64((opcode & 0x07) + (rex.b << 3)); + gd = TO_NAT((opcode & 0x07) + (rex.b << 3)); POP1z(gd); break; break; @@ -543,7 +543,7 @@ uintptr_t dynarec64_00(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni GETGD; if (rex.w) { if (MODREG) { // reg <= reg - ADDI_W(gd, TO_LA64((nextop & 7) + (rex.b << 3)), 0); + ADDI_W(gd, TO_NAT((nextop & 7) + (rex.b << 3)), 0); } else { // mem <= reg SMREAD(); addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, NULL, 1, 0); @@ -551,7 +551,7 @@ uintptr_t dynarec64_00(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni } } else { if (MODREG) { // reg <= reg - ZEROUP2(gd, TO_LA64((nextop & 7) + (rex.b << 3))); + ZEROUP2(gd, TO_NAT((nextop & 7) + (rex.b << 3))); } else { // mem <= reg SMREAD(); addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, NULL, 1, 0); @@ -1038,10 +1038,10 @@ uintptr_t dynarec64_00(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni gd = ((nextop & 0x38) >> 3) + (rex.r << 3); if (rex.rex) { gb2 = 0; - gb1 = TO_LA64(gd); + gb1 = TO_NAT(gd); } else { gb2 = ((gd & 4) << 1); - gb1 = TO_LA64(gd & 3); + gb1 = TO_NAT(gd & 3); } if (gb2) { gd = x4; @@ -1052,10 +1052,10 @@ uintptr_t dynarec64_00(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni if (MODREG) { ed = (nextop & 7) + (rex.b << 3); if (rex.rex) { - eb1 = TO_LA64(ed); + eb1 = TO_NAT(ed); eb2 = 0; } else { - eb1 = TO_LA64(ed & 3); // Ax, Cx, Dx or Bx + eb1 = TO_NAT(ed & 3); // Ax, Cx, Dx or Bx eb2 = ((ed & 4) >> 2); // L or H } BSTRINS_D(eb1, gd, eb2 * 8 + 7, eb2 * 8); @@ -1070,7 +1070,7 @@ uintptr_t dynarec64_00(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; GETGD; if (MODREG) { // reg <= reg - MVxw(TO_LA64((nextop & 7) + (rex.b << 3)), gd); + MVxw(TO_NAT((nextop & 7) + (rex.b << 3)), gd); } else { // mem <= reg addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, &lock, 1, 0); if (rex.w) { @@ -1085,21 +1085,21 @@ uintptr_t dynarec64_00(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni INST_NAME("MOV Gb, Eb"); nextop = F8; if (rex.rex) { - gb1 = gd = TO_LA64(((nextop & 0x38) >> 3) + (rex.r << 3)); + gb1 = gd = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)); gb2 = 0; } else { gd = (nextop & 0x38) >> 3; - gb1 = TO_LA64(gd & 3); + gb1 = TO_NAT(gd & 3); gb2 = ((gd & 4) << 1); } if (MODREG) { if (rex.rex) { - wback = TO_LA64((nextop & 7) + (rex.b << 3)); + wback = TO_NAT((nextop & 7) + (rex.b << 3)); wb2 = 0; } else { wback = (nextop & 7); wb2 = (wback >> 2); - wback = TO_LA64(wback & 3); + wback = TO_NAT(wback & 3); } if (wb2) { BSTRPICK_D(x4, wback, 7 + wb2 * 8, wb2 * 8); @@ -1120,7 +1120,7 @@ uintptr_t dynarec64_00(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; GETGD; if (MODREG) { - MVxw(gd, TO_LA64((nextop & 7) + (rex.b << 3))); + MVxw(gd, TO_NAT((nextop & 7) + (rex.b << 3))); } else { addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, &lock, 1, 0); SMREADLOCK(lock); @@ -1167,7 +1167,7 @@ uintptr_t dynarec64_00(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0x95: case 0x96: case 0x97: - gd = TO_LA64((opcode & 0x07) + (rex.b << 3)); + gd = TO_NAT((opcode & 0x07) + (rex.b << 3)); if (gd == xRAX) { INST_NAME("NOP"); } else { @@ -1546,9 +1546,9 @@ uintptr_t dynarec64_00(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni u8 = F8; MOV32w(x1, u8); if (rex.rex) - gb1 = TO_LA64((opcode & 7) + (rex.b << 3)); + gb1 = TO_NAT((opcode & 7) + (rex.b << 3)); else - gb1 = TO_LA64(opcode & 3); + gb1 = TO_NAT(opcode & 3); BSTRINS_D(gb1, x1, 7, 0); break; case 0xB4: @@ -1559,10 +1559,10 @@ uintptr_t dynarec64_00(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni u8 = F8; MOV32w(x1, u8); if (rex.rex) { - gb1 = TO_LA64((opcode & 7) + (rex.b << 3)); + gb1 = TO_NAT((opcode & 7) + (rex.b << 3)); BSTRINS_D(gb1, x1, 7, 0); } else { - gb1 = TO_LA64(opcode & 3); + gb1 = TO_NAT(opcode & 3); BSTRINS_D(gb1, x1, 15, 8); } break; @@ -1575,7 +1575,7 @@ uintptr_t dynarec64_00(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0xBE: case 0xBF: INST_NAME("MOV Reg, Id"); - gd = TO_LA64((opcode & 7) + (rex.b << 3)); + gd = TO_NAT((opcode & 7) + (rex.b << 3)); if (rex.w) { u64 = F64; MOV64x(gd, u64); @@ -1791,10 +1791,10 @@ uintptr_t dynarec64_00(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni u8 = F8; if (!rex.rex) { ed = (nextop & 7); - eb1 = TO_LA64((ed & 3)); // Ax, Cx, Dx or Bx + eb1 = TO_NAT((ed & 3)); // Ax, Cx, Dx or Bx eb2 = (ed & 4) >> 2; // L or H } else { - eb1 = TO_LA64((nextop & 7) + (rex.b << 3)); + eb1 = TO_NAT((nextop & 7) + (rex.b << 3)); eb2 = 0; } MOV32w(x3, u8); @@ -1816,7 +1816,7 @@ uintptr_t dynarec64_00(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; if (MODREG) { // reg <= i32 i64 = F32S; - ed = TO_LA64((nextop & 7) + (rex.b << 3)); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); MOV64xw(ed, i64); } else { // mem <= i32 addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, &lock, 1, 4); @@ -1864,8 +1864,8 @@ uintptr_t dynarec64_00(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni addr += 8 + 8; TABLE64(x3, addr); // expected return address BNE_MARK(xRIP, x3); - LD_W(w1, xEmu, offsetof(x64emu_t, quit)); - CBZ_NEXT(w1); + LD_W(x1, xEmu, offsetof(x64emu_t, quit)); + CBZ_NEXT(x1); MARK; jump_to_epilog_fast(dyn, 0, xRIP, ninst); } @@ -2150,8 +2150,8 @@ uintptr_t dynarec64_00(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni } TABLE64(x3, addr); BNE_MARK(xRIP, x3); // Not the expected address again - LD_W(w1, xEmu, offsetof(x64emu_t, quit)); - CBZ_NEXT(w1); + LD_W(x1, xEmu, offsetof(x64emu_t, quit)); + CBZ_NEXT(x1); MARK; jump_to_epilog_fast(dyn, 0, xRIP, ninst); dyn->last_ip = addr; diff --git a/src/dynarec/la64/dynarec_la64_0f.c b/src/dynarec/la64/dynarec_la64_0f.c index 477240aa..d2f907f9 100644 --- a/src/dynarec/la64/dynarec_la64_0f.c +++ b/src/dynarec/la64/dynarec_la64_0f.c @@ -93,8 +93,8 @@ uintptr_t dynarec64_0F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni LOAD_XEMU_CALL(); TABLE64(x3, addr); // expected return address BNE_MARK(xRIP, x3); - LD_W(w1, xEmu, offsetof(x64emu_t, quit)); - CBZ_NEXT(w1); + LD_W(x1, xEmu, offsetof(x64emu_t, quit)); + CBZ_NEXT(x1); MARK; LOAD_XEMU_REM(); jump_to_epilog(dyn, 0, xRIP, ninst); @@ -415,31 +415,31 @@ uintptr_t dynarec64_0F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni } break; - #define GO(GETFLAGS, NO, YES, F, I) \ - READFLAGS(F); \ - if (la64_lbt) { \ - X64_SETJ(x1, I); \ - } else { \ - GETFLAGS; \ - } \ - nextop = F8; \ - GETGD; \ - if (MODREG) { \ - ed = TO_LA64((nextop & 7) + (rex.b << 3)); \ - if (la64_lbt) \ - BEQZ(x1, 8); \ - else \ - B##NO(x1, 8); \ - MV(gd, ed); \ - } else { \ - addr = geted(dyn, addr, ninst, nextop, &ed, x2, x4, &fixedaddress, rex, NULL, 1, 0); \ - if (la64_lbt) \ - BEQZ(x1, 8); \ - else \ - B##NO(x1, 8); \ - LDxw(gd, ed, fixedaddress); \ - } \ - if (!rex.w) ZEROUP(gd); +#define GO(GETFLAGS, NO, YES, F, I) \ + READFLAGS(F); \ + if (la64_lbt) { \ + X64_SETJ(x1, I); \ + } else { \ + GETFLAGS; \ + } \ + nextop = F8; \ + GETGD; \ + if (MODREG) { \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ + if (la64_lbt) \ + BEQZ(x1, 8); \ + else \ + B##NO(x1, 8); \ + MV(gd, ed); \ + } else { \ + addr = geted(dyn, addr, ninst, nextop, &ed, x2, x4, &fixedaddress, rex, NULL, 1, 0); \ + if (la64_lbt) \ + BEQZ(x1, 8); \ + else \ + B##NO(x1, 8); \ + LDxw(gd, ed, fixedaddress); \ + } \ + if (!rex.w) ZEROUP(gd); GOCOND(0x40, "CMOV", "Gd, Ed"); @@ -631,30 +631,30 @@ uintptr_t dynarec64_0F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni #undef GO - #define GO(GETFLAGS, NO, YES, F, I) \ - READFLAGS(F); \ - if (la64_lbt) { \ - X64_SETJ(x3, I); \ - } else { \ - GETFLAGS; \ - S##YES(x3, x1); \ - } \ - nextop = F8; \ - if (MODREG) { \ - if (rex.rex) { \ - eb1 = TO_LA64((nextop & 7) + (rex.b << 3)); \ - eb2 = 0; \ - } else { \ - ed = (nextop & 7); \ - eb2 = (ed >> 2) * 8; \ - eb1 = TO_LA64(ed & 3); \ - } \ - BSTRINS_D(eb1, x3, eb2 + 7, eb2); \ - } else { \ - addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, NULL, 1, 0); \ - ST_B(x3, ed, fixedaddress); \ - SMWRITE(); \ - } +#define GO(GETFLAGS, NO, YES, F, I) \ + READFLAGS(F); \ + if (la64_lbt) { \ + X64_SETJ(x3, I); \ + } else { \ + GETFLAGS; \ + S##YES(x3, x1); \ + } \ + nextop = F8; \ + if (MODREG) { \ + if (rex.rex) { \ + eb1 = TO_NAT((nextop & 7) + (rex.b << 3)); \ + eb2 = 0; \ + } else { \ + ed = (nextop & 7); \ + eb2 = (ed >> 2) * 8; \ + eb1 = TO_NAT(ed & 3); \ + } \ + BSTRINS_D(eb1, x3, eb2 + 7, eb2); \ + } else { \ + addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, NULL, 1, 0); \ + ST_B(x3, ed, fixedaddress); \ + SMWRITE(); \ + } GOCOND(0x90, "SET", "Eb"); #undef GO @@ -675,7 +675,7 @@ uintptr_t dynarec64_0F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; GETGD; if (MODREG) { - ed = TO_LA64((nextop & 7) + (rex.b << 3)); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); } else { SMREAD(); addr = geted(dyn, addr, ninst, nextop, &wback, x3, x1, &fixedaddress, rex, NULL, 1, 0); @@ -713,7 +713,7 @@ uintptr_t dynarec64_0F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; GETGD; if (MODREG) { - ed = TO_LA64((nextop & 7) + (rex.b << 3)); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); wback = 0; } else { SMREAD(); @@ -927,11 +927,11 @@ uintptr_t dynarec64_0F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni GETGD; if (MODREG) { if (rex.rex) { - eb1 = TO_LA64((nextop & 7) + (rex.b << 3)); + eb1 = TO_NAT((nextop & 7) + (rex.b << 3)); eb2 = 0; } else { ed = (nextop & 7); - eb1 = TO_LA64(ed & 3); // Ax, Cx, Dx or Bx + eb1 = TO_NAT(ed & 3); // Ax, Cx, Dx or Bx eb2 = (ed & 4) >> 2; // L or H } BSTRPICK_D(gd, eb1, eb2 * 8 + 7, eb2 * 8); @@ -946,7 +946,7 @@ uintptr_t dynarec64_0F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; GETGD; if (MODREG) { - ed = TO_LA64((nextop & 7) + (rex.b << 3)); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); BSTRPICK_D(gd, ed, 15, 0); } else { SMREAD(); @@ -1110,12 +1110,12 @@ uintptr_t dynarec64_0F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni GETGD; if (MODREG) { if (rex.rex) { - wback = TO_LA64((nextop & 7) + (rex.b << 3)); + wback = TO_NAT((nextop & 7) + (rex.b << 3)); wb2 = 0; } else { wback = (nextop & 7); wb2 = (wback >> 2) * 8; - wback = TO_LA64(wback & 3); + wback = TO_NAT(wback & 3); } BSTRPICK_D(gd, wback, wb2 + 7, wb2); EXT_W_B(gd, gd); @@ -1131,7 +1131,7 @@ uintptr_t dynarec64_0F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; GETGD; if (MODREG) { - ed = TO_LA64((nextop & 7) + (rex.b << 3)); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); EXT_W_H(gd, ed); } else { SMREAD(); @@ -1181,7 +1181,7 @@ uintptr_t dynarec64_0F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0xCE: case 0xCF: INST_NAME("BSWAP Reg"); - gd = TO_LA64((opcode & 7) + (rex.b << 3)); + gd = TO_NAT((opcode & 7) + (rex.b << 3)); REVBxw(gd, gd); break; default: diff --git a/src/dynarec/la64/dynarec_la64_64.c b/src/dynarec/la64/dynarec_la64_64.c index 55f834b7..19082933 100644 --- a/src/dynarec/la64/dynarec_la64_64.c +++ b/src/dynarec/la64/dynarec_la64_64.c @@ -327,7 +327,7 @@ uintptr_t dynarec64_64(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; GETGD; if (MODREG) { // reg <= reg - MVxw(TO_LA64((nextop & 7) + (rex.b << 3)), gd); + MVxw(TO_NAT((nextop & 7) + (rex.b << 3)), gd); } else { // mem <= reg if (rex.is32bits) { addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, NULL, 1, 0); @@ -346,7 +346,7 @@ uintptr_t dynarec64_64(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; GETGD; if (MODREG) { // reg <= reg - MVxw(gd, TO_LA64((nextop & 7) + (rex.b << 3))); + MVxw(gd, TO_NAT((nextop & 7) + (rex.b << 3))); } else { // mem <= reg SMREAD(); if (rex.is32bits) { @@ -381,10 +381,10 @@ uintptr_t dynarec64_64(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni u8 = F8; if (!rex.rex) { ed = (nextop & 7); - eb1 = TO_LA64(ed & 3); // Ax, Cx, Dx or Bx + eb1 = TO_NAT(ed & 3); // Ax, Cx, Dx or Bx eb2 = (ed & 4) >> 2; // L or H } else { - eb1 = TO_LA64((nextop & 7) + (rex.b << 3)); + eb1 = TO_NAT((nextop & 7) + (rex.b << 3)); eb2 = 0; } MOV32w(x3, u8); @@ -412,7 +412,7 @@ uintptr_t dynarec64_64(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; if (MODREG) { // reg <= i32 i64 = F32S; - ed = TO_LA64((nextop & 7) + (rex.b << 3)); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); MOV64xw(ed, i64); } else { // mem <= i32 addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, NULL, 0, 4); diff --git a/src/dynarec/la64/dynarec_la64_66.c b/src/dynarec/la64/dynarec_la64_66.c index 78f726d1..f1b171de 100644 --- a/src/dynarec/la64/dynarec_la64_66.c +++ b/src/dynarec/la64/dynarec_la64_66.c @@ -462,7 +462,7 @@ uintptr_t dynarec64_66(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; GETGD; if (MODREG) { - ed = TO_LA64((nextop & 7) + (rex.b << 3)); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); if (ed != gd) { BSTRINSz(ed, gd, 15, 0); } @@ -477,7 +477,7 @@ uintptr_t dynarec64_66(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; GETGD; if (MODREG) { - ed = TO_LA64((nextop & 7) + (rex.b << 3)); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); if (ed != gd) { BSTRINSz(gd, ed, 15, 0); } @@ -496,7 +496,7 @@ uintptr_t dynarec64_66(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0x95: case 0x96: case 0x97: - gd = TO_LA64((opcode & 0x07) + (rex.b << 3)); + gd = TO_NAT((opcode & 0x07) + (rex.b << 3)); if (gd == xRAX) { INST_NAME("NOP"); } else { @@ -612,7 +612,7 @@ uintptr_t dynarec64_66(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni INST_NAME("MOV Reg16, Iw"); u16 = F16; MOV32w(x1, u16); - gd = TO_LA64((opcode & 7) + (rex.b << 3)); + gd = TO_NAT((opcode & 7) + (rex.b << 3)); BSTRINSz(gd, x1, 15, 0); break; case 0xC1: @@ -692,7 +692,7 @@ uintptr_t dynarec64_66(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni INST_NAME("MOV Ew, Iw"); nextop = F8; if (MODREG) { - ed = TO_LA64((nextop & 7) + (rex.b << 3)); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); u16 = F16; MOV32w(x1, u16); BSTRINSz(ed, x1, 15, 0); diff --git a/src/dynarec/la64/dynarec_la64_660f.c b/src/dynarec/la64/dynarec_la64_660f.c index f0e382ae..4c42c327 100644 --- a/src/dynarec/la64/dynarec_la64_660f.c +++ b/src/dynarec/la64/dynarec_la64_660f.c @@ -352,7 +352,7 @@ uintptr_t dynarec64_660F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int GETGX(q0, 0); d0 = fpu_get_scratch(dyn); if (MODREG) { - ed = TO_LA64((nextop & 7) + (rex.b << 3)); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); u8 = F8; if (rex.w) { VBSRL_V(d0, q0, (u8 & 1) * 8); @@ -439,27 +439,27 @@ uintptr_t dynarec64_660F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int } break; - #define GO(GETFLAGS, NO, YES, F, I) \ - READFLAGS(F); \ - if (la64_lbt) { \ - X64_SETJ(x1, I); \ - } else { \ - GETFLAGS; \ - } \ - nextop = F8; \ - GETGD; \ - if (MODREG) { \ - ed = TO_LA64((nextop & 7) + (rex.b << 3)); \ - } else { \ - addr = geted(dyn, addr, ninst, nextop, &ed, x2, x4, &fixedaddress, rex, NULL, 1, 0); \ - LD_HU(x4, ed, fixedaddress); \ - ed = x4; \ - } \ - if (la64_lbt) \ - BEQZ(x1, 4 + 4); \ - else \ - B##NO(x1, 4 + 4); \ - BSTRINS_D(gd, ed, 15, 0); +#define GO(GETFLAGS, NO, YES, F, I) \ + READFLAGS(F); \ + if (la64_lbt) { \ + X64_SETJ(x1, I); \ + } else { \ + GETFLAGS; \ + } \ + nextop = F8; \ + GETGD; \ + if (MODREG) { \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ + } else { \ + addr = geted(dyn, addr, ninst, nextop, &ed, x2, x4, &fixedaddress, rex, NULL, 1, 0); \ + LD_HU(x4, ed, fixedaddress); \ + ed = x4; \ + } \ + if (la64_lbt) \ + BEQZ(x1, 4 + 4); \ + else \ + B##NO(x1, 4 + 4); \ + BSTRINS_D(gd, ed, 15, 0); GOCOND(0x40, "CMOV", "Gd, Ed"); #undef GO @@ -762,7 +762,7 @@ uintptr_t dynarec64_660F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int GETGX_empty(v0); v1 = fpu_get_scratch(dyn); if (MODREG) { - ed = TO_LA64((nextop & 7) + (rex.b << 3)); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); if (rex.w) { MOVGR2FR_D(v1, ed); } else { @@ -975,7 +975,7 @@ uintptr_t dynarec64_660F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int GETGX(v0, 0); if (rex.w) { if (MODREG) { - ed = TO_LA64((nextop & 7) + (rex.b << 3)); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); MOVFR2GR_D(ed, v0); } else { addr = geted(dyn, addr, ninst, nextop, &ed, x2, x3, &fixedaddress, rex, NULL, 1, 0); @@ -984,7 +984,7 @@ uintptr_t dynarec64_660F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int } } else { if (MODREG) { - ed = TO_LA64((nextop & 7) + (rex.b << 3)); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); MOVFR2GR_S(ed, v0); ZEROUP(ed); } else { @@ -1025,12 +1025,12 @@ uintptr_t dynarec64_660F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int GETGD; if (MODREG) { if (rex.rex) { - ed = TO_LA64((nextop & 7) + (rex.b << 3)); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); eb1 = ed; eb2 = 0; } else { ed = (nextop & 7); - eb1 = TO_LA64(ed & 3); // Ax, Cx, Dx or Bx + eb1 = TO_NAT(ed & 3); // Ax, Cx, Dx or Bx eb2 = (ed & 4) >> 2; // L or H } if (eb2) { @@ -1052,7 +1052,7 @@ uintptr_t dynarec64_660F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int GETGX(v0, 1); if (MODREG) { u8 = (F8) & 7; - ed = TO_LA64((nextop & 7) + (rex.b << 3)); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); } else { SMREAD(); addr = geted(dyn, addr, ninst, nextop, &wback, x2, x4, &fixedaddress, rex, NULL, 1, 1); diff --git a/src/dynarec/la64/dynarec_la64_6664.c b/src/dynarec/la64/dynarec_la64_6664.c index c6928aaa..3022d733 100644 --- a/src/dynarec/la64/dynarec_la64_6664.c +++ b/src/dynarec/la64/dynarec_la64_6664.c @@ -44,7 +44,7 @@ uintptr_t dynarec64_6664(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int nextop = F8; GETGD; if (MODREG) { // reg <= reg - ed = TO_LA64((nextop & 7) + (rex.b << 3)); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); if (rex.w) { MV(gd, ed); } else { diff --git a/src/dynarec/la64/dynarec_la64_67.c b/src/dynarec/la64/dynarec_la64_67.c index 7be8a16b..cb5d0d0e 100644 --- a/src/dynarec/la64/dynarec_la64_67.c +++ b/src/dynarec/la64/dynarec_la64_67.c @@ -105,10 +105,10 @@ uintptr_t dynarec64_67(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni gd = ((nextop & 0x38) >> 3) + (rex.r << 3); if (rex.rex) { gb2 = 0; - gb1 = TO_LA64(gd); + gb1 = TO_NAT(gd); } else { gb2 = ((gd & 4) << 1); - gb1 = TO_LA64(gd & 3); + gb1 = TO_NAT(gd & 3); } if (gb2) { gd = x4; @@ -119,10 +119,10 @@ uintptr_t dynarec64_67(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni if (MODREG) { ed = (nextop & 7) + (rex.b << 3); if (rex.rex) { - eb1 = TO_LA64(ed); + eb1 = TO_NAT(ed); eb2 = 0; } else { - eb1 = TO_LA64(ed & 3); // Ax, Cx, Dx or Bx + eb1 = TO_NAT(ed & 3); // Ax, Cx, Dx or Bx eb2 = ((ed & 4) >> 2); // L or H } BSTRINS_D(eb1, gd, eb2 * 8 + 7, eb2 * 8); @@ -137,7 +137,7 @@ uintptr_t dynarec64_67(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; GETGD; if (MODREG) { // reg <= reg - MVxw(TO_LA64((nextop & 7) + (rex.b << 3)), gd); + MVxw(TO_NAT((nextop & 7) + (rex.b << 3)), gd); } else { // mem <= reg addr = geted32(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, &lock, 1, 0); SDxw(gd, ed, fixedaddress); diff --git a/src/dynarec/la64/dynarec_la64_f0.c b/src/dynarec/la64/dynarec_la64_f0.c index 994cd0b5..be32d783 100644 --- a/src/dynarec/la64/dynarec_la64_f0.c +++ b/src/dynarec/la64/dynarec_la64_f0.c @@ -60,7 +60,7 @@ uintptr_t dynarec64_F0(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni GETGD; SMDMB(); if ((nextop & 0xC0) == 0xC0) { - ed = TO_LA64((nextop & 7) + (rex.b << 3)); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); emit_add32(dyn, ninst, rex, ed, gd, x3, x4, x5); } else { addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, LOCK_LOCK, 0, 0); @@ -82,7 +82,7 @@ uintptr_t dynarec64_F0(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni GETGD; SMDMB(); if (MODREG) { - ed = TO_LA64((nextop & 7) + (rex.b << 3)); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); emit_or32(dyn, ninst, rex, ed, gd, x3, x4); } else { addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, LOCK_LOCK, 0, 0); @@ -109,12 +109,12 @@ uintptr_t dynarec64_F0(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni SMDMB(); if (MODREG) { if (rex.rex) { - wback = TO_LA64((nextop & 7) + (rex.b << 3)); + wback = TO_NAT((nextop & 7) + (rex.b << 3)); wb2 = 0; } else { wback = (nextop & 7); wb2 = (wback >> 2) * 8; - wback = TO_LA64(wback & 3); + wback = TO_NAT(wback & 3); } BSTRPICK_D(x2, wback, wb2 + 7, wb2); wb1 = 0; @@ -131,12 +131,12 @@ uintptr_t dynarec64_F0(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni B_NEXT_nocond; } else { if (rex.rex) { - gb1 = TO_LA64(((nextop & 0x38) >> 3) + (rex.r << 3)); + gb1 = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)); gb2 = 0; } else { gd = (nextop & 0x38) >> 3; gb2 = ((gd & 4) >> 2) * 8; - gb1 = TO_LA64(gd & 3); + gb1 = TO_NAT(gd & 3); } addr = geted(dyn, addr, ninst, nextop, &wback, x3, x2, &fixedaddress, rex, LOCK_LOCK, 0, 0); ANDI(x5, wback, 0b11); @@ -180,7 +180,7 @@ uintptr_t dynarec64_F0(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; GETGD; if (MODREG) { - ed = TO_LA64((nextop & 7) + (rex.b << 3)); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); wback = 0; UFLAG_IF { emit_cmp32(dyn, ninst, rex, xRAX, ed, x3, x4, x5, x6); } MV(x1, ed); // save value @@ -236,7 +236,7 @@ uintptr_t dynarec64_F0(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni GETGD; SMDMB(); if (MODREG) { - ed = TO_LA64((nextop & 7) + (rex.b << 3)); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); MVxw(x1, ed); MVxw(ed, gd); MVxw(gd, x1); @@ -410,7 +410,7 @@ uintptr_t dynarec64_F0(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni GETGD; SMDMB(); if (MODREG) { - ed = TO_LA64((nextop & 7) + (rex.b << 3)); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); emit_adc32(dyn, ninst, rex, ed, gd, x3, x4, x5, x6); } else { addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, LOCK_LOCK, 0, 0); @@ -434,7 +434,7 @@ uintptr_t dynarec64_F0(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni GETGD; SMDMB(); if (MODREG) { - ed = TO_LA64((nextop & 7) + (rex.b << 3)); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); emit_sub32(dyn, ninst, rex, ed, gd, x3, x4, x5); } else { addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, LOCK_LOCK, 0, 0); @@ -465,7 +465,7 @@ uintptr_t dynarec64_F0(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni i64 = F32S; else i64 = F8S; - ed = TO_LA64((nextop & 7) + (rex.b << 3)); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); emit_add32c(dyn, ninst, rex, ed, i64, x3, x4, x5, x6); } else { addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, LOCK_LOCK, 0, (opcode == 0x81) ? 4 : 1); @@ -503,7 +503,7 @@ uintptr_t dynarec64_F0(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni i64 = F32S; else i64 = F8S; - ed = TO_LA64((nextop & 7) + (rex.b << 3)); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); emit_or32c(dyn, ninst, rex, ed, i64, x3, x4); } else { addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, LOCK_LOCK, 0, (opcode == 0x81) ? 4 : 1); @@ -541,7 +541,7 @@ uintptr_t dynarec64_F0(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni i64 = F32S; else i64 = F8S; - ed = TO_LA64((nextop & 7) + (rex.b << 3)); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); emit_sub32c(dyn, ninst, rex, ed, i64, x3, x4, x5, x6); } else { addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, LOCK_LOCK, 0, (opcode == 0x81) ? 4 : 1); @@ -600,7 +600,7 @@ uintptr_t dynarec64_F0(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni SETFLAGS(X_ALL & ~X_CF, SF_SUBSET_PENDING); SMDMB(); if (MODREG) { - ed = TO_LA64((nextop & 7) + (rex.b << 3)); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); emit_inc32(dyn, ninst, rex, ed, x3, x4, x5, x6); } else { addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, LOCK_LOCK, 0, 0); @@ -618,7 +618,7 @@ uintptr_t dynarec64_F0(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni SETFLAGS(X_ALL & ~X_CF, SF_SUBSET_PENDING); SMDMB(); if (MODREG) { - ed = TO_LA64((nextop & 7) + (rex.b << 3)); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); emit_dec32(dyn, ninst, rex, ed, x3, x4, x5, x6); } else { addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, LOCK_LOCK, 0, 0); diff --git a/src/dynarec/la64/dynarec_la64_helper.c b/src/dynarec/la64/dynarec_la64_helper.c index ab290fc8..f297fea4 100644 --- a/src/dynarec/la64/dynarec_la64_helper.c +++ b/src/dynarec/la64/dynarec_la64_helper.c @@ -60,12 +60,12 @@ uintptr_t geted(dynarec_la64_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, if (sib_reg != 4) { if (tmp && ((tmp < -2048) || (tmp > maxval) || !i12)) { MOV64x(scratch, tmp); - ADDSL(ret, scratch, TO_LA64(sib_reg), sib >> 6, ret); + ADDSL(ret, scratch, TO_NAT(sib_reg), sib >> 6, ret); } else { if (sib >> 6) { - SLLI_D(ret, TO_LA64(sib_reg), (sib >> 6)); + SLLI_D(ret, TO_NAT(sib_reg), (sib >> 6)); } else { - ret = TO_LA64(sib_reg); + ret = TO_NAT(sib_reg); } *fixaddress = tmp; } @@ -80,9 +80,9 @@ uintptr_t geted(dynarec_la64_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, } } else { if (sib_reg != 4) { - ADDSL(ret, TO_LA64(sib_reg2), TO_LA64(sib_reg), sib >> 6, scratch); + ADDSL(ret, TO_NAT(sib_reg2), TO_NAT(sib_reg), sib >> 6, scratch); } else { - ret = TO_LA64(sib_reg2); + ret = TO_NAT(sib_reg2); } } } else if ((nextop & 7) == 5) { @@ -118,7 +118,7 @@ uintptr_t geted(dynarec_la64_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, break; } } else { - ret = TO_LA64((nextop & 7) + (rex.b << 3)); + ret = TO_NAT((nextop & 7) + (rex.b << 3)); } } else { int64_t i64; @@ -137,37 +137,37 @@ uintptr_t geted(dynarec_la64_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, *fixaddress = i64; if ((nextop & 7) == 4) { if (sib_reg != 4) { - ADDSL(ret, TO_LA64(sib_reg2), TO_LA64(sib_reg), sib >> 6, scratch); + ADDSL(ret, TO_NAT(sib_reg2), TO_NAT(sib_reg), sib >> 6, scratch); } else { - ret = TO_LA64(sib_reg2); + ret = TO_NAT(sib_reg2); } } else { - ret = TO_LA64((nextop & 0x07) + (rex.b << 3)); + ret = TO_NAT((nextop & 0x07) + (rex.b << 3)); } } else { if (i64 >= -2048 && i64 <= 2047) { if ((nextop & 7) == 4) { if (sib_reg != 4) { - ADDSL(scratch, TO_LA64(sib_reg2), TO_LA64(sib_reg), sib >> 6, scratch); + ADDSL(scratch, TO_NAT(sib_reg2), TO_NAT(sib_reg), sib >> 6, scratch); } else { - scratch = TO_LA64(sib_reg2); + scratch = TO_NAT(sib_reg2); } } else { - scratch = TO_LA64((nextop & 0x07) + (rex.b << 3)); + scratch = TO_NAT((nextop & 0x07) + (rex.b << 3)); } ADDI_D(ret, scratch, i64); } else { MOV64x(scratch, i64); if ((nextop & 7) == 4) { if (sib_reg != 4) { - ADD_D(scratch, scratch, TO_LA64(sib_reg2)); - ADDSL(ret, scratch, TO_LA64(sib_reg), sib >> 6, ret); + ADD_D(scratch, scratch, TO_NAT(sib_reg2)); + ADDSL(ret, scratch, TO_NAT(sib_reg), sib >> 6, ret); } else { - PASS3(int tmp = TO_LA64(sib_reg2)); + PASS3(int tmp = TO_NAT(sib_reg2)); ADD_D(ret, tmp, scratch); } } else { - PASS3(int tmp = TO_LA64((nextop & 0x07) + (rex.b << 3))); + PASS3(int tmp = TO_NAT((nextop & 0x07) + (rex.b << 3))); ADD_D(ret, tmp, scratch); } } @@ -204,17 +204,17 @@ static uintptr_t geted_32(dynarec_la64_t* dyn, uintptr_t addr, int ninst, uint8_ // no need to zero up, as we did it below la64_move32(dyn, ninst, scratch, tmp, 0); if ((sib >> 6)) { - SLLI_D(ret, TO_LA64(sib_reg), sib >> 6); + SLLI_D(ret, TO_NAT(sib_reg), sib >> 6); ADD_W(ret, ret, scratch); } else { - ADD_W(ret, TO_LA64(sib_reg), scratch); + ADD_W(ret, TO_NAT(sib_reg), scratch); } ZEROUP(ret); } else { if (sib >> 6) { - SLLI_D(ret, TO_LA64(sib_reg), (sib >> 6)); + SLLI_D(ret, TO_NAT(sib_reg), (sib >> 6)); } else { - ret = TO_LA64(sib_reg); + ret = TO_NAT(sib_reg); } *fixaddress = tmp; } @@ -230,14 +230,14 @@ static uintptr_t geted_32(dynarec_la64_t* dyn, uintptr_t addr, int ninst, uint8_ } else { if (sib_reg != 4) { if ((sib >> 6)) { - SLLI_D(ret, TO_LA64(sib_reg), (sib >> 6)); - ADD_W(ret, ret, TO_LA64(sib_reg2)); + SLLI_D(ret, TO_NAT(sib_reg), (sib >> 6)); + ADD_W(ret, ret, TO_NAT(sib_reg2)); } else { - ADD_W(ret, TO_LA64(sib_reg2), TO_LA64(sib_reg)); + ADD_W(ret, TO_NAT(sib_reg2), TO_NAT(sib_reg)); } ZEROUP(ret); } else { - ret = TO_LA64(sib_reg2); + ret = TO_NAT(sib_reg2); } } } else if ((nextop & 7) == 5) { @@ -250,7 +250,7 @@ static uintptr_t geted_32(dynarec_la64_t* dyn, uintptr_t addr, int ninst, uint8_ break; } } else { - ret = TO_LA64((nextop & 7)); + ret = TO_NAT((nextop & 7)); if (ret == hint) { ZEROUP2(hint, ret); // to clear upper part } @@ -273,33 +273,33 @@ static uintptr_t geted_32(dynarec_la64_t* dyn, uintptr_t addr, int ninst, uint8_ if ((nextop & 7) == 4) { if (sib_reg != 4) { if (sib >> 6) { - SLLI_D(ret, TO_LA64(sib_reg), (sib >> 6)); - ADD_W(ret, ret, TO_LA64(sib_reg2)); + SLLI_D(ret, TO_NAT(sib_reg), (sib >> 6)); + ADD_W(ret, ret, TO_NAT(sib_reg2)); } else { - ADD_W(ret, TO_LA64(sib_reg2), TO_LA64(sib_reg)); + ADD_W(ret, TO_NAT(sib_reg2), TO_NAT(sib_reg)); } ZEROUP(ret); } else { - ret = TO_LA64(sib_reg2); + ret = TO_NAT(sib_reg2); } } else { - ret = TO_LA64((nextop & 0x07)); + ret = TO_NAT((nextop & 0x07)); } } else { if (i32 >= -2048 && i32 <= 2047) { if ((nextop & 7) == 4) { if (sib_reg != 4) { if (sib >> 6) { - SLLI_D(scratch, TO_LA64(sib_reg), sib >> 6); - ADD_W(scratch, scratch, TO_LA64(sib_reg2)); + SLLI_D(scratch, TO_NAT(sib_reg), sib >> 6); + ADD_W(scratch, scratch, TO_NAT(sib_reg2)); } else { - ADD_W(scratch, TO_LA64(sib_reg2), TO_LA64(sib_reg)); + ADD_W(scratch, TO_NAT(sib_reg2), TO_NAT(sib_reg)); } } else { - scratch = TO_LA64(sib_reg2); + scratch = TO_NAT(sib_reg2); } } else { - scratch = TO_LA64((nextop & 0x07)); + scratch = TO_NAT((nextop & 0x07)); } ADDI_W(ret, scratch, i32); ZEROUP(ret); @@ -308,19 +308,19 @@ static uintptr_t geted_32(dynarec_la64_t* dyn, uintptr_t addr, int ninst, uint8_ la64_move32(dyn, ninst, scratch, i32, 0); if ((nextop & 7) == 4) { if (sib_reg != 4) { - ADD_W(scratch, scratch, TO_LA64(sib_reg2)); + ADD_W(scratch, scratch, TO_NAT(sib_reg2)); if (sib >> 6) { - SLLI_D(ret, TO_LA64(sib_reg), (sib >> 6)); + SLLI_D(ret, TO_NAT(sib_reg), (sib >> 6)); ADD_W(ret, ret, scratch); } else { - ADD_W(ret, scratch, TO_LA64(sib_reg)); + ADD_W(ret, scratch, TO_NAT(sib_reg)); } } else { - PASS3(int tmp = TO_LA64(sib_reg2)); + PASS3(int tmp = TO_NAT(sib_reg2)); ADD_W(ret, tmp, scratch); } } else { - PASS3(int tmp = TO_LA64((nextop & 0x07))); + PASS3(int tmp = TO_NAT((nextop & 0x07))); ADD_W(ret, tmp, scratch); } ZEROUP(ret); @@ -359,17 +359,17 @@ uintptr_t geted32(dynarec_la64_t* dyn, uintptr_t addr, int ninst, uint8_t nextop if (tmp && ((tmp < -2048) || (tmp > maxval) || !i12)) { MOV64x(scratch, tmp); if ((sib >> 6)) { - SLLI_D(ret, TO_LA64(sib_reg), sib >> 6); + SLLI_D(ret, TO_NAT(sib_reg), sib >> 6); ADD_W(ret, ret, scratch); } else { - ADD_W(ret, TO_LA64(sib_reg), scratch); + ADD_W(ret, TO_NAT(sib_reg), scratch); } ZEROUP(ret); } else { if (sib >> 6) - SLLI_D(ret, TO_LA64(sib_reg), (sib >> 6)); + SLLI_D(ret, TO_NAT(sib_reg), (sib >> 6)); else - ret = TO_LA64(sib_reg); + ret = TO_NAT(sib_reg); *fixaddress = tmp; } } else { @@ -384,14 +384,14 @@ uintptr_t geted32(dynarec_la64_t* dyn, uintptr_t addr, int ninst, uint8_t nextop } else { if (sib_reg != 4) { if ((sib >> 6)) { - SLLI_D(ret, TO_LA64(sib_reg), (sib >> 6)); - ADD_W(ret, ret, TO_LA64(sib_reg2)); + SLLI_D(ret, TO_NAT(sib_reg), (sib >> 6)); + ADD_W(ret, ret, TO_NAT(sib_reg2)); } else { - ADD_W(ret, TO_LA64(sib_reg2), TO_LA64(sib_reg)); + ADD_W(ret, TO_NAT(sib_reg2), TO_NAT(sib_reg)); } ZEROUP(ret); } else { - ret = TO_LA64(sib_reg2); + ret = TO_NAT(sib_reg2); } } } else if ((nextop & 7) == 5) { @@ -408,7 +408,7 @@ uintptr_t geted32(dynarec_la64_t* dyn, uintptr_t addr, int ninst, uint8_t nextop break; } } else { - ret = TO_LA64((nextop & 7) + (rex.b << 3)); + ret = TO_NAT((nextop & 7) + (rex.b << 3)); if (ret == hint) { ZEROUP2(hint, ret); // to clear upper part } @@ -431,32 +431,32 @@ uintptr_t geted32(dynarec_la64_t* dyn, uintptr_t addr, int ninst, uint8_t nextop if ((nextop & 7) == 4) { if (sib_reg != 4) { if (sib >> 6) { - SLLI_D(ret, TO_LA64(sib_reg), (sib >> 6)); - ADD_W(ret, ret, TO_LA64(sib_reg2)); + SLLI_D(ret, TO_NAT(sib_reg), (sib >> 6)); + ADD_W(ret, ret, TO_NAT(sib_reg2)); } else { - ADD_W(ret, TO_LA64(sib_reg2), TO_LA64(sib_reg)); + ADD_W(ret, TO_NAT(sib_reg2), TO_NAT(sib_reg)); } ZEROUP(ret); } else { - ret = TO_LA64(sib_reg2); + ret = TO_NAT(sib_reg2); } } else { - ret = TO_LA64((nextop & 0x07) + (rex.b << 3)); + ret = TO_NAT((nextop & 0x07) + (rex.b << 3)); } } else { if (i64 >= -2048 && i64 <= 2047) { if ((nextop & 7) == 4) { if (sib_reg != 4) { if (sib >> 6) { - SLLI_D(scratch, TO_LA64(sib_reg), sib >> 6); - ADD_W(scratch, scratch, TO_LA64(sib_reg2)); + SLLI_D(scratch, TO_NAT(sib_reg), sib >> 6); + ADD_W(scratch, scratch, TO_NAT(sib_reg2)); } else - ADD_W(scratch, TO_LA64(sib_reg2), TO_LA64(sib_reg)); + ADD_W(scratch, TO_NAT(sib_reg2), TO_NAT(sib_reg)); } else { - scratch = TO_LA64(sib_reg2); + scratch = TO_NAT(sib_reg2); } } else - scratch = TO_LA64((nextop & 0x07) + (rex.b << 3)); + scratch = TO_NAT((nextop & 0x07) + (rex.b << 3)); ADDI_W(ret, scratch, i64); ZEROUP(ret); } else { @@ -464,18 +464,18 @@ uintptr_t geted32(dynarec_la64_t* dyn, uintptr_t addr, int ninst, uint8_t nextop la64_move32(dyn, ninst, scratch, i64, 0); if ((nextop & 7) == 4) { if (sib_reg != 4) { - ADD_W(scratch, scratch, TO_LA64(sib_reg2)); + ADD_W(scratch, scratch, TO_NAT(sib_reg2)); if (sib >> 6) { - SLLI_D(ret, TO_LA64(sib_reg), (sib >> 6)); + SLLI_D(ret, TO_NAT(sib_reg), (sib >> 6)); ADD_W(ret, ret, scratch); } else - ADD_W(ret, scratch, TO_LA64(sib_reg)); + ADD_W(ret, scratch, TO_NAT(sib_reg)); } else { - PASS3(int tmp = TO_LA64(sib_reg2)); + PASS3(int tmp = TO_NAT(sib_reg2)); ADD_W(ret, tmp, scratch); } } else { - PASS3(int tmp = TO_LA64((nextop & 0x07) + (rex.b << 3))); + PASS3(int tmp = TO_NAT((nextop & 0x07) + (rex.b << 3))); ADD_W(ret, tmp, scratch); } ZEROUP(ret); @@ -620,7 +620,7 @@ void retn_to_epilog(dynarec_la64_t* dyn, int ninst, rex_t rex, int n) MESSAGE(LOG_DUMP, "Retn to epilog\n"); POP1z(xRIP); if (n > 0x7ff) { - MOV64x(w1, n); + MOV64x(x1, n); ADDz(xRSP, xRSP, x1); } else { ADDIz(xRSP, xRSP, n); diff --git a/src/dynarec/la64/dynarec_la64_helper.h b/src/dynarec/la64/dynarec_la64_helper.h index d66b6be8..cbfdc4ef 100644 --- a/src/dynarec/la64/dynarec_la64_helper.h +++ b/src/dynarec/la64/dynarec_la64_helper.h @@ -36,18 +36,18 @@ #define LOCK_LOCK (int*)1 // GETGD get x64 register in gd -#define GETGD gd = TO_LA64(((nextop & 0x38) >> 3) + (rex.r << 3)); +#define GETGD gd = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)); // GETGW extract x64 register in gd, that is i -#define GETGW(i) \ - gd = TO_LA64(((nextop & 0x38) >> 3) + (rex.r << 3)); \ - BSTRPICK_D(i, gd, 15, 0); \ +#define GETGW(i) \ + gd = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)); \ + BSTRPICK_D(i, gd, 15, 0); \ gd = i; // GETED can use r1 for ed, and r2 for wback. wback is 0 if ed is xEAX..xEDI #define GETED(D) \ if (MODREG) { \ - ed = TO_LA64((nextop & 7) + (rex.b << 3)); \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ wback = 0; \ } else { \ SMREAD(); \ @@ -58,7 +58,7 @@ #define GETEDz(D) \ if (MODREG) { \ - ed = TO_LA64((nextop & 7) + (rex.b << 3)); \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ wback = 0; \ } else { \ SMREAD(); \ @@ -69,7 +69,7 @@ // GETED32 can use r1 for ed, and r2 for wback. wback is 0 if ed is xEAX..xEDI #define GETED32(D) \ if (MODREG) { \ - ed = TO_LA64((nextop & 7) + (rex.b << 3)); \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ wback = 0; \ } else { \ SMREAD(); \ @@ -80,7 +80,7 @@ // GETEDH can use hint for ed, and x1 or x2 for wback (depending on hint), might also use x3. wback is 0 if ed is xEAX..xEDI #define GETEDH(hint, D) \ if (MODREG) { \ - ed = TO_LA64((nextop & 7) + (rex.b << 3)); \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ wback = 0; \ } else { \ SMREAD(); \ @@ -91,7 +91,7 @@ // GETEWW will use i for ed, and can use w for wback. #define GETEWW(w, i, D) \ if (MODREG) { \ - wback = TO_LA64((nextop & 7) + (rex.b << 3)); \ + wback = TO_NAT((nextop & 7) + (rex.b << 3)); \ BSTRPICK_D(i, wback, 15, 0); \ ed = i; \ wb1 = 0; \ @@ -108,7 +108,7 @@ // GETEDO can use r1 for ed, and r2 for wback. wback is 0 if ed is xEAX..xEDI #define GETEDO(O, D) \ if (MODREG) { \ - ed = TO_LA64((nextop & 7) + (rex.b << 3)); \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ wback = 0; \ } else { \ SMREAD(); \ @@ -126,7 +126,7 @@ // GETSED can use r1 for ed, and r2 for wback. ed will be sign extended! #define GETSED(D) \ if (MODREG) { \ - ed = TO_LA64((nextop & 7) + (rex.b << 3)); \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ wback = 0; \ if (!rex.w) { \ ADD_W(x1, ed, xZR); \ @@ -149,9 +149,9 @@ } // GETGW extract x64 register in gd, that is i, Signed extented -#define GETSGW(i) \ - gd = TO_LA64(((nextop & 0x38) >> 3) + (rex.r << 3)); \ - EXT_W_H(i, gd); \ +#define GETSGW(i) \ + gd = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)); \ + EXT_W_H(i, gd); \ gd = i; // Write back ed in wback (if wback not 0) @@ -178,7 +178,7 @@ // GETSEW will use i for ed, and can use r3 for wback. This is the Signed version #define GETSEW(i, D) \ if (MODREG) { \ - wback = TO_LA64((nextop & 7) + (rex.b << 3)); \ + wback = TO_NAT((nextop & 7) + (rex.b << 3)); \ EXT_W_H(i, wback); \ ed = i; \ wb1 = 0; \ @@ -201,18 +201,18 @@ #define EWBACK EWBACKW(ed) // Write back gd in correct register -#define GWBACK BSTRINS_D((TO_LA64(((nextop & 0x38) >> 3) + (rex.r << 3))), gd, 15, 0); +#define GWBACK BSTRINS_D((TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3))), gd, 15, 0); // GETEB will use i for ed, and can use r3 for wback. #define GETEB(i, D) \ if (MODREG) { \ if (rex.rex) { \ - wback = TO_LA64((nextop & 7) + (rex.b << 3)); \ + wback = TO_NAT((nextop & 7) + (rex.b << 3)); \ wb2 = 0; \ } else { \ wback = (nextop & 7); \ wb2 = (wback >> 2) * 8; \ - wback = TO_LA64((wback & 3)); \ + wback = TO_NAT((wback & 3)); \ } \ BSTRPICK_D(i, wback, wb2 + 7, wb2); \ wb1 = 0; \ @@ -228,12 +228,12 @@ #define GETSEB(i, D) \ if (MODREG) { \ if (rex.rex) { \ - wback = TO_LA64((nextop & 7) + (rex.b << 3)); \ + wback = TO_NAT((nextop & 7) + (rex.b << 3)); \ wb2 = 0; \ } else { \ wback = (nextop & 7); \ wb2 = (wback >> 2) * 8; \ - wback = TO_LA64(wback & 3); \ + wback = TO_NAT(wback & 3); \ } \ if (wb2) { \ SRLI_D(i, wback, wb2); \ @@ -254,12 +254,12 @@ #define GETEB32(i, D) \ if (MODREG) { \ if (rex.rex) { \ - wback = TO_LA64((nextop & 7) + (rex.b << 3)); \ + wback = TO_NAT((nextop & 7) + (rex.b << 3)); \ wb2 = 0; \ } else { \ wback = (nextop & 7); \ wb2 = (wback >> 2) * 8; \ - wback = TO_LA64(wback & 3); \ + wback = TO_NAT(wback & 3); \ } \ BSTRPICK_D(i, wback, wb2 + 7, wb2); \ wb1 = 0; \ @@ -273,28 +273,28 @@ } // GETGB will use i for gd -#define GETGB(i) \ - if (rex.rex) { \ - gb1 = TO_LA64(((nextop & 0x38) >> 3) + (rex.r << 3)); \ - gb2 = 0; \ - } else { \ - gd = (nextop & 0x38) >> 3; \ - gb2 = ((gd & 4) << 1); \ - gb1 = TO_LA64((gd & 3)); \ - } \ - gd = i; \ +#define GETGB(i) \ + if (rex.rex) { \ + gb1 = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)); \ + gb2 = 0; \ + } else { \ + gd = (nextop & 0x38) >> 3; \ + gb2 = ((gd & 4) << 1); \ + gb1 = TO_NAT((gd & 3)); \ + } \ + gd = i; \ BSTRPICK_D(gd, gb1, gb2 + 7, gb2); // GETEBO will use i for ed, i is also Offset, and can use r3 for wback. #define GETEBO(i, D) \ if (MODREG) { \ if (rex.rex) { \ - wback = TO_LA64((nextop & 7) + (rex.b << 3)); \ + wback = TO_NAT((nextop & 7) + (rex.b << 3)); \ wb2 = 0; \ } else { \ wback = (nextop & 7); \ wb2 = (wback >> 2) * 8; \ - wback = TO_LA64(wback & 3); \ + wback = TO_NAT(wback & 3); \ } \ BSTRPICK_D(i, wback, wb2 + 7, wb2); \ wb1 = 0; \ diff --git a/src/dynarec/la64/la64_emitter.h b/src/dynarec/la64/la64_emitter.h index 4533c568..eeaab03a 100644 --- a/src/dynarec/la64/la64_emitter.h +++ b/src/dynarec/la64/la64_emitter.h @@ -52,26 +52,10 @@ f24-f31 fs0-fs7 Static registers Callee #define xFlags 31 #define xRIP 20 #define xSavedSP 22 -// function to move from x86 regs number to LA64 reg number -#define TO_LA64(A) (((A) > 7) ? ((A) + 15) : ((A) + 12)) -// 32bits version -#define wEAX xRAX -#define wECX xRCX -#define wEDX xRDX -#define wEBX xRBX -#define wESP xRSP -#define wEBP xRBP -#define wESI xRSI -#define wEDI xRDI -#define wR8 xR8 -#define wR9 xR9 -#define wR10 xR10 -#define wR11 xR11 -#define wR12 xR12 -#define wR13 xR13 -#define wR14 xR14 -#define wR15 xR15 -#define wFlags xFlags + +// convert a x86 register to native according to the register mapping +#define TO_NAT(A) (xRAX + (A) + (((A) > 7) ? 3 : 0)) + // scratch registers #define x1 5 #define x2 6 @@ -80,13 +64,7 @@ f24-f31 fs0-fs7 Static registers Callee #define x5 9 #define x6 10 #define x7 11 -// 32bits version of scratch -#define w1 x1 -#define w2 x2 -#define w3 x3 -#define w4 x4 -#define w5 x5 -#define w6 x6 + // emu is r0 #define xEmu 4 // LA64 RA diff --git a/src/dynarec/rv64/dynarec_rv64_00.c b/src/dynarec/rv64/dynarec_rv64_00.c index b9c19e58..f8be1f31 100644 --- a/src/dynarec/rv64/dynarec_rv64_00.c +++ b/src/dynarec/rv64/dynarec_rv64_00.c @@ -30,7 +30,7 @@ uintptr_t dynarec64_00(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni uint8_t opcode; opcode = PK(0); - switch(opcode) { + switch (opcode) { case 0x00 ... 0x3f: addr = dynarec64_00_0(dyn, addr, ip, ninst, rex, rep, ok, need_epilog); break; case 0x40 ... 0x7f: addr = dynarec64_00_1(dyn, addr, ip, ninst, rex, rep, ok, need_epilog); break; case 0x80 ... 0xbf: addr = dynarec64_00_2(dyn, addr, ip, ninst, rex, rep, ok, need_epilog); break; diff --git a/src/dynarec/rv64/dynarec_rv64_00_0.c b/src/dynarec/rv64/dynarec_rv64_00_0.c index eec5d003..ed2dfde0 100644 --- a/src/dynarec/rv64/dynarec_rv64_00_0.c +++ b/src/dynarec/rv64/dynarec_rv64_00_0.c @@ -50,7 +50,7 @@ uintptr_t dynarec64_00_0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int MAYUSE(lock); MAYUSE(cacheupd); - switch(opcode) { + switch (opcode) { case 0x00: INST_NAME("ADD Eb, Gb"); SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); @@ -176,24 +176,24 @@ uintptr_t dynarec64_00_0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int break; case 0x0F: - switch(rep) { - case 0: - if (rv64_vector) - retaddr = dynarec64_0F_vector(dyn, addr, ip, ninst, rex, ok, need_epilog); - addr = retaddr ? retaddr : dynarec64_0F(dyn, addr, ip, ninst, rex, ok, need_epilog); - break; - case 1: - if (rv64_vector) - retaddr = dynarec64_F20F_vector(dyn, addr, ip, ninst, rex, ok, need_epilog); - addr = retaddr ? retaddr : dynarec64_F20F(dyn, addr, ip, ninst, rex, ok, need_epilog); - break; - case 2: - if (rv64_vector) - retaddr = dynarec64_F30F_vector(dyn, addr, ip, ninst, rex, ok, need_epilog); - addr = retaddr ? retaddr : dynarec64_F30F(dyn, addr, ip, ninst, rex, ok, need_epilog); - break; - default: - DEFAULT; + switch (rep) { + case 0: + if (rv64_vector) + retaddr = dynarec64_0F_vector(dyn, addr, ip, ninst, rex, ok, need_epilog); + addr = retaddr ? retaddr : dynarec64_0F(dyn, addr, ip, ninst, rex, ok, need_epilog); + break; + case 1: + if (rv64_vector) + retaddr = dynarec64_F20F_vector(dyn, addr, ip, ninst, rex, ok, need_epilog); + addr = retaddr ? retaddr : dynarec64_F20F(dyn, addr, ip, ninst, rex, ok, need_epilog); + break; + case 2: + if (rv64_vector) + retaddr = dynarec64_F30F_vector(dyn, addr, ip, ninst, rex, ok, need_epilog); + addr = retaddr ? retaddr : dynarec64_F30F(dyn, addr, ip, ninst, rex, ok, need_epilog); + break; + default: + DEFAULT; } break; case 0x10: @@ -366,7 +366,7 @@ uintptr_t dynarec64_00_0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int } break; case 0x1F: - if(rex.is32bits) { + if (rex.is32bits) { INST_NAME("POP DS"); SMREAD(); POP1_32(x1); @@ -495,7 +495,7 @@ uintptr_t dynarec64_00_0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int GETGD; GETED(0); emit_xor32(dyn, ninst, rex, ed, gd, x3, x4); - if(ed!=gd) { + if (ed != gd) { WBACK; } break; @@ -572,7 +572,7 @@ uintptr_t dynarec64_00_0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); u8 = F8; ANDI(x1, xRAX, 0xff); - if(u8) { + if (u8) { MOV32w(x2, u8); emit_cmp8(dyn, ninst, x1, x2, x3, x4, x5, x6); } else { @@ -583,7 +583,7 @@ uintptr_t dynarec64_00_0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int INST_NAME("CMP EAX, Id"); SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); i64 = F32S; - if(i64) { + if (i64) { MOV64xw(x2, i64); emit_cmp32(dyn, ninst, rex, xRAX, x2, x3, x4, x5, x6); } else @@ -594,5 +594,5 @@ uintptr_t dynarec64_00_0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int DEFAULT; } - return addr; + return addr; } diff --git a/src/dynarec/rv64/dynarec_rv64_00_1.c b/src/dynarec/rv64/dynarec_rv64_00_1.c index 77afd61d..1d2d6dbc 100644 --- a/src/dynarec/rv64/dynarec_rv64_00_1.c +++ b/src/dynarec/rv64/dynarec_rv64_00_1.c @@ -52,7 +52,7 @@ uintptr_t dynarec64_00_1(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int MAYUSE(lock); MAYUSE(cacheupd); - switch(opcode) { + switch (opcode) { case 0x40: case 0x41: case 0x42: @@ -63,7 +63,7 @@ uintptr_t dynarec64_00_1(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int case 0x47: INST_NAME("INC Reg (32bits)"); SETFLAGS(X_ALL & ~X_CF, SF_SUBSET_PENDING, NAT_FLAGS_FUSION); - gd = xRAX + (opcode&7); + gd = TO_NAT(opcode & 7); emit_inc32(dyn, ninst, rex, gd, x1, x2, x3, x4); break; case 0x48: @@ -76,7 +76,7 @@ uintptr_t dynarec64_00_1(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int case 0x4F: INST_NAME("DEC Reg (32bits)"); SETFLAGS(X_ALL & ~X_CF, SF_SUBSET_PENDING, NAT_FLAGS_FUSION); - gd = xRAX + (opcode&7); + gd = TO_NAT(opcode & 7); emit_dec32(dyn, ninst, rex, gd, x1, x2, x3, x4); break; case 0x50: @@ -88,7 +88,7 @@ uintptr_t dynarec64_00_1(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int case 0x56: case 0x57: INST_NAME("PUSH reg"); - gd = xRAX+(opcode&0x07)+(rex.b<<3); + gd = TO_NAT((opcode & 0x07) + (rex.b << 3)); PUSH1z(gd); break; case 0x58: @@ -100,12 +100,12 @@ uintptr_t dynarec64_00_1(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int case 0x5E: case 0x5F: INST_NAME("POP reg"); - gd = xRAX+(opcode&0x07)+(rex.b<<3); + gd = TO_NAT((opcode & 0x07) + (rex.b << 3)); POP1z(gd); break; case 0x60: - if(rex.is32bits) { + if (rex.is32bits) { INST_NAME("PUSHAD"); AND(x1, xRSP, xMASK); PUSH1_32(xRAX); @@ -121,7 +121,7 @@ uintptr_t dynarec64_00_1(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int } break; case 0x61: - if(rex.is32bits) { + if (rex.is32bits) { INST_NAME("POPAD"); POP1_32(xRDI); POP1_32(xRSI); @@ -136,9 +136,9 @@ uintptr_t dynarec64_00_1(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int } break; case 0x62: - if(rex.is32bits) { + if (rex.is32bits) { // BOUND here - DEFAULT; + DEFAULT; } else { INST_NAME("BOUND Gd, Ed"); nextop = F8; @@ -146,25 +146,25 @@ uintptr_t dynarec64_00_1(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int } break; case 0x63: - if(rex.is32bits) { + if (rex.is32bits) { // this is ARPL opcode DEFAULT; } else { INST_NAME("MOVSXD Gd, Ed"); nextop = F8; GETGD; - if(rex.w) { - if(MODREG) { // reg <= reg - ADDIW(gd, xRAX+(nextop&7)+(rex.b<<3), 0); - } else { // mem <= reg + if (rex.w) { + if (MODREG) { // reg <= reg + ADDIW(gd, TO_NAT((nextop & 7) + (rex.b << 3)), 0); + } else { // mem <= reg SMREAD(); addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, NULL, 1, 0); LW(gd, ed, fixedaddress); } } else { - if(MODREG) { // reg <= reg - AND(gd, xRAX+(nextop&7)+(rex.b<<3), xMASK); - } else { // mem <= reg + if (MODREG) { // reg <= reg + AND(gd, TO_NAT((nextop & 7) + (rex.b << 3)), xMASK); + } else { // mem <= reg SMREAD(); addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, NULL, 1, 0); LWU(gd, ed, fixedaddress); @@ -186,7 +186,7 @@ uintptr_t dynarec64_00_1(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int addr = dynarec64_66(dyn, addr, ip, ninst, rex, rep, ok, need_epilog); break; case 0x67: - if(rex.is32bits) + if (rex.is32bits) addr = dynarec64_67_32(dyn, addr, ip, ninst, rex, rep, ok, need_epilog); else { if (rv64_vector) @@ -197,9 +197,9 @@ uintptr_t dynarec64_00_1(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int case 0x68: INST_NAME("PUSH Id"); i64 = F32S; - if(PK(0)==0xC3) { + if (PK(0) == 0xC3) { MESSAGE(LOG_DUMP, "PUSH then RET, using indirect\n"); - TABLE64(x3, addr-4); + TABLE64(x3, addr - 4); LW(x1, x3, 0); PUSH1z(x1); } else { @@ -215,7 +215,7 @@ uintptr_t dynarec64_00_1(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int GETED(4); i64 = F32S; MOV64xw(x4, i64); - if(rex.w) { + if (rex.w) { // 64bits imul UFLAG_IF { MULH(x3, ed, x4); @@ -255,7 +255,7 @@ uintptr_t dynarec64_00_1(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int GETED(1); i64 = F8S; MOV64xw(x4, i64); - if(rex.w) { + if (rex.w) { // 64bits imul UFLAG_IF { MULH(x3, ed, x4); @@ -348,5 +348,5 @@ uintptr_t dynarec64_00_1(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int DEFAULT; } - return addr; + return addr; } diff --git a/src/dynarec/rv64/dynarec_rv64_00_2.c b/src/dynarec/rv64/dynarec_rv64_00_2.c index 82552d29..6472d643 100644 --- a/src/dynarec/rv64/dynarec_rv64_00_2.c +++ b/src/dynarec/rv64/dynarec_rv64_00_2.c @@ -49,10 +49,10 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int MAYUSE(lock); MAYUSE(cacheupd); - switch(opcode) { + switch (opcode) { case 0x80: nextop = F8; - switch((nextop>>3)&7) { + switch ((nextop >> 3) & 7) { case 0: // ADD INST_NAME("ADD Eb, Ib"); SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); @@ -116,7 +116,7 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); GETEB(x1, 1); u8 = F8; - if(u8) { + if (u8) { ADDI(x2, xZR, u8); emit_cmp8(dyn, ninst, x1, x2, x9, x4, x5, x6); } else { @@ -130,77 +130,133 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int case 0x81: case 0x83: nextop = F8; - switch((nextop>>3)&7) { + switch ((nextop >> 3) & 7) { case 0: // ADD - if(opcode==0x81) {INST_NAME("ADD Ed, Id");} else {INST_NAME("ADD Ed, Ib");} + if (opcode == 0x81) { + INST_NAME("ADD Ed, Id"); + } else { + INST_NAME("ADD Ed, Ib"); + } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETED((opcode==0x81)?4:1); - if(opcode==0x81) i64 = F32S; else i64 = F8S; + GETED((opcode == 0x81) ? 4 : 1); + if (opcode == 0x81) + i64 = F32S; + else + i64 = F8S; emit_add32c(dyn, ninst, rex, ed, i64, x3, x4, x5, x6); WBACK; break; case 1: // OR - if(opcode==0x81) {INST_NAME("OR Ed, Id");} else {INST_NAME("OR Ed, Ib");} + if (opcode == 0x81) { + INST_NAME("OR Ed, Id"); + } else { + INST_NAME("OR Ed, Ib"); + } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETED((opcode==0x81)?4:1); - if(opcode==0x81) i64 = F32S; else i64 = F8S; + GETED((opcode == 0x81) ? 4 : 1); + if (opcode == 0x81) + i64 = F32S; + else + i64 = F8S; emit_or32c(dyn, ninst, rex, ed, i64, x3, x4); WBACK; break; case 2: // ADC - if(opcode==0x81) {INST_NAME("ADC Ed, Id");} else {INST_NAME("ADC Ed, Ib");} + if (opcode == 0x81) { + INST_NAME("ADC Ed, Id"); + } else { + INST_NAME("ADC Ed, Ib"); + } READFLAGS(X_CF); SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETED((opcode==0x81)?4:1); - if(opcode==0x81) i64 = F32S; else i64 = F8S; + GETED((opcode == 0x81) ? 4 : 1); + if (opcode == 0x81) + i64 = F32S; + else + i64 = F8S; MOV64xw(x5, i64); emit_adc32(dyn, ninst, rex, ed, x5, x3, x4, x6, x9); WBACK; break; case 3: // SBB - if(opcode==0x81) {INST_NAME("SBB Ed, Id");} else {INST_NAME("SBB Ed, Ib");} + if (opcode == 0x81) { + INST_NAME("SBB Ed, Id"); + } else { + INST_NAME("SBB Ed, Ib"); + } READFLAGS(X_CF); SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETED((opcode==0x81)?4:1); - if(opcode==0x81) i64 = F32S; else i64 = F8S; + GETED((opcode == 0x81) ? 4 : 1); + if (opcode == 0x81) + i64 = F32S; + else + i64 = F8S; MOV64xw(x5, i64); emit_sbb32(dyn, ninst, rex, ed, x5, x3, x4, x6); WBACK; break; case 4: // AND - if(opcode==0x81) {INST_NAME("AND Ed, Id");} else {INST_NAME("AND Ed, Ib");} + if (opcode == 0x81) { + INST_NAME("AND Ed, Id"); + } else { + INST_NAME("AND Ed, Ib"); + } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETED((opcode==0x81)?4:1); - if(opcode==0x81) i64 = F32S; else i64 = F8S; + GETED((opcode == 0x81) ? 4 : 1); + if (opcode == 0x81) + i64 = F32S; + else + i64 = F8S; emit_and32c(dyn, ninst, rex, ed, i64, x3, x4); WBACK; break; case 5: // SUB - if(opcode==0x81) {INST_NAME("SUB Ed, Id");} else {INST_NAME("SUB Ed, Ib");} + if (opcode == 0x81) { + INST_NAME("SUB Ed, Id"); + } else { + INST_NAME("SUB Ed, Ib"); + } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETED((opcode==0x81)?4:1); - if(opcode==0x81) i64 = F32S; else i64 = F8S; + GETED((opcode == 0x81) ? 4 : 1); + if (opcode == 0x81) + i64 = F32S; + else + i64 = F8S; emit_sub32c(dyn, ninst, rex, ed, i64, x3, x4, x5, x6); WBACK; break; case 6: // XOR - if(opcode==0x81) {INST_NAME("XOR Ed, Id");} else {INST_NAME("XOR Ed, Ib");} + if (opcode == 0x81) { + INST_NAME("XOR Ed, Id"); + } else { + INST_NAME("XOR Ed, Ib"); + } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETED((opcode==0x81)?4:1); - if(opcode==0x81) i64 = F32S; else i64 = F8S; + GETED((opcode == 0x81) ? 4 : 1); + if (opcode == 0x81) + i64 = F32S; + else + i64 = F8S; emit_xor32c(dyn, ninst, rex, ed, i64, x3, x4); WBACK; break; case 7: // CMP - if(opcode==0x81) {INST_NAME("CMP Ed, Id");} else {INST_NAME("CMP Ed, Ib");} + if (opcode == 0x81) { + INST_NAME("CMP Ed, Id"); + } else { + INST_NAME("CMP Ed, Ib"); + } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETED((opcode==0x81)?4:1); - if(opcode==0x81) i64 = F32S; else i64 = F8S; - if(i64) { + GETED((opcode == 0x81) ? 4 : 1); + if (opcode == 0x81) + i64 = F32S; + else + i64 = F8S; + if (i64) { MOV64xw(x2, i64); emit_cmp32(dyn, ninst, rex, ed, x2, x3, x4, x5, x6); } else { - if(!rex.w && MODREG) { + if (!rex.w && MODREG) { AND(x1, ed, xMASK); ed = x1; } @@ -212,7 +268,7 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int case 0x84: INST_NAME("TEST Eb, Gb"); SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - nextop=F8; + nextop = F8; GETEB(x1, 0); GETGB(x2); emit_test8(dyn, ninst, x1, x2, x6, x4, x5); @@ -220,7 +276,7 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int case 0x85: INST_NAME("TEST Ed, Gd"); SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - nextop=F8; + nextop = F8; GETGD; GETED(0); emit_test32(dyn, ninst, rex, ed, gd, x3, x4, x5); @@ -228,7 +284,7 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int case 0x86: INST_NAME("(LOCK) XCHG Eb, Gb"); nextop = F8; - if(MODREG) { + if (MODREG) { GETGB(x1); GETEB(x2, 0); MV(x4, gd); @@ -272,7 +328,7 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int case 0x87: INST_NAME("(LOCK) XCHG Ed, Gd"); nextop = F8; - if(MODREG) { + if (MODREG) { GETGD; GETED(0); MVxw(x1, gd); @@ -304,30 +360,30 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int case 0x88: INST_NAME("MOV Eb, Gb"); nextop = F8; - gd = ((nextop&0x38)>>3)+(rex.r<<3); - if(rex.rex) { + gd = ((nextop & 0x38) >> 3) + (rex.r << 3); + if (rex.rex) { gb2 = 0; - gb1 = xRAX + gd; + gb1 = TO_NAT(gd); } else { - gb2 = ((gd&4)>>2); - gb1 = xRAX+(gd&3); + gb2 = ((gd & 4) >> 2); + gb1 = TO_NAT(gd & 3); } gd = x4; - if(gb2) { + if (gb2) { SRLI(x4, gb1, 8); gb1 = x4; } - if(MODREG) { - ed = (nextop&7) + (rex.b<<3); - if(rex.rex) { - eb1 = xRAX+ed; + if (MODREG) { + ed = (nextop & 7) + (rex.b << 3); + if (rex.rex) { + eb1 = TO_NAT(ed); eb2 = 0; } else { - eb1 = xRAX+(ed&3); // Ax, Cx, Dx or Bx - eb2 = ((ed&4)>>2); // L or H + eb1 = TO_NAT(ed & 3); // Ax, Cx, Dx or Bx + eb2 = ((ed & 4) >> 2); // L or H } ANDI(gd, gb1, 0xff); - if(eb2) { + if (eb2) { MOV64x(x1, 0xffffffffffff00ffLL); AND(x1, eb1, x1); SLLI(gd, gd, 8); @@ -344,11 +400,11 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int break; case 0x89: INST_NAME("MOV Ed, Gd"); - nextop=F8; + nextop = F8; GETGD; - if(MODREG) { // reg <= reg - MVxw(xRAX+(nextop&7)+(rex.b<<3), gd); - } else { // mem <= reg + if (MODREG) { // reg <= reg + MVxw(TO_NAT((nextop & 7) + (rex.b << 3)), gd); + } else { // mem <= reg addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, &lock, 1, 0); SDxw(gd, ed, fixedaddress); SMWRITELOCK(lock); @@ -357,25 +413,25 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int case 0x8A: INST_NAME("MOV Gb, Eb"); nextop = F8; - gd = ((nextop&0x38)>>3)+(rex.r<<3); - if(rex.rex) { + gd = ((nextop & 0x38) >> 3) + (rex.r << 3); + if (rex.rex) { gb2 = 0; - gb1 = xRAX + gd; + gb1 = TO_NAT(gd); } else { - gb2 = ((gd&4)>>2); - gb1 = xRAX+(gd&3); + gb2 = ((gd & 4) >> 2); + gb1 = TO_NAT(gd & 3); } gd = x4; - if(MODREG) { - ed = (nextop&7) + (rex.b<<3); - if(rex.rex) { - eb1 = xRAX+ed; + if (MODREG) { + ed = (nextop & 7) + (rex.b << 3); + if (rex.rex) { + eb1 = TO_NAT(ed); eb2 = 0; } else { - eb1 = xRAX+(ed&3); // Ax, Cx, Dx or Bx - eb2 = ((ed&4)>>2); // L or H + eb1 = TO_NAT(ed & 3); // Ax, Cx, Dx or Bx + eb2 = ((ed & 4) >> 2); // L or H } - if(eb2) { + if (eb2) { SRLI(x1, eb1, 8); ANDI(x1, x1, 0xff); } else { @@ -386,7 +442,7 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int SMREADLOCK(lock); LBU(x1, ed, fixedaddress); } - if(gb2) { + if (gb2) { MOV64x(x4, ~0xff00); AND(gb1, gb1, x4); SLLI(x1, x1, 8); @@ -397,10 +453,10 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int break; case 0x8B: INST_NAME("MOV Gd, Ed"); - nextop=F8; + nextop = F8; GETGD; - if(MODREG) { - MVxw(gd, xRAX+(nextop&7)+(rex.b<<3)); + if (MODREG) { + MVxw(gd, TO_NAT((nextop & 7) + (rex.b << 3))); } else { addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, &lock, 1, 0); SMREADLOCK(lock); @@ -409,23 +465,23 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int break; case 0x8C: INST_NAME("MOV Ed, Seg"); - nextop=F8; - if((nextop&0xC0)==0xC0) { // reg <= seg - LHU(xRAX+(nextop&7)+(rex.b<<3), xEmu, offsetof(x64emu_t, segs[(nextop&0x38)>>3])); - } else { // mem <= seg + nextop = F8; + if ((nextop & 0xC0) == 0xC0) { // reg <= seg + LHU(TO_NAT((nextop & 7) + (rex.b << 3)), xEmu, offsetof(x64emu_t, segs[(nextop & 0x38) >> 3])); + } else { // mem <= seg addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, NULL, 1, 0); - LHU(x3, xEmu, offsetof(x64emu_t, segs[(nextop&0x38)>>3])); + LHU(x3, xEmu, offsetof(x64emu_t, segs[(nextop & 0x38) >> 3])); SH(x3, ed, fixedaddress); SMWRITE2(); } break; case 0x8D: INST_NAME("LEA Gd, Ed"); - nextop=F8; + nextop = F8; GETGD; - if(MODREG) { // reg <= reg? that's an invalid operation + if (MODREG) { // reg <= reg? that's an invalid operation DEFAULT; - } else { // mem <= reg + } else { // mem <= reg addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, NULL, 0, 0); if (gd != ed) { MV(gd, ed); } if (!rex.w || rex.is32bits) { @@ -436,32 +492,32 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int case 0x8E: INST_NAME("MOV Seg,Ew"); nextop = F8; - if((nextop&0xC0)==0xC0) { - ed = xRAX+(nextop&7)+(rex.b<<3); + if ((nextop & 0xC0) == 0xC0) { + ed = TO_NAT((nextop & 7) + (rex.b << 3)); } else { SMREAD(); addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, &lock, 1, 0); LHU(x1, ed, fixedaddress); ed = x1; } - SH(ed, xEmu, offsetof(x64emu_t, segs[(nextop&0x38)>>3])); - SW(xZR, xEmu, offsetof(x64emu_t, segs_serial[(nextop&0x38)>>3])); + SH(ed, xEmu, offsetof(x64emu_t, segs[(nextop & 0x38) >> 3])); + SW(xZR, xEmu, offsetof(x64emu_t, segs_serial[(nextop & 0x38) >> 3])); break; case 0x8F: INST_NAME("POP Ed"); nextop = F8; - if(MODREG) { - POP1z(xRAX+(nextop&7)+(rex.b<<3)); + if (MODREG) { + POP1z(TO_NAT((nextop & 7) + (rex.b << 3))); } else { POP1z(x2); // so this can handle POP [ESP] and maybe some variant too addr = geted(dyn, addr, ninst, nextop, &ed, x3, x1, &fixedaddress, rex, &lock, 1, 0); - if(ed==xRSP) { + if (ed == xRSP) { SDz(x2, ed, fixedaddress); } else { // complicated to just allow a segfault that can be recovered correctly - ADDIz(xRSP, xRSP, rex.is32bits?-4:-8); + ADDIz(xRSP, xRSP, rex.is32bits ? -4 : -8); SDz(x2, ed, fixedaddress); - ADDIz(xRSP, xRSP, rex.is32bits?4:8); + ADDIz(xRSP, xRSP, rex.is32bits ? 4 : 8); } } break; @@ -473,8 +529,8 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int case 0x95: case 0x96: case 0x97: - gd = xRAX+(opcode&0x07)+(rex.b<<3); - if(gd==xRAX) { + gd = TO_NAT((opcode & 0x07) + (rex.b << 3)); + if (gd == xRAX) { INST_NAME("NOP"); } else { INST_NAME("XCHG EAX, Reg"); @@ -485,7 +541,7 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int break; case 0x98: INST_NAME("CWDE"); - if(rex.w) { + if (rex.w) { SEXT_W(xRAX, xRAX); } else { SLLI(xRAX, xRAX, 16); @@ -495,7 +551,7 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int break; case 0x99: INST_NAME("CDQ"); - if(rex.w) { + if (rex.w) { SRAI(xRDX, xRAX, 63); } else { SLLI(xRDX, xRAX, 32); @@ -522,7 +578,7 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int AND(xFlags, xFlags, x1); ORI(xFlags, xFlags, 0x202); SET_DFNONE(); - if(box64_wine) { // should this be done all the time? + if (box64_wine) { // should this be done all the time? ANDI(x1, xFlags, 1 << F_TF); CBZ_NEXT(x1); // go to epilog, TF should trigger at end of next opcode, so using Interpreter only @@ -551,7 +607,10 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int break; case 0xA0: INST_NAME("MOV AL,Ob"); - if(rex.is32bits) u64 = F32; else u64 = F64; + if (rex.is32bits) + u64 = F32; + else + u64 = F64; MOV64z(x1, u64); LBU(x1, x1, 0); ANDI(xRAX, xRAX, ~0xff); @@ -559,31 +618,40 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int break; case 0xA1: INST_NAME("MOV EAX,Od"); - if(rex.is32bits) u64 = F32; else u64 = F64; + if (rex.is32bits) + u64 = F32; + else + u64 = F64; MOV64z(x1, u64); LDxw(xRAX, x1, 0); break; case 0xA2: INST_NAME("MOV Ob,AL"); - if(rex.is32bits) u64 = F32; else u64 = F64; + if (rex.is32bits) + u64 = F32; + else + u64 = F64; MOV64z(x1, u64); SB(xRAX, x1, 0); SMWRITE(); break; case 0xA3: INST_NAME("MOV Od,EAX"); - if(rex.is32bits) u64 = F32; else u64 = F64; + if (rex.is32bits) + u64 = F32; + else + u64 = F64; MOV64z(x1, u64); SDxw(xRAX, x1, 0); SMWRITE(); break; case 0xA4: - if(rep) { + if (rep) { INST_NAME("REP MOVSB"); CBZ_NEXT(xRCX); - ANDI(x1, xFlags, 1<<F_DF); + ANDI(x1, xFlags, 1 << F_DF); BNEZ_MARK2(x1); - MARK; // Part with DF==0 + MARK; // Part with DF==0 LBU(x1, xRSI, 0); SB(x1, xRDI, 0); ADDI(xRSI, xRSI, 1); @@ -591,7 +659,7 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int SUBI(xRCX, xRCX, 1); BNEZ_MARK(xRCX); B_NEXT_nocond; - MARK2; // Part with DF==1 + MARK2; // Part with DF==1 LBU(x1, xRSI, 0); SB(x1, xRDI, 0); SUBI(xRSI, xRSI, 1); @@ -609,30 +677,30 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int } break; case 0xA5: - if(rep) { + if (rep) { INST_NAME("REP MOVSD"); CBZ_NEXT(xRCX); - ANDI(x1, xFlags, 1<<F_DF); + ANDI(x1, xFlags, 1 << F_DF); BNEZ_MARK2(x1); - MARK; // Part with DF==0 + MARK; // Part with DF==0 LDxw(x1, xRSI, 0); SDxw(x1, xRDI, 0); - ADDI(xRSI, xRSI, rex.w?8:4); - ADDI(xRDI, xRDI, rex.w?8:4); + ADDI(xRSI, xRSI, rex.w ? 8 : 4); + ADDI(xRDI, xRDI, rex.w ? 8 : 4); SUBI(xRCX, xRCX, 1); BNEZ_MARK(xRCX); B_NEXT_nocond; - MARK2; // Part with DF==1 + MARK2; // Part with DF==1 LDxw(x1, xRSI, 0); SDxw(x1, xRDI, 0); - SUBI(xRSI, xRSI, rex.w?8:4); - SUBI(xRDI, xRDI, rex.w?8:4); + SUBI(xRSI, xRSI, rex.w ? 8 : 4); + SUBI(xRDI, xRDI, rex.w ? 8 : 4); SUBI(xRCX, xRCX, 1); BNEZ_MARK2(xRCX); // done } else { INST_NAME("MOVSD"); - GETDIR(x3, x1, rex.w?8:4); + GETDIR(x3, x1, rex.w ? 8 : 4); LDxw(x1, xRSI, 0); SDxw(x1, xRDI, 0); ADD(xRSI, xRSI, x3); @@ -640,52 +708,68 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int } break; case 0xA6: - switch(rep) { - case 1: - case 2: - if(rep==1) {INST_NAME("REPNZ CMPSB");} else {INST_NAME("REPZ CMPSB");} - MAYSETFLAGS(); - SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_NOFUSION); - CBZ_NEXT(xRCX); - ANDI(x1, xFlags, 1<<F_DF); - BNEZ_MARK2(x1); - MARK; // Part with DF==0 - LBU(x1, xRSI, 0); - LBU(x2, xRDI, 0); - ADDI(xRSI, xRSI, 1); - ADDI(xRDI, xRDI, 1); - SUBI(xRCX, xRCX, 1); - if (rep==1) {BEQ_MARK3(x1, x2);} else {BNE_MARK3(x1, x2);} - BNEZ_MARK(xRCX); - B_MARK3_nocond; - MARK2; // Part with DF==1 - LBU(x1, xRSI, 0); - LBU(x2, xRDI, 0); - SUBI(xRSI, xRSI, 1); - SUBI(xRDI, xRDI, 1); - SUBI(xRCX, xRCX, 1); - if (rep==1) {BEQ_MARK3(x1, x2);} else {BNE_MARK3(x1, x2);} - BNEZ_MARK2(xRCX); - MARK3; // end - emit_cmp8(dyn, ninst, x1, x2, x3, x4, x5, x6); - break; - default: - INST_NAME("CMPSB"); - SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETDIR(x3, x1, 1); - LBU(x1, xRSI, 0); - LBU(x2, xRDI, 0); - ADD(xRSI, xRSI, x3); - ADD(xRDI, xRDI, x3); - emit_cmp8(dyn, ninst, x1, x2, x3, x4, x5, x6); - break; + switch (rep) { + case 1: + case 2: + if (rep == 1) { + INST_NAME("REPNZ CMPSB"); + } else { + INST_NAME("REPZ CMPSB"); + } + MAYSETFLAGS(); + SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_NOFUSION); + CBZ_NEXT(xRCX); + ANDI(x1, xFlags, 1 << F_DF); + BNEZ_MARK2(x1); + MARK; // Part with DF==0 + LBU(x1, xRSI, 0); + LBU(x2, xRDI, 0); + ADDI(xRSI, xRSI, 1); + ADDI(xRDI, xRDI, 1); + SUBI(xRCX, xRCX, 1); + if (rep == 1) { + BEQ_MARK3(x1, x2); + } else { + BNE_MARK3(x1, x2); + } + BNEZ_MARK(xRCX); + B_MARK3_nocond; + MARK2; // Part with DF==1 + LBU(x1, xRSI, 0); + LBU(x2, xRDI, 0); + SUBI(xRSI, xRSI, 1); + SUBI(xRDI, xRDI, 1); + SUBI(xRCX, xRCX, 1); + if (rep == 1) { + BEQ_MARK3(x1, x2); + } else { + BNE_MARK3(x1, x2); + } + BNEZ_MARK2(xRCX); + MARK3; // end + emit_cmp8(dyn, ninst, x1, x2, x3, x4, x5, x6); + break; + default: + INST_NAME("CMPSB"); + SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); + GETDIR(x3, x1, 1); + LBU(x1, xRSI, 0); + LBU(x2, xRDI, 0); + ADD(xRSI, xRSI, x3); + ADD(xRDI, xRDI, x3); + emit_cmp8(dyn, ninst, x1, x2, x3, x4, x5, x6); + break; } break; case 0xA7: switch (rep) { case 1: case 2: - if (rep == 1) { INST_NAME("REPNZ CMPSD"); } else { INST_NAME("REPZ CMPSD"); } + if (rep == 1) { + INST_NAME("REPNZ CMPSD"); + } else { + INST_NAME("REPZ CMPSD"); + } MAYSETFLAGS(); SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_NOFUSION); CBZ_NEXT(xRCX); @@ -697,7 +781,11 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ADDI(xRSI, xRSI, rex.w ? 8 : 4); ADDI(xRDI, xRDI, rex.w ? 8 : 4); SUBI(xRCX, xRCX, 1); - if (rep == 1) { BEQ_MARK3(x1, x2); } else { BNE_MARK3(x1, x2); } + if (rep == 1) { + BEQ_MARK3(x1, x2); + } else { + BNE_MARK3(x1, x2); + } BNEZ_MARK(xRCX); B_MARK3_nocond; MARK2; // Part with DF==1 @@ -706,7 +794,11 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int SUBI(xRSI, xRSI, rex.w ? 8 : 4); SUBI(xRDI, xRDI, rex.w ? 8 : 4); SUBI(xRCX, xRCX, 1); - if (rep == 1) { BEQ_MARK3(x1, x2); } else { BNE_MARK3(x1, x2); } + if (rep == 1) { + BEQ_MARK3(x1, x2); + } else { + BNE_MARK3(x1, x2); + } BNEZ_MARK2(xRCX); MARK3; // end emit_cmp32(dyn, ninst, rex, x1, x2, x3, x4, x5, x6); @@ -739,18 +831,18 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int emit_test32(dyn, ninst, rex, xRAX, x2, x3, x4, x5); break; case 0xAA: - if(rep) { + if (rep) { INST_NAME("REP STOSB"); CBZ_NEXT(xRCX); - ANDI(x1, xFlags, 1<<F_DF); + ANDI(x1, xFlags, 1 << F_DF); BNEZ_MARK2(x1); - MARK; // Part with DF==0 + MARK; // Part with DF==0 SB(xRAX, xRDI, 0); ADDI(xRDI, xRDI, 1); ADDI(xRCX, xRCX, -1); BNEZ_MARK(xRCX); B_NEXT_nocond; - MARK2; // Part with DF==1 + MARK2; // Part with DF==1 SB(xRAX, xRDI, 0); ADDI(xRDI, xRDI, -1); ADDI(xRCX, xRCX, -1); @@ -764,26 +856,26 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int } break; case 0xAB: - if(rep) { + if (rep) { INST_NAME("REP STOSD"); CBZ_NEXT(xRCX); - ANDI(x1, xFlags, 1<<F_DF); + ANDI(x1, xFlags, 1 << F_DF); BNEZ_MARK2(x1); - MARK; // Part with DF==0 + MARK; // Part with DF==0 SDxw(xRAX, xRDI, 0); - ADDI(xRDI, xRDI, rex.w?8:4); + ADDI(xRDI, xRDI, rex.w ? 8 : 4); SUBI(xRCX, xRCX, 1); BNEZ_MARK(xRCX); B_NEXT_nocond; - MARK2; // Part with DF==1 + MARK2; // Part with DF==1 SDxw(xRAX, xRDI, 0); - SUBI(xRDI, xRDI, rex.w?8:4); + SUBI(xRDI, xRDI, rex.w ? 8 : 4); SUBI(xRCX, xRCX, 1); BNEZ_MARK2(xRCX); // done } else { INST_NAME("STOSD"); - GETDIR(x3, x1, rex.w?8:4); + GETDIR(x3, x1, rex.w ? 8 : 4); SDxw(xRAX, xRDI, 0); ADD(xRDI, xRDI, x3); } @@ -812,77 +904,105 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int break; case 0xAE: switch (rep) { - case 1: - case 2: - if (rep==1) {INST_NAME("REPNZ SCASB");} else {INST_NAME("REPZ SCASB");} - MAYSETFLAGS(); - SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_NOFUSION); - CBZ_NEXT(xRCX); - ANDI(x1, xRAX, 0xff); - ANDI(x2, xFlags, 1<<F_DF); - BNEZ_MARK2(x2); - MARK; // Part with DF==0 - LBU(x2, xRDI, 0); - ADDI(xRDI, xRDI, 1); - SUBI(xRCX, xRCX, 1); - if (rep==1) {BEQ_MARK3(x1, x2);} else {BNE_MARK3(x1, x2);} - BNE_MARK(xRCX, xZR); - B_MARK3_nocond; - MARK2; // Part with DF==1 - LBU(x2, xRDI, 0); - SUBI(xRDI, xRDI, 1); - SUBI(xRCX, xRCX, 1); - if (rep==1) {BEQ_MARK3(x1, x2);} else {BNE_MARK3(x1, x2);} - BNE_MARK2(xRCX, xZR); - MARK3; // end - emit_cmp8(dyn, ninst, x1, x2, x3, x4, x5, x6); - break; - default: - INST_NAME("SCASB"); - SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_NOFUSION); - GETDIR(x3, x1, 1); - ANDI(x1, xRAX, 0xff); - LBU(x2, xRDI, 0); - ADD(xRDI, xRDI, x3); - emit_cmp8(dyn, ninst, x1, x2, x3, x4, x5, x6); - break; + case 1: + case 2: + if (rep == 1) { + INST_NAME("REPNZ SCASB"); + } else { + INST_NAME("REPZ SCASB"); + } + MAYSETFLAGS(); + SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_NOFUSION); + CBZ_NEXT(xRCX); + ANDI(x1, xRAX, 0xff); + ANDI(x2, xFlags, 1 << F_DF); + BNEZ_MARK2(x2); + MARK; // Part with DF==0 + LBU(x2, xRDI, 0); + ADDI(xRDI, xRDI, 1); + SUBI(xRCX, xRCX, 1); + if (rep == 1) { + BEQ_MARK3(x1, x2); + } else { + BNE_MARK3(x1, x2); + } + BNE_MARK(xRCX, xZR); + B_MARK3_nocond; + MARK2; // Part with DF==1 + LBU(x2, xRDI, 0); + SUBI(xRDI, xRDI, 1); + SUBI(xRCX, xRCX, 1); + if (rep == 1) { + BEQ_MARK3(x1, x2); + } else { + BNE_MARK3(x1, x2); + } + BNE_MARK2(xRCX, xZR); + MARK3; // end + emit_cmp8(dyn, ninst, x1, x2, x3, x4, x5, x6); + break; + default: + INST_NAME("SCASB"); + SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_NOFUSION); + GETDIR(x3, x1, 1); + ANDI(x1, xRAX, 0xff); + LBU(x2, xRDI, 0); + ADD(xRDI, xRDI, x3); + emit_cmp8(dyn, ninst, x1, x2, x3, x4, x5, x6); + break; } break; case 0xAF: switch (rep) { - case 1: - case 2: - if (rep==1) {INST_NAME("REPNZ SCASD");} else {INST_NAME("REPZ SCASD");} - MAYSETFLAGS(); - SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_NOFUSION); - CBZ_NEXT(xRCX); - if (rex.w) {MV(x1, xRAX);} else {AND(x1, xRAX, xMASK);} - ANDI(x2, xFlags, 1<<F_DF); - BNEZ_MARK2(x2); - MARK; // Part with DF==0 - LDxw(x2, xRDI, 0); - ADDI(xRDI, xRDI, rex.w?8:4); - SUBI(xRCX, xRCX, 1); - if (rep==1) {BEQ_MARK3(x1, x2);} else {BNE_MARK3(x1, x2);} - BNE_MARK(xRCX, xZR); - B_MARK3_nocond; - MARK2; // Part with DF==1 - LDxw(x2, xRDI, 0); - SUBI(xRDI, xRDI, rex.w?8:4); - SUBI(xRCX, xRCX, 1); - if (rep==1) {BEQ_MARK3(x1, x2);} else {BNE_MARK3(x1, x2);} - BNE_MARK2(xRCX, xZR); - MARK3; // end - emit_cmp32(dyn, ninst, rex, x1, x2, x3, x4, x5, x6); - break; - default: - INST_NAME("SCASD"); - SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_NOFUSION); - GETDIR(x3, x1, rex.w?8:4); - LDxw(x2, xRDI, 0); - ADD(xRDI, xRDI, x3); - emit_cmp32(dyn, ninst, rex, xRAX, x2, x3, x4, x5, x6); - break; + case 1: + case 2: + if (rep == 1) { + INST_NAME("REPNZ SCASD"); + } else { + INST_NAME("REPZ SCASD"); + } + MAYSETFLAGS(); + SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_NOFUSION); + CBZ_NEXT(xRCX); + if (rex.w) { + MV(x1, xRAX); + } else { + AND(x1, xRAX, xMASK); + } + ANDI(x2, xFlags, 1 << F_DF); + BNEZ_MARK2(x2); + MARK; // Part with DF==0 + LDxw(x2, xRDI, 0); + ADDI(xRDI, xRDI, rex.w ? 8 : 4); + SUBI(xRCX, xRCX, 1); + if (rep == 1) { + BEQ_MARK3(x1, x2); + } else { + BNE_MARK3(x1, x2); + } + BNE_MARK(xRCX, xZR); + B_MARK3_nocond; + MARK2; // Part with DF==1 + LDxw(x2, xRDI, 0); + SUBI(xRDI, xRDI, rex.w ? 8 : 4); + SUBI(xRCX, xRCX, 1); + if (rep == 1) { + BEQ_MARK3(x1, x2); + } else { + BNE_MARK3(x1, x2); + } + BNE_MARK2(xRCX, xZR); + MARK3; // end + emit_cmp32(dyn, ninst, rex, x1, x2, x3, x4, x5, x6); + break; + default: + INST_NAME("SCASD"); + SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_NOFUSION); + GETDIR(x3, x1, rex.w ? 8 : 4); + LDxw(x2, xRDI, 0); + ADD(xRDI, xRDI, x3); + emit_cmp32(dyn, ninst, rex, xRAX, x2, x3, x4, x5, x6); + break; } break; case 0xB0: @@ -891,10 +1011,10 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int case 0xB3: INST_NAME("MOV xL, Ib"); u8 = F8; - if(rex.rex) - gb1 = xRAX+(opcode&7)+(rex.b<<3); + if (rex.rex) + gb1 = TO_NAT((opcode & 7) + (rex.b << 3)); else - gb1 = xRAX+(opcode&3); + gb1 = TO_NAT(opcode & 3); ANDI(gb1, gb1, ~0xff); ORI(gb1, gb1, u8); break; @@ -904,13 +1024,13 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int case 0xB7: INST_NAME("MOV xH, Ib"); u8 = F8; - if(rex.rex) { - gb1 = xRAX+(opcode&7)+(rex.b<<3); + if (rex.rex) { + gb1 = TO_NAT((opcode & 7) + (rex.b << 3)); ANDI(gb1, gb1, ~0xff); ORI(gb1, gb1, u8); } else { MOV32w(x1, u8); - gb1 = xRAX+(opcode&3); + gb1 = TO_NAT(opcode & 3); MOV64x(x2, 0xffffffffffff00ffLL); AND(gb1, gb1, x2); SLLI(x1, x1, 8); @@ -926,8 +1046,8 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int case 0xBE: case 0xBF: INST_NAME("MOV Reg, Id"); - gd = xRAX+(opcode&7)+(rex.b<<3); - if(rex.w) { + gd = TO_NAT((opcode & 7) + (rex.b << 3)); + if (rex.w) { u64 = F64; MOV64x(gd, u64); } else { @@ -939,5 +1059,5 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int DEFAULT; } - return addr; + return addr; } diff --git a/src/dynarec/rv64/dynarec_rv64_00_3.c b/src/dynarec/rv64/dynarec_rv64_00_3.c index 7c5c7a1f..d4ff674a 100644 --- a/src/dynarec/rv64/dynarec_rv64_00_3.c +++ b/src/dynarec/rv64/dynarec_rv64_00_3.c @@ -52,10 +52,10 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int MAYUSE(lock); MAYUSE(cacheupd); - switch(opcode) { + switch (opcode) { case 0xC0: nextop = F8; - switch((nextop>>3)&7) { + switch ((nextop >> 3) & 7) { case 0: INST_NAME("ROL Eb, Ib"); MESSAGE(LOG_DUMP, "Need Optimization\n"); @@ -147,7 +147,7 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int break; case 0xC1: nextop = F8; - switch((nextop>>3)&7) { + switch ((nextop >> 3) & 7) { case 0: INST_NAME("ROL Ed, Ib"); u8 = geted_ib(dyn, addr, ninst, nextop) & (rex.w ? 0x3f : 0x1f); @@ -193,24 +193,24 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int MESSAGE(LOG_DUMP, "Need Optimization\n"); READFLAGS(X_CF); SETFLAGS(X_OF | X_CF, SF_SET_DF, NAT_FLAGS_NOFUSION); - u8 = (F8)&(rex.w?0x3f:0x1f); + u8 = (F8) & (rex.w ? 0x3f : 0x1f); MOV32w(x2, u8); GETEDW(x4, x1, 0); - CALL_(rex.w?((void*)rcl64):((void*)rcl32), ed, x4); + CALL_(rex.w ? ((void*)rcl64) : ((void*)rcl32), ed, x4); WBACK; - if(!wback && !rex.w) ZEROUP(ed); + if (!wback && !rex.w) ZEROUP(ed); break; case 3: INST_NAME("RCR Ed, Ib"); MESSAGE(LOG_DUMP, "Need Optimization\n"); READFLAGS(X_CF); SETFLAGS(X_OF | X_CF, SF_SET_DF, NAT_FLAGS_NOFUSION); - u8 = (F8)&(rex.w?0x3f:0x1f); + u8 = (F8) & (rex.w ? 0x3f : 0x1f); MOV32w(x2, u8); GETEDW(x4, x1, 0); - CALL_(rex.w?((void*)rcr64):((void*)rcr32), ed, x4); + CALL_(rex.w ? ((void*)rcr64) : ((void*)rcr32), ed, x4); WBACK; - if(!wback && !rex.w) ZEROUP(ed); + if (!wback && !rex.w) ZEROUP(ed); break; case 4: case 6: @@ -279,11 +279,11 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int break; case 0xC2: INST_NAME("RETN"); - //SETFLAGS(X_ALL, SF_SET_NODF); // Hack, set all flags (to an unknown state...) - if(box64_dynarec_safeflags) { - READFLAGS(X_PEND); // lets play safe here too + // SETFLAGS(X_ALL, SF_SET_NODF); // Hack, set all flags (to an unknown state...) + if (box64_dynarec_safeflags) { + READFLAGS(X_PEND); // lets play safe here too } - fpu_purgecache(dyn, ninst, 1, x1, x2, x3); // using next, even if there no next + fpu_purgecache(dyn, ninst, 1, x1, x2, x3); // using next, even if there no next i32 = F16; retn_to_epilog(dyn, ninst, rex, i32); *need_epilog = 0; @@ -292,10 +292,10 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int case 0xC3: INST_NAME("RET"); // SETFLAGS(X_ALL, SF_SET_NODF); // Hack, set all flags (to an unknown state...) - if(box64_dynarec_safeflags) { - READFLAGS(X_PEND); // so instead, force the deferred flags, so it's not too slow, and flags are not lost + if (box64_dynarec_safeflags) { + READFLAGS(X_PEND); // so instead, force the deferred flags, so it's not too slow, and flags are not lost } - fpu_purgecache(dyn, ninst, 1, x1, x2, x3); // using next, even if there no next + fpu_purgecache(dyn, ninst, 1, x1, x2, x3); // using next, even if there no next ret_to_epilog(dyn, ninst, rex); *need_epilog = 0; *ok = 0; @@ -341,15 +341,15 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int break; case 0xC6: INST_NAME("MOV Eb, Ib"); - nextop=F8; - if(MODREG) { // reg <= u8 + nextop = F8; + if (MODREG) { // reg <= u8 u8 = F8; - if(!rex.rex) { - ed = (nextop&7); - eb1 = xRAX+(ed&3); // Ax, Cx, Dx or Bx - eb2 = (ed&4)>>2; // L or H + if (!rex.rex) { + ed = (nextop & 7); + eb1 = TO_NAT(ed & 3); // Ax, Cx, Dx or Bx + eb2 = (ed & 4) >> 2; // L or H } else { - eb1 = xRAX+(nextop&7)+(rex.b<<3); + eb1 = TO_NAT((nextop & 7) + (rex.b << 3)); eb2 = 0; } @@ -359,9 +359,9 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ORI(x3, x3, 0xff); // apply mask AND(eb1, eb1, x3); - if(u8) { - if((u8<<8)<2048) { - ADDI(x4, xZR, u8<<8); + if (u8) { + if ((u8 << 8) < 2048) { + ADDI(x4, xZR, u8 << 8); } else { ADDI(x4, xZR, u8); SLLI(x4, x4, 8); @@ -369,13 +369,13 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int OR(eb1, eb1, x4); } } else { - ANDI(eb1, eb1, 0xf00); // mask ffffffffffffff00 + ANDI(eb1, eb1, 0xf00); // mask ffffffffffffff00 ORI(eb1, eb1, u8); } - } else { // mem <= u8 + } else { // mem <= u8 addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, &lock, 1, 1); u8 = F8; - if(u8) { + if (u8) { ADDI(x3, xZR, u8); ed = x3; } else @@ -386,15 +386,15 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int break; case 0xC7: INST_NAME("MOV Ed, Id"); - nextop=F8; - if(MODREG) { // reg <= i32 + nextop = F8; + if (MODREG) { // reg <= i32 i64 = F32S; - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); MOV64xw(ed, i64); - } else { // mem <= i32 + } else { // mem <= i32 addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, &lock, 1, 4); i64 = F32S; - if(i64) { + if (i64) { MOV64x(x3, i64); ed = x3; } else @@ -413,16 +413,15 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int case 0xCC: SETFLAGS(X_ALL, SF_SET_NODF, NAT_FLAGS_NOFUSION); // Hack, set all flags (to an unknown state...) SKIPTEST(x1); - if(PK(0)=='S' && PK(1)=='C') { - addr+=2; + if (PK(0) == 'S' && PK(1) == 'C') { + addr += 2; BARRIER(BARRIER_FLOAT); INST_NAME("Special Box64 instruction"); - if((PK64(0)==0)) - { - addr+=8; + if ((PK64(0) == 0)) { + addr += 8; MESSAGE(LOG_DEBUG, "Exit x64 Emu\n"); - //GETIP(ip+1+2); // no use - //STORE_XEMU_REGS(xRIP); // no need, done in epilog + // GETIP(ip+1+2); // no use + // STORE_XEMU_REGS(xRIP); // no need, done in epilog MOV64x(x1, 1); SW(x1, xEmu, offsetof(x64emu_t, quit)); *ok = 0; @@ -434,26 +433,26 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int sse_purge07cache(dyn, ninst, x3); // Partially support isSimpleWrapper tmp = isSimpleWrapper(*(wrapper_t*)(addr)); - if(isRetX87Wrapper(*(wrapper_t*)(addr))) + if (isRetX87Wrapper(*(wrapper_t*)(addr))) // return value will be on the stack, so the stack depth needs to be updated x87_purgecache(dyn, ninst, 0, x3, x1, x4); if (tmp < 0 || tmp > 1) tmp = 0; // TODO: removed when FP is in place - if((box64_log<2 && !cycle_log) && tmp) { - //GETIP(ip+3+8+8); // read the 0xCC - call_n(dyn, ninst, *(void**)(addr+8), tmp); - addr+=8+8; + if ((box64_log < 2 && !cycle_log) && tmp) { + // GETIP(ip+3+8+8); // read the 0xCC + call_n(dyn, ninst, *(void**)(addr + 8), tmp); + addr += 8 + 8; } else { - GETIP(ip+1); // read the 0xCC + GETIP(ip + 1); // read the 0xCC STORE_XEMU_CALL(x3); ADDI(x1, xEmu, (uint32_t)offsetof(x64emu_t, ip)); // setup addr as &emu->ip CALL_S(x64Int3, -1); LOAD_XEMU_CALL(); - addr+=8+8; + addr += 8 + 8; TABLE64(x3, addr); // expected return address BNE_MARK(xRIP, x3); - LW(w1, xEmu, offsetof(x64emu_t, quit)); - CBZ_NEXT(w1); + LW(x1, xEmu, offsetof(x64emu_t, quit)); + CBZ_NEXT(x1); MARK; jump_to_epilog_fast(dyn, 0, xRIP, ninst); } @@ -481,11 +480,11 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int break; case 0xCD: u8 = F8; - if (box64_wine && (u8==0x2D || u8==0x2C || u8==0x29)) { + if (box64_wine && (u8 == 0x2D || u8 == 0x2C || u8 == 0x29)) { INST_NAME("INT 29/2c/2d"); // lets do nothing MESSAGE(LOG_INFO, "INT 29/2c/2d Windows interruption\n"); - GETIP(ip); // priviledged instruction, IP not updated + GETIP(ip); // priviledged instruction, IP not updated STORE_XEMU_CALL(x3); MOV32w(x1, u8); CALL(native_int, -1); @@ -505,7 +504,7 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int MARK; LOAD_XEMU_REM(x3); jump_to_epilog(dyn, 0, xRIP, ninst); - } else if (u8==0x03) { + } else if (u8 == 0x03) { INST_NAME("INT 3"); SETFLAGS(X_ALL, SF_SET_NODF, NAT_FLAGS_NOFUSION); // Hack to set flags in "don't care" state GETIP(addr); @@ -518,7 +517,7 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int } else { INST_NAME("INT n"); SETFLAGS(X_ALL, SF_SET_NODF, NAT_FLAGS_NOFUSION); // Hack to set flags in "don't care" state - GETIP(ip); // priviledged instruction, IP not updated + GETIP(ip); // priviledged instruction, IP not updated STORE_XEMU_CALL(x3); CALL(native_priv, -1); LOAD_XEMU_CALL(); @@ -536,11 +535,11 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int *ok = 0; break; case 0xD0: - case 0xD2: // TODO: Jump if CL is 0 + case 0xD2: // TODO: Jump if CL is 0 nextop = F8; - switch((nextop>>3)&7) { + switch ((nextop >> 3) & 7) { case 0: - if(opcode==0xD0) { + if (opcode == 0xD0) { INST_NAME("ROL Eb, 1"); GETEB(x1, 0); MOV32w(x2, 1); @@ -555,7 +554,7 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int EBBACK(x5, 0); break; case 1: - if(opcode==0xD0) { + if (opcode == 0xD0) { INST_NAME("ROR Eb, 1"); GETEB(x1, 0); MOV32w(x2, 1); @@ -570,7 +569,7 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int EBBACK(x5, 0); break; case 2: - if(opcode==0xD0) { + if (opcode == 0xD0) { INST_NAME("RCL Eb, 1"); GETEB(x1, 0); MOV32w(x2, 1); @@ -586,7 +585,7 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int EBBACK(x5, 0); break; case 3: - if(opcode==0xD0) { + if (opcode == 0xD0) { INST_NAME("RCR Eb, 1"); GETEB(x1, 0); MOV32w(x2, 1); @@ -603,7 +602,7 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int break; case 4: case 6: - if(opcode==0xD0) { + if (opcode == 0xD0) { INST_NAME("SHL Eb, 1"); GETEB(x1, 0); MOV32w(x2, 1); @@ -614,13 +613,13 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int BEQ_NEXT(x2, xZR); } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); // some flags are left undefined - if(box64_dynarec_safeflags>1) + if (box64_dynarec_safeflags > 1) MAYSETFLAGS(); emit_shl8(dyn, ninst, x1, x2, x5, x4, x6); EBBACK(x5, 0); break; case 5: - if(opcode==0xD0) { + if (opcode == 0xD0) { INST_NAME("SHR Eb, 1"); GETEB(x1, 0); MOV32w(x2, 1); @@ -631,13 +630,13 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int BEQ_NEXT(x2, xZR); } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); // some flags are left undefined - if(box64_dynarec_safeflags>1) + if (box64_dynarec_safeflags > 1) MAYSETFLAGS(); emit_shr8(dyn, ninst, x1, x2, x5, x4, x6); EBBACK(x5, 0); break; case 7: - if(opcode==0xD0) { + if (opcode == 0xD0) { INST_NAME("SAR Eb, 1"); GETSEB(x1, 0); MOV32w(x2, 1); @@ -648,7 +647,7 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int BEQ_NEXT(x2, xZR); } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); // some flags are left undefined - if(box64_dynarec_safeflags>1) + if (box64_dynarec_safeflags > 1) MAYSETFLAGS(); emit_sar8(dyn, ninst, x1, x2, x5, x4, x6); EBBACK(x5, 0); @@ -659,14 +658,14 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int break; case 0xD1: nextop = F8; - switch((nextop>>3)&7) { + switch ((nextop >> 3) & 7) { case 0: INST_NAME("ROL Ed, 1"); SETFLAGS(X_OF | X_CF, SF_SUBSET_PENDING, NAT_FLAGS_FUSION); GETED(0); emit_rol32c(dyn, ninst, rex, ed, 1, x3, x4); WBACK; - if(!wback && !rex.w) ZEROUP(ed); + if (!wback && !rex.w) ZEROUP(ed); break; case 1: INST_NAME("ROR Ed, 1"); @@ -674,7 +673,7 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int GETED(0); emit_ror32c(dyn, ninst, rex, ed, 1, x3, x4); WBACK; - if(!wback && !rex.w) ZEROUP(ed); + if (!wback && !rex.w) ZEROUP(ed); break; case 2: INST_NAME("RCL Ed, 1"); @@ -685,7 +684,7 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int GETEDW(x4, x1, 0); CALL_(rex.w ? ((void*)rcl64) : ((void*)rcl32), ed, x4); WBACK; - if(!wback && !rex.w) ZEROUP(ed); + if (!wback && !rex.w) ZEROUP(ed); break; case 3: INST_NAME("RCR Ed, 1"); @@ -694,9 +693,9 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int SETFLAGS(X_OF | X_CF, SF_SET_DF, NAT_FLAGS_NOFUSION); MOV32w(x2, 1); GETEDW(x4, x1, 0); - CALL_(rex.w?((void*)rcr64):((void*)rcr32), ed, x4); + CALL_(rex.w ? ((void*)rcr64) : ((void*)rcr32), ed, x4); WBACK; - if(!wback && !rex.w) ZEROUP(ed); + if (!wback && !rex.w) ZEROUP(ed); break; case 4: case 6: @@ -727,7 +726,7 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int case 0xD3: nextop = F8; - switch((nextop>>3)&7) { + switch ((nextop >> 3) & 7) { case 0: INST_NAME("ROL Ed, CL"); SETFLAGS(X_OF | X_CF, SF_SUBSET, NAT_FLAGS_FUSION); @@ -735,7 +734,7 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ANDI(x6, xRCX, rex.w ? 0x3f : 0x1f); emit_rol32(dyn, ninst, rex, ed, x6, x3, x4); WBACK; - if(!wback && !rex.w) ZEROUP(ed); + if (!wback && !rex.w) ZEROUP(ed); break; case 1: INST_NAME("ROR Ed, CL"); @@ -744,37 +743,37 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ANDI(x6, xRCX, rex.w ? 0x3f : 0x1f); emit_ror32(dyn, ninst, rex, ed, x6, x3, x4); WBACK; - if(!wback && !rex.w) ZEROUP(ed); + if (!wback && !rex.w) ZEROUP(ed); break; case 2: INST_NAME("RCL Ed, CL"); MESSAGE("LOG_DUMP", "Need optimization\n"); READFLAGS(X_CF); SETFLAGS(X_OF | X_CF, SF_SET_DF, NAT_FLAGS_NOFUSION); - ANDI(x2, xRCX, rex.w?0x3f:0x1f); + ANDI(x2, xRCX, rex.w ? 0x3f : 0x1f); GETEDW(x4, x1, 0); CALL_(rex.w ? ((void*)rcl64) : ((void*)rcl32), ed, x4); WBACK; - if(!wback && !rex.w) ZEROUP(ed); + if (!wback && !rex.w) ZEROUP(ed); break; case 3: INST_NAME("RCR Ed, CL"); MESSAGE(LOG_DUMP, "Need Optimization\n"); READFLAGS(X_CF); SETFLAGS(X_OF | X_CF, SF_SET_DF, NAT_FLAGS_NOFUSION); - ANDI(x2, xRCX, rex.w?0x3f:0x1f); + ANDI(x2, xRCX, rex.w ? 0x3f : 0x1f); GETEDW(x4, x1, 0); - CALL_(rex.w?((void*)rcr64):((void*)rcr32), ed, x4); + CALL_(rex.w ? ((void*)rcr64) : ((void*)rcr32), ed, x4); WBACK; - if(!wback && !rex.w) ZEROUP(ed); + if (!wback && !rex.w) ZEROUP(ed); break; case 4: case 6: INST_NAME("SHL Ed, CL"); SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); // some flags are left undefined - ANDI(x3, xRCX, rex.w?0x3f:0x1f); + ANDI(x3, xRCX, rex.w ? 0x3f : 0x1f); GETED(0); - if(!rex.w && MODREG) {ZEROUP(ed);} + if (!rex.w && MODREG) { ZEROUP(ed); } CBZ_NEXT(x3); emit_shl32(dyn, ninst, rex, ed, x3, x5, x4, x6); WBACK; @@ -782,9 +781,9 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int case 5: INST_NAME("SHR Ed, CL"); SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); // some flags are left undefined - ANDI(x3, xRCX, rex.w?0x3f:0x1f); + ANDI(x3, xRCX, rex.w ? 0x3f : 0x1f); GETED(0); - if(!rex.w && MODREG) {ZEROUP(ed);} + if (!rex.w && MODREG) { ZEROUP(ed); } CBZ_NEXT(x3); emit_shr32(dyn, ninst, rex, ed, x3, x5, x4); WBACK; @@ -792,15 +791,15 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int case 7: INST_NAME("SAR Ed, CL"); SETFLAGS(X_ALL, SF_PENDING, NAT_FLAGS_NOFUSION); - ANDI(x3, xRCX, rex.w?0x3f:0x1f); + ANDI(x3, xRCX, rex.w ? 0x3f : 0x1f); GETED(0); - if(!rex.w && MODREG) {ZEROUP(ed);} + if (!rex.w && MODREG) { ZEROUP(ed); } CBZ_NEXT(x3); UFLAG_OP12(ed, x3); SRAxw(ed, ed, x3); WBACK; UFLAG_RES(ed); - UFLAG_DF(x3, rex.w?d_sar64:d_sar32); + UFLAG_DF(x3, rex.w ? d_sar64 : d_sar32); break; } break; @@ -838,28 +837,35 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int case 0xDF: addr = dynarec64_DF(dyn, addr, ip, ninst, rex, rep, ok, need_epilog); break; - #define GO(Z) \ - BARRIER(BARRIER_MAYBE); \ - JUMP(addr+i8, 1); \ - if(dyn->insts[ninst].x64.jmp_insts==-1 || \ - CHECK_CACHE()) { \ - /* out of the block */ \ - i32 = dyn->insts[ninst].epilog-(dyn->native_size); \ - if(Z) {BNE(xRCX, xZR, i32);} else {BEQ(xRCX, xZR, i32);}; \ - if(dyn->insts[ninst].x64.jmp_insts==-1) { \ - if(!(dyn->insts[ninst].x64.barrier&BARRIER_FLOAT)) \ - fpu_purgecache(dyn, ninst, 1, x1, x2, x3); \ - jump_to_next(dyn, addr+i8, 0, ninst, rex.is32bits); \ - } else { \ - CacheTransform(dyn, ninst, cacheupd, x1, x2, x3); \ - i32 = dyn->insts[dyn->insts[ninst].x64.jmp_insts].address-(dyn->native_size); \ - B(i32); \ - } \ - } else { \ - /* inside the block */ \ - i32 = dyn->insts[dyn->insts[ninst].x64.jmp_insts].address-(dyn->native_size); \ - if(Z) {BEQ(xRCX, xZR, i32);} else {BNE(xRCX, xZR, i32);}; \ - } +#define GO(Z) \ + BARRIER(BARRIER_MAYBE); \ + JUMP(addr + i8, 1); \ + if (dyn->insts[ninst].x64.jmp_insts == -1 || CHECK_CACHE()) { \ + /* out of the block */ \ + i32 = dyn->insts[ninst].epilog - (dyn->native_size); \ + if (Z) { \ + BNE(xRCX, xZR, i32); \ + } else { \ + BEQ(xRCX, xZR, i32); \ + }; \ + if (dyn->insts[ninst].x64.jmp_insts == -1) { \ + if (!(dyn->insts[ninst].x64.barrier & BARRIER_FLOAT)) \ + fpu_purgecache(dyn, ninst, 1, x1, x2, x3); \ + jump_to_next(dyn, addr + i8, 0, ninst, rex.is32bits); \ + } else { \ + CacheTransform(dyn, ninst, cacheupd, x1, x2, x3); \ + i32 = dyn->insts[dyn->insts[ninst].x64.jmp_insts].address - (dyn->native_size); \ + B(i32); \ + } \ + } else { \ + /* inside the block */ \ + i32 = dyn->insts[dyn->insts[ninst].x64.jmp_insts].address - (dyn->native_size); \ + if (Z) { \ + BEQ(xRCX, xZR, i32); \ + } else { \ + BNE(xRCX, xZR, i32); \ + }; \ + } case 0xE0: INST_NAME("LOOPNZ"); READFLAGS(X_ZF); @@ -889,52 +895,52 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int i8 = F8S; GO(1); break; - #undef GO +#undef GO case 0xE8: INST_NAME("CALL Id"); i32 = F32S; - if(addr+i32==0) { - #if STEP == 3 - printf_log(LOG_INFO, "Warning, CALL to 0x0 at %p (%p)\n", (void*)addr, (void*)(addr-1)); - #endif + if (addr + i32 == 0) { +#if STEP == 3 + printf_log(LOG_INFO, "Warning, CALL to 0x0 at %p (%p)\n", (void*)addr, (void*)(addr - 1)); +#endif } - #if STEP < 2 - if(!rex.is32bits && isNativeCall(dyn, addr+i32, rex.is32bits, &dyn->insts[ninst].natcall, &dyn->insts[ninst].retn)) +#if STEP < 2 + if (!rex.is32bits && isNativeCall(dyn, addr + i32, rex.is32bits, &dyn->insts[ninst].natcall, &dyn->insts[ninst].retn)) tmp = dyn->insts[ninst].pass2choice = 3; else tmp = dyn->insts[ninst].pass2choice = 0; - #else - tmp = dyn->insts[ninst].pass2choice; - #endif - switch(tmp) { +#else + tmp = dyn->insts[ninst].pass2choice; +#endif + switch (tmp) { case 3: SETFLAGS(X_ALL, SF_SET_NODF, NAT_FLAGS_NOFUSION); // Hack to set flags to "dont'care" state SKIPTEST(x1); BARRIER(BARRIER_FULL); - if(dyn->last_ip && (addr-dyn->last_ip<0x1000)) { - ADDI(x2, xRIP, addr-dyn->last_ip); + if (dyn->last_ip && (addr - dyn->last_ip < 0x1000)) { + ADDI(x2, xRIP, addr - dyn->last_ip); } else { TABLE64(x2, addr); } PUSH1(x2); - MESSAGE(LOG_DUMP, "Native Call to %s (retn=%d)\n", GetNativeName(GetNativeFnc(dyn->insts[ninst].natcall-1)), dyn->insts[ninst].retn); + MESSAGE(LOG_DUMP, "Native Call to %s (retn=%d)\n", GetNativeName(GetNativeFnc(dyn->insts[ninst].natcall - 1)), dyn->insts[ninst].retn); // calling a native function sse_purge07cache(dyn, ninst, x3); - if((box64_log<2 && !cycle_log) && dyn->insts[ninst].natcall) { + if ((box64_log < 2 && !cycle_log) && dyn->insts[ninst].natcall) { // Partially support isSimpleWrapper tmp = isSimpleWrapper(*(wrapper_t*)(dyn->insts[ninst].natcall + 2)); } else - tmp=0; + tmp = 0; if (tmp < 0 || tmp > 1) tmp = 0; // TODO: removed when FP is in place - if(dyn->insts[ninst].natcall && isRetX87Wrapper(*(wrapper_t*)(dyn->insts[ninst].natcall+2))) + if (dyn->insts[ninst].natcall && isRetX87Wrapper(*(wrapper_t*)(dyn->insts[ninst].natcall + 2))) // return value will be on the stack, so the stack depth needs to be updated x87_purgecache(dyn, ninst, 0, x3, x1, x4); - if((box64_log<2 && !cycle_log) && dyn->insts[ninst].natcall && tmp) { - //GETIP(ip+3+8+8); // read the 0xCC - call_n(dyn, ninst, *(void**)(dyn->insts[ninst].natcall+2+8), tmp); - POP1(xRIP); // pop the return address + if ((box64_log < 2 && !cycle_log) && dyn->insts[ninst].natcall && tmp) { + // GETIP(ip+3+8+8); // read the 0xCC + call_n(dyn, ninst, *(void**)(dyn->insts[ninst].natcall + 2 + 8), tmp); + POP1(xRIP); // pop the return address dyn->last_ip = addr; } else { GETIP_(dyn->insts[ninst].natcall); // read the 0xCC already @@ -943,11 +949,11 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int CALL_S(x64Int3, -1); LOAD_XEMU_CALL(); TABLE64(x3, dyn->insts[ninst].natcall); - ADDI(x3, x3, 2+8+8); - BNE_MARK(xRIP, x3); // Not the expected address, exit dynarec block - POP1(xRIP); // pop the return address - if(dyn->insts[ninst].retn) { - if(dyn->insts[ninst].retn<0x1000) { + ADDI(x3, x3, 2 + 8 + 8); + BNE_MARK(xRIP, x3); // Not the expected address, exit dynarec block + POP1(xRIP); // pop the return address + if (dyn->insts[ninst].retn) { + if (dyn->insts[ninst].retn < 0x1000) { ADDI(xRSP, xRSP, dyn->insts[ninst].retn); } else { MOV64x(x3, dyn->insts[ninst].retn); @@ -955,17 +961,17 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int } } TABLE64(x3, addr); - BNE_MARK(xRIP, x3); // Not the expected address again - LW(w1, xEmu, offsetof(x64emu_t, quit)); - CBZ_NEXT(w1); + BNE_MARK(xRIP, x3); // Not the expected address again + LW(x1, xEmu, offsetof(x64emu_t, quit)); + CBZ_NEXT(x1); MARK; jump_to_epilog_fast(dyn, 0, xRIP, ninst); dyn->last_ip = addr; } break; default: - if((box64_dynarec_safeflags>1) || (ninst && dyn->insts[ninst-1].x64.set_flags)) { - READFLAGS(X_PEND); // that's suspicious + if ((box64_dynarec_safeflags > 1) || (ninst && dyn->insts[ninst - 1].x64.set_flags)) { + READFLAGS(X_PEND); // that's suspicious } else { SETFLAGS(X_ALL, SF_SET_NODF, NAT_FLAGS_NOFUSION); // Hack to set flags to "dont'care" state } @@ -978,27 +984,27 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int *ok = 0; }*/ - if(rex.is32bits) { + if (rex.is32bits) { MOV32w(x2, addr); } else { TABLE64(x2, addr); } fpu_purgecache(dyn, ninst, 1, x1, x3, x4); PUSH1z(x2); - if(box64_dynarec_callret) { + if (box64_dynarec_callret) { SET_HASCALLRET(); // Push actual return address - if(addr < (dyn->start+dyn->isize)) { + if (addr < (dyn->start + dyn->isize)) { // there is a next... - j64 = (dyn->insts)?(dyn->insts[ninst].epilog-(dyn->native_size)):0; + j64 = (dyn->insts) ? (dyn->insts[ninst].epilog - (dyn->native_size)) : 0; AUIPC(x4, ((j64 + 0x800) >> 12) & 0xfffff); ADDI(x4, x4, j64 & 0xfff); - MESSAGE(LOG_NONE, "\tCALLRET set return to +%di\n", j64>>2); + MESSAGE(LOG_NONE, "\tCALLRET set return to +%di\n", j64 >> 2); } else { - j64 = (dyn->insts)?(GETMARK-(dyn->native_size)):0; + j64 = (dyn->insts) ? (GETMARK - (dyn->native_size)) : 0; AUIPC(x4, ((j64 + 0x800) >> 12) & 0xfffff); ADDI(x4, x4, j64 & 0xfff); - MESSAGE(LOG_NONE, "\tCALLRET set return to +%di\n", j64>>2); + MESSAGE(LOG_NONE, "\tCALLRET set return to +%di\n", j64 >> 2); } ADDI(xSP, xSP, -16); SD(x4, xSP, 0); @@ -1007,12 +1013,12 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int *ok = 0; *need_epilog = 0; } - if(rex.is32bits) - j64 = (uint32_t)(addr+i32); + if (rex.is32bits) + j64 = (uint32_t)(addr + i32); else - j64 = addr+i32; + j64 = addr + i32; jump_to_next(dyn, j64, 0, ninst, rex.is32bits); - if(box64_dynarec_callret && addr >= (dyn->start + dyn->isize)) { + if (box64_dynarec_callret && addr >= (dyn->start + dyn->isize)) { // jumps out of current dynablock... MARK; j64 = getJumpTableAddress64(addr); @@ -1026,28 +1032,28 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int case 0xE9: case 0xEB: BARRIER(BARRIER_MAYBE); - if(opcode==0xE9) { + if (opcode == 0xE9) { INST_NAME("JMP Id"); i32 = F32S; } else { INST_NAME("JMP Ib"); i32 = F8S; } - if(rex.is32bits) - j64 = (uint32_t)(addr+i32); + if (rex.is32bits) + j64 = (uint32_t)(addr + i32); else - j64 = addr+i32; + j64 = addr + i32; JUMP((uintptr_t)getAlternate((void*)j64), 0); - if(dyn->insts[ninst].x64.jmp_insts==-1) { + if (dyn->insts[ninst].x64.jmp_insts == -1) { // out of the block fpu_purgecache(dyn, ninst, 1, x1, x2, x3); jump_to_next(dyn, (uintptr_t)getAlternate((void*)j64), 0, ninst, rex.is32bits); } else { // inside the block CacheTransform(dyn, ninst, CHECK_CACHE(), x1, x2, x3); - tmp = dyn->insts[dyn->insts[ninst].x64.jmp_insts].address-(dyn->native_size); + tmp = dyn->insts[dyn->insts[ninst].x64.jmp_insts].address - (dyn->native_size); MESSAGE(1, "Jump to %d / 0x%x\n", tmp, tmp); - if(tmp==4) { + if (tmp == 4) { NOP(); } else { B(tmp); @@ -1081,11 +1087,11 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int INST_NAME("CMC"); READFLAGS(X_CF); SETFLAGS(X_CF, SF_SUBSET, NAT_FLAGS_NOFUSION); - XORI(xFlags, xFlags, 1<<F_CF); + XORI(xFlags, xFlags, 1 << F_CF); break; case 0xF6: nextop = F8; - switch((nextop>>3)&7) { + switch ((nextop >> 3) & 7) { case 0: case 1: INST_NAME("TEST Eb, Ib"); @@ -1154,7 +1160,7 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int break; case 0xF7: nextop = F8; - switch((nextop>>3)&7) { + switch ((nextop >> 3) & 7) { case 0: case 1: INST_NAME("TEST Ed, Id"); @@ -1167,7 +1173,7 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int INST_NAME("NOT Ed"); GETED(0); XORI(ed, ed, -1); - if(!rex.w && MODREG) + if (!rex.w && MODREG) ZEROUP(ed); WBACK; break; @@ -1184,18 +1190,21 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int CLEAR_FLAGS(); SET_DFNONE(); GETED(0); - if(rex.w) { - if(ed==xRDX) gd=x3; else gd=xRDX; + if (rex.w) { + if (ed == xRDX) + gd = x3; + else + gd = xRDX; MULHU(gd, xRAX, ed); MUL(xRAX, xRAX, ed); - if(gd!=xRDX) {MV(xRDX, gd);} + if (gd != xRDX) { MV(xRDX, gd); } } else { AND(x3, xRAX, xMASK); - if(MODREG) { + if (MODREG) { AND(x4, ed, xMASK); ed = x4; } - MUL(xRDX, x3, ed); //64 <- 32x32 + MUL(xRDX, x3, ed); // 64 <- 32x32 AND(xRAX, xRDX, xMASK); SRLI(xRDX, xRDX, 32); } @@ -1217,14 +1226,17 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int CLEAR_FLAGS(); SET_DFNONE(); GETSED(0); - if(rex.w) { - if(ed==xRDX) gd=x3; else gd=xRDX; + if (rex.w) { + if (ed == xRDX) + gd = x3; + else + gd = xRDX; MULH(gd, xRAX, ed); MUL(xRAX, xRAX, ed); - if(gd!=xRDX) {MV(xRDX, gd);} + if (gd != xRDX) { MV(xRDX, gd); } } else { ADDIW(x3, xRAX, 0); // sign extend 32bits-> 64bits - MUL(xRDX, x3, ed); //64 <- 32x32 + MUL(xRDX, x3, ed); // 64 <- 32x32 AND(xRAX, xRDX, xMASK); SRLI(xRDX, xRDX, 32); } @@ -1246,12 +1258,12 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int INST_NAME("DIV Ed"); SETFLAGS(X_ALL, SF_SET, NAT_FLAGS_NOFUSION); SET_DFNONE(); - if(!rex.w) { + if (!rex.w) { GETED(0); - if(ninst && (nextop==0xF0) - && dyn->insts[ninst-1].x64.addr - && *(uint8_t*)(dyn->insts[ninst-1].x64.addr)==0xB8 - && *(uint32_t*)(dyn->insts[ninst-1].x64.addr+1)==0) { + if (ninst && (nextop == 0xF0) + && dyn->insts[ninst - 1].x64.addr + && *(uint8_t*)(dyn->insts[ninst - 1].x64.addr) == 0xB8 + && *(uint32_t*)(dyn->insts[ninst - 1].x64.addr + 1) == 0) { // hack for some protection that check a divide by zero actually trigger a divide by zero exception MESSAGE(LOG_INFO, "Divide by 0 hack\n"); GETIP(ip); @@ -1259,7 +1271,7 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int CALL(native_div0, -1); LOAD_XEMU_CALL(); } else { - if(box64_dynarec_div0) { + if (box64_dynarec_div0) { BNE_MARK3(ed, xZR); GETIP_(ip); STORE_XEMU_CALL(x3); @@ -1272,7 +1284,7 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int SLLI(x3, xRDX, 32); AND(x2, xRAX, xMASK); OR(x3, x3, x2); - if(MODREG) { + if (MODREG) { AND(x4, ed, xMASK); ed = x4; } @@ -1282,12 +1294,12 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ZEROUP(xRDX); } } else { - if(ninst - && dyn->insts[ninst-1].x64.addr - && *(uint8_t*)(dyn->insts[ninst-1].x64.addr)==0x31 - && *(uint8_t*)(dyn->insts[ninst-1].x64.addr+1)==0xD2) { + if (ninst + && dyn->insts[ninst - 1].x64.addr + && *(uint8_t*)(dyn->insts[ninst - 1].x64.addr) == 0x31 + && *(uint8_t*)(dyn->insts[ninst - 1].x64.addr + 1) == 0xD2) { GETED(0); - if(box64_dynarec_div0) { + if (box64_dynarec_div0) { BNE_MARK3(ed, xZR); GETIP_(ip); STORE_XEMU_CALL(x3); @@ -1301,8 +1313,8 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int REMU(xRDX, xRAX, ed); MV(xRAX, x2); } else { - GETEDH(x1, 0); // get edd changed addr, so cannot be called 2 times for same op... - if(box64_dynarec_div0) { + GETEDH(x1, 0); // get edd changed addr, so cannot be called 2 times for same op... + if (box64_dynarec_div0) { BNE_MARK3(ed, xZR); GETIP_(ip); STORE_XEMU_CALL(x3); @@ -1313,7 +1325,7 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int MARK3; } BEQ_MARK(xRDX, xZR); - if(ed!=x1) {MV(x1, ed);} + if (ed != x1) { MV(x1, ed); } CALL(div64, -1); B_NEXT_nocond; MARK; @@ -1328,9 +1340,9 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int SKIPTEST(x1); SETFLAGS(X_ALL, SF_SET, NAT_FLAGS_NOFUSION); SET_DFNONE() - if(!rex.w) { + if (!rex.w) { GETSED(0); - if(box64_dynarec_div0) { + if (box64_dynarec_div0) { BNE_MARK3(ed, xZR); GETIP_(ip); STORE_XEMU_CALL(x3); @@ -1348,12 +1360,12 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int AND(xRAX, x2, xMASK); ZEROUP(xRDX); } else { - if(ninst && dyn->insts - && dyn->insts[ninst-1].x64.addr - && *(uint8_t*)(dyn->insts[ninst-1].x64.addr)==0x48 - && *(uint8_t*)(dyn->insts[ninst-1].x64.addr+1)==0x99) { + if (ninst && dyn->insts + && dyn->insts[ninst - 1].x64.addr + && *(uint8_t*)(dyn->insts[ninst - 1].x64.addr) == 0x48 + && *(uint8_t*)(dyn->insts[ninst - 1].x64.addr + 1) == 0x99) { GETED(0); - if(box64_dynarec_div0) { + if (box64_dynarec_div0) { BNE_MARK3(ed, xZR); GETIP_(ip); STORE_XEMU_CALL(x3); @@ -1367,8 +1379,8 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int REM(xRDX, xRAX, ed); MV(xRAX, x2); } else { - GETEDH(x1, 0); // get edd changed addr, so cannot be called 2 times for same op... - if(box64_dynarec_div0) { + GETEDH(x1, 0); // get edd changed addr, so cannot be called 2 times for same op... + if (box64_dynarec_div0) { BNE_MARK3(ed, xZR); GETIP_(ip); STORE_XEMU_CALL(x3); @@ -1378,8 +1390,8 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int jump_to_epilog(dyn, 0, xRIP, ninst); MARK3; } - //Need to see if RDX==0 and RAX not signed - // or RDX==-1 and RAX signed + // Need to see if RDX==0 and RAX not signed + // or RDX==-1 and RAX signed BNE_MARK2(xRDX, xZR); BGE_MARK(xRAX, xZR); MARK2; @@ -1387,7 +1399,7 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int BNE_MARK3(x2, xZR); BLT_MARK(xRAX, xZR); MARK3; - if(ed!=x1) MV(x1, ed); + if (ed != x1) MV(x1, ed); CALL((void*)idiv64, -1); B_NEXT_nocond; MARK; @@ -1424,7 +1436,7 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int break; case 0xFE: nextop = F8; - switch((nextop>>3)&7) { + switch ((nextop >> 3) & 7) { case 0: INST_NAME("INC Eb"); SETFLAGS(X_ALL & ~X_CF, SF_SUBSET_PENDING, NAT_FLAGS_FUSION); @@ -1445,7 +1457,7 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int break; case 0xFF: nextop = F8; - switch((nextop>>3)&7) { + switch ((nextop >> 3) & 7) { case 0: // INC Ed INST_NAME("INC Ed"); SETFLAGS(X_ALL & ~X_CF, SF_SUBSET_PENDING, NAT_FLAGS_FUSION); @@ -1453,7 +1465,7 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int emit_inc32(dyn, ninst, rex, ed, x3, x4, x5, x6); WBACK; break; - case 1: //DEC Ed + case 1: // DEC Ed INST_NAME("DEC Ed"); SETFLAGS(X_ALL & ~X_CF, SF_SUBSET_PENDING, NAT_FLAGS_FUSION); GETED(0); @@ -1462,16 +1474,13 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int break; case 2: // CALL Ed INST_NAME("CALL Ed"); - PASS2IF((box64_dynarec_safeflags>1) || - ((ninst && dyn->insts[ninst-1].x64.set_flags) - || ((ninst>1) && dyn->insts[ninst-2].x64.set_flags)), 1) - { - READFLAGS(X_PEND); // that's suspicious + PASS2IF ((box64_dynarec_safeflags > 1) || ((ninst && dyn->insts[ninst - 1].x64.set_flags) || ((ninst > 1) && dyn->insts[ninst - 2].x64.set_flags)), 1) { + READFLAGS(X_PEND); // that's suspicious } else { SETFLAGS(X_ALL, SF_SET_NODF, NAT_FLAGS_NOFUSION); // Hack to put flag in "don't care" state } GETEDz(0); - if(box64_dynarec_callret && box64_dynarec_bigblock>1) { + if (box64_dynarec_callret && box64_dynarec_bigblock > 1) { BARRIER(BARRIER_FULL); } else { BARRIER(BARRIER_FLOAT); @@ -1479,20 +1488,20 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int *ok = 0; } GETIP_(addr); - if(box64_dynarec_callret) { + if (box64_dynarec_callret) { SET_HASCALLRET(); // Push actual return address - if(addr < (dyn->start+dyn->isize)) { + if (addr < (dyn->start + dyn->isize)) { // there is a next... - j64 = (dyn->insts)?(dyn->insts[ninst].epilog-(dyn->native_size)):0; + j64 = (dyn->insts) ? (dyn->insts[ninst].epilog - (dyn->native_size)) : 0; AUIPC(x4, ((j64 + 0x800) >> 12) & 0xfffff); ADDI(x4, x4, j64 & 0xfff); - MESSAGE(LOG_NONE, "\tCALLRET set return to +%di\n", j64>>2); + MESSAGE(LOG_NONE, "\tCALLRET set return to +%di\n", j64 >> 2); } else { - j64 = (dyn->insts)?(GETMARK-(dyn->native_size)):0; + j64 = (dyn->insts) ? (GETMARK - (dyn->native_size)) : 0; AUIPC(x4, ((j64 + 0x800) >> 12) & 0xfffff); ADDI(x4, x4, j64 & 0xfff); - MESSAGE(LOG_NONE, "\tCALLRET set return to +%di\n", j64>>2); + MESSAGE(LOG_NONE, "\tCALLRET set return to +%di\n", j64 >> 2); } ADDI(xSP, xSP, -16); SD(x4, xSP, 0); @@ -1500,7 +1509,7 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int } PUSH1z(xRIP); jump_to_next(dyn, 0, ed, ninst, rex.is32bits); - if(box64_dynarec_callret && addr >= (dyn->start + dyn->isize)) { + if (box64_dynarec_callret && addr >= (dyn->start + dyn->isize)) { // jumps out of current dynablock... MARK; j64 = getJumpTableAddress64(addr); @@ -1519,7 +1528,7 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int *ok = 0; break; case 5: // JMP FAR Ed - if(MODREG) { + if (MODREG) { DEFAULT; } else { INST_NAME("JMP FAR Ed"); @@ -1529,7 +1538,7 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, NULL, 0, 0); LDxw(x1, wback, 0); ed = x1; - LHU(x3, wback, rex.w?8:4); + LHU(x3, wback, rex.w ? 8 : 4); SH(x3, xEmu, offsetof(x64emu_t, segs[_CS])); SW(xZR, xEmu, offsetof(x64emu_t, segs_serial[_CS])); jump_to_epilog(dyn, 0, ed, ninst); @@ -1551,5 +1560,5 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int DEFAULT; } - return addr; + return addr; } diff --git a/src/dynarec/rv64/dynarec_rv64_0f.c b/src/dynarec/rv64/dynarec_rv64_0f.c index 7829a414..d0d79725 100644 --- a/src/dynarec/rv64/dynarec_rv64_0f.c +++ b/src/dynarec/rv64/dynarec_rv64_0f.c @@ -63,8 +63,8 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0x01: // TODO:, /0 is SGDT. While 0F 01 D0 is XGETBV, etc... nextop = F8; - if(MODREG) { - switch(nextop) { + if (MODREG) { + switch (nextop) { case 0xD0: INST_NAME("XGETBV"); AND(x1, xRCX, xMASK); @@ -83,7 +83,7 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0xE6: case 0xE7: INST_NAME("SMSW Ed"); - ed = xRAX + (nextop & 7) + (rex.b << 3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); MOV32w(ed, (1 << 0) | (1 << 4)); // only PE and ET set... break; case 0xF9: @@ -94,18 +94,18 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni } else { CSRRS(x3, xZR, 0xC01); // RDTIME } - if(box64_rdtsc_shift) { + if (box64_rdtsc_shift) { SRLI(x3, x3, box64_rdtsc_shift); } SRLI(xRDX, x3, 32); AND(xRAX, x3, xMASK); // wipe upper part - MV(xRCX, xZR); // IA32_TSC, 0 for now + MV(xRCX, xZR); // IA32_TSC, 0 for now break; default: DEFAULT; } } else { - switch((nextop>>3)&7) { + switch ((nextop >> 3) & 7) { default: DEFAULT; } @@ -121,8 +121,8 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni LOAD_XEMU_CALL(); TABLE64(x3, addr); // expected return address BNE_MARK(xRIP, x3); - LW(w1, xEmu, offsetof(x64emu_t, quit)); - CBZ_NEXT(w1); + LW(x1, xEmu, offsetof(x64emu_t, quit)); + CBZ_NEXT(x1); MARK; LOAD_XEMU_REM(x3); jump_to_epilog(dyn, 0, xRIP, ninst); @@ -387,8 +387,7 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni GETEXSS(v0, 0); CLEAR_FLAGS(); // if isnan(d0) || isnan(v0) - IFX(X_ZF | X_PF | X_CF) - { + IFX (X_ZF | X_PF | X_CF) { FEQS(x3, d0, d0); FEQS(x2, v0, v0); AND(x2, x2, x3); @@ -398,8 +397,7 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni } MARK; // else if isless(d0, v0) - IFX(X_CF) - { + IFX (X_CF) { FLTS(x2, d0, v0); BEQ_MARK2(x2, xZR); ORI(xFlags, xFlags, 1 << F_CF); @@ -407,8 +405,7 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni } MARK2; // else if d0 == v0 - IFX(X_ZF) - { + IFX (X_ZF) { FEQS(x2, d0, v0); CBZ_NEXT(x2); ORI(xFlags, xFlags, 1 << F_ZF); @@ -422,7 +419,7 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni } else { CSRRS(x3, xZR, 0xC01); // RDTIME } - if(box64_rdtsc_shift) { + if (box64_rdtsc_shift) { SRLI(x3, x3, box64_rdtsc_shift); } SRLI(xRDX, x3, 32); @@ -910,7 +907,7 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; \ GETGD; \ if (MODREG) { \ - ed = xRAX + (nextop & 7) + (rex.b << 3); \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ if (dyn->insts[ninst].nat_flags_fusion) { \ NATIVEJUMP(NATNO, 8); \ } else { \ @@ -1427,7 +1424,7 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; GETGM(); if (MODREG) { - ed = xRAX + (nextop & 7) + (rex.b << 3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); if (!rex.w) { AND(x4, ed, xMASK); ed = x4; @@ -1646,7 +1643,7 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni gd = ((nextop & 0x38) >> 3); v0 = mmx_get_reg(dyn, ninst, x1, x2, x3, gd); if ((nextop & 0xC0) == 0xC0) { - ed = xRAX + (nextop & 7) + (rex.b << 3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); if (rex.w) FMVXD(ed, v0); else { @@ -1721,12 +1718,12 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni S##YES(x3, x1); \ if (MODREG) { \ if (rex.rex) { \ - eb1 = xRAX + (nextop & 7) + (rex.b << 3); \ + eb1 = TO_NAT((nextop & 7) + (rex.b << 3)); \ eb2 = 0; \ } else { \ ed = (nextop & 7); \ eb2 = (ed >> 2) * 8; \ - eb1 = xRAX + (ed & 3); \ + eb1 = TO_NAT(ed & 3); \ } \ if (eb2) { \ LUI(x1, 0xffff0); \ @@ -1761,7 +1758,7 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; GETGD; if (MODREG) { - ed = xRAX + (nextop & 7) + (rex.b << 3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); } else { SMREAD(); addr = geted(dyn, addr, ninst, nextop, &wback, x3, x1, &fixedaddress, rex, NULL, 1, 0); @@ -1793,11 +1790,11 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; INST_NAME("SHLD Ed, Gd, CL"); SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); // some flags are left undefined - if(box64_dynarec_safeflags>1) + if (box64_dynarec_safeflags > 1) MAYSETFLAGS(); GETGD; GETED(0); - if(!rex.w && !rex.is32bits && MODREG) { ZEROUP(ed); } + if (!rex.w && !rex.is32bits && MODREG) { ZEROUP(ed); } ANDI(x3, xRCX, rex.w ? 0x3f : 0x1f); BEQ_NEXT(x3, xZR); emit_shld32(dyn, ninst, rex, ed, gd, x3, x4, x5, x6); @@ -1810,7 +1807,7 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; GETGD; if (MODREG) { - ed = xRAX + (nextop & 7) + (rex.b << 3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); wback = 0; } else { SMREAD(); @@ -1831,7 +1828,7 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni if (wback) { SDxw(ed, wback, fixedaddress); SMWRITE(); - } else if(!rex.w) { + } else if (!rex.w) { ZEROUP(ed); } break; @@ -1924,7 +1921,7 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni fpu_purgecache(dyn, ninst, 0, x1, x2, x3); addr = geted(dyn, addr, ninst, nextop, &wback, x1, x2, &fixedaddress, rex, NULL, 0, 0); if (ed != x1) { MV(x1, ed); } - MOV32w(x2, rex.w?0:1); + MOV32w(x2, rex.w ? 0 : 1); CALL((void*)fpu_xsave, -1); break; case 5: @@ -1933,7 +1930,7 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni fpu_purgecache(dyn, ninst, 0, x1, x2, x3); addr = geted(dyn, addr, ninst, nextop, &wback, x1, x2, &fixedaddress, rex, NULL, 0, 0); if (ed != x1) { MV(x1, ed); } - MOV32w(x2, rex.w?0:1); + MOV32w(x2, rex.w ? 0 : 1); CALL((void*)fpu_xrstor, -1); break; case 7: @@ -1991,7 +1988,7 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; GETGD; if (MODREG) { - ed = xRAX + (nextop & 7) + (rex.b << 3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); wback = 0; } else { SMREAD(); @@ -2013,7 +2010,7 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni if (wback) { SDxw(ed, wback, fixedaddress); SMWRITE(); - } else if(!rex.w) { + } else if (!rex.w) { ZEROUP(ed); } break; @@ -2023,12 +2020,12 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni GETGD; if (MODREG) { if (rex.rex) { - eb1 = xRAX + (nextop & 7) + (rex.b << 3); + eb1 = TO_NAT((nextop & 7) + (rex.b << 3)); eb2 = 0; } else { ed = (nextop & 7); - eb1 = xRAX + (ed & 3); // Ax, Cx, Dx or Bx - eb2 = (ed & 4) >> 2; // L or H + eb1 = TO_NAT(ed & 3); // Ax, Cx, Dx or Bx + eb2 = (ed & 4) >> 2; // L or H } if (eb2) { SRLI(gd, eb1, 8); @@ -2047,7 +2044,7 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; GETGD; if (MODREG) { - ed = xRAX + (nextop & 7) + (rex.b << 3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); ZEXTH(gd, ed); } else { SMREAD(); @@ -2122,7 +2119,7 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni if (wback) { SDxw(ed, wback, fixedaddress); SMWRITE(); - } else if(!rex.w) { + } else if (!rex.w) { ZEROUP(ed); } break; @@ -2145,7 +2142,7 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni if (wback) { SDxw(ed, wback, fixedaddress); SMWRITE(); - } else if(!rex.w) { + } else if (!rex.w) { ZEROUP(ed); } break; @@ -2160,7 +2157,7 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; GETGD; if (MODREG) { - ed = xRAX + (nextop & 7) + (rex.b << 3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); wback = 0; } else { SMREAD(); @@ -2181,7 +2178,7 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni if (wback) { SDxw(ed, wback, fixedaddress); SMWRITE(); - } else if(!rex.w) { + } else if (!rex.w) { ZEROUP(ed); } break; @@ -2230,12 +2227,12 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni GETGD; if (MODREG) { if (rex.rex) { - wback = xRAX + (nextop & 7) + (rex.b << 3); + wback = TO_NAT((nextop & 7) + (rex.b << 3)); wb2 = 0; } else { wback = (nextop & 7); wb2 = (wback >> 2) * 8; - wback = xRAX + (wback & 3); + wback = TO_NAT(wback & 3); } SLLI(gd, wback, 56 - wb2); SRAI(gd, gd, 56); @@ -2252,7 +2249,7 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; GETGD; if (MODREG) { - ed = xRAX + (nextop & 7) + (rex.b << 3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); SLLI(gd, ed, 48); SRAI(gd, gd, 48); } else { @@ -2284,10 +2281,10 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; GETGD; GETED(0); - if(ed!=gd) + if (ed != gd) MV(x9, ed); emit_add32(dyn, ninst, rex, ed, gd, x4, x5, x6); - if(ed!=gd) + if (ed != gd) MVxw(gd, x9); WBACK; break; @@ -2353,7 +2350,7 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; GETGD; if (MODREG) { - MVxw(xRAX + (nextop & 7) + (rex.b << 3), gd); + MVxw(TO_NAT((nextop & 7) + (rex.b << 3)), gd); } else { addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, NULL, 1, 0); SDxw(gd, ed, fixedaddress); @@ -2364,7 +2361,7 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; GETED(1); GETGM(); - u8 = (F8)&3; + u8 = (F8) & 3; SH(ed, gback, gdoffset + u8 * 2); break; case 0xC5: @@ -2372,7 +2369,7 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; GETGD; GETEM(x2, 0, 6); - u8 = (F8)&3; + u8 = (F8) & 3; LHU(gd, wback, fixedaddress + u8 * 2); break; case 0xC6: // TODO: Optimize this! @@ -2426,7 +2423,7 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0xCE: case 0xCF: INST_NAME("BSWAP Reg"); - gd = xRAX + (opcode & 7) + (rex.b << 3); + gd = TO_NAT((opcode & 7) + (rex.b << 3)); REV8xw(gd, gd, x1, x2, x3, x4); break; case 0xD1: @@ -2550,17 +2547,10 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; GETGM(); GETEM(x2, 0, 6); - MMX_LOOP_W(x3, x4, - SUB(x3, x3, x4); - if (rv64_zbb) { - MAX(x3, x3, xZR); - } else { + MMX_LOOP_W(x3, x4, SUB(x3, x3, x4); if (rv64_zbb) { MAX(x3, x3, xZR); } else { NOT(x4, x3); SRAI(x4, x4, 63); - AND(x3, x3, x4); - } - SH(x3, gback, gdoffset + i * 2); - ); + AND(x3, x3, x4); } SH(x3, gback, gdoffset + i * 2);); break; case 0xDA: INST_NAME("PMINUB Gm, Em"); @@ -2895,14 +2885,9 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; GETGM(); GETEM(x1, 0, 6); - MMX_LOOP_WS(x3, x4, - if (rv64_zbb) { - MAX(x3, x3, x4); - } else { + MMX_LOOP_WS(x3, x4, if (rv64_zbb) { MAX(x3, x3, x4); } else { BGE(x3, x4, 8); - MV(x3, x4); - } - ); + MV(x3, x4); }); break; case 0xEF: INST_NAME("PXOR Gm,Em"); diff --git a/src/dynarec/rv64/dynarec_rv64_64.c b/src/dynarec/rv64/dynarec_rv64_64.c index db5d074e..282f39ee 100644 --- a/src/dynarec/rv64/dynarec_rv64_64.c +++ b/src/dynarec/rv64/dynarec_rv64_64.c @@ -24,7 +24,9 @@ uintptr_t dynarec64_64(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int seg, int* ok, int* need_epilog) { - (void)ip; (void)rep; (void)need_epilog; + (void)ip; + (void)rep; + (void)need_epilog; uint8_t opcode = F8; uint8_t nextop; @@ -50,14 +52,14 @@ uintptr_t dynarec64_64(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni MAYUSE(v0); MAYUSE(v1); - while((opcode==0xF2) || (opcode==0xF3)) { - rep = opcode-0xF1; + while ((opcode == 0xF2) || (opcode == 0xF3)) { + rep = opcode - 0xF1; opcode = F8; } GETREX(); - switch(opcode) { + switch (opcode) { case 0x03: INST_NAME("ADD Gd, Seg:Ed"); SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); @@ -69,24 +71,24 @@ uintptr_t dynarec64_64(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni break; case 0x0F: opcode = F8; - switch(opcode) { + switch (opcode) { case 0x11: - switch(rep) { + switch (rep) { case 0: INST_NAME("MOVUPS Ex,Gx"); nextop = F8; GETGX(); GETEX(x2, 0, 8); - if(!MODREG) { + if (!MODREG) { grab_segdata(dyn, addr, ninst, x4, seg); ADDz(x4, x4, wback); wback = x4; } - LD(x3, gback, gdoffset+0); - LD(x5, gback, gdoffset+8); - SD(x3, wback, fixedaddress+0); - SD(x5, wback, fixedaddress+8); - if(!MODREG) + LD(x3, gback, gdoffset + 0); + LD(x5, gback, gdoffset + 8); + SD(x3, wback, fixedaddress + 0); + SD(x5, wback, fixedaddress + 8); + if (!MODREG) SMWRITE2(); break; case 1: @@ -94,8 +96,8 @@ uintptr_t dynarec64_64(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; GETG; v0 = sse_get_reg(dyn, ninst, x1, gd, 0); - if(MODREG) { - ed = (nextop&7)+ (rex.b<<3); + if (MODREG) { + ed = (nextop & 7) + (rex.b << 3); d0 = sse_get_reg(dyn, ninst, x1, ed, 0); FMVD(d0, v0); } else { @@ -112,8 +114,8 @@ uintptr_t dynarec64_64(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; GETG; v0 = sse_get_reg(dyn, ninst, x1, gd, 1); - if(MODREG) { - q0 = sse_get_reg(dyn, ninst, x1, (nextop&7) + (rex.b<<3), 1); + if (MODREG) { + q0 = sse_get_reg(dyn, ninst, x1, (nextop & 7) + (rex.b << 3), 1); FMVS(q0, v0); } else { grab_segdata(dyn, addr, ninst, x4, seg); @@ -158,7 +160,7 @@ uintptr_t dynarec64_64(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni break; case 0x80: nextop = F8; - switch((nextop>>3)&7) { + switch ((nextop >> 3) & 7) { case 0: // ADD INST_NAME("ADD Eb, Ib"); grab_segdata(dyn, addr, ninst, x1, seg); @@ -230,7 +232,7 @@ uintptr_t dynarec64_64(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); GETEBO(x1, 1); u8 = F8; - if(u8) { + if (u8) { MOV32w(x2, u8); emit_cmp8(dyn, ninst, x1, x2, x3, x4, x5, x6); } else { @@ -245,29 +247,50 @@ uintptr_t dynarec64_64(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0x83: nextop = F8; grab_segdata(dyn, addr, ninst, x6, seg); - switch((nextop>>3)&7) { + switch ((nextop >> 3) & 7) { case 0: // ADD - if(opcode==0x81) {INST_NAME("ADD Ed, Id");} else {INST_NAME("ADD Ed, Ib");} + if (opcode == 0x81) { + INST_NAME("ADD Ed, Id"); + } else { + INST_NAME("ADD Ed, Ib"); + } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETEDO(x6, (opcode==0x81)?4:1, x5); - if(opcode==0x81) i64 = F32S; else i64 = F8S; + GETEDO(x6, (opcode == 0x81) ? 4 : 1, x5); + if (opcode == 0x81) + i64 = F32S; + else + i64 = F8S; emit_add32c(dyn, ninst, rex, ed, i64, x3, x4, x5, x9); WBACKO(x6); break; case 1: // OR - if(opcode==0x81) {INST_NAME("OR Ed, Id");} else {INST_NAME("OR Ed, Ib");} + if (opcode == 0x81) { + INST_NAME("OR Ed, Id"); + } else { + INST_NAME("OR Ed, Ib"); + } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETEDO(x6, (opcode==0x81)?4:1, x5); - if(opcode==0x81) i64 = F32S; else i64 = F8S; + GETEDO(x6, (opcode == 0x81) ? 4 : 1, x5); + if (opcode == 0x81) + i64 = F32S; + else + i64 = F8S; emit_or32c(dyn, ninst, rex, ed, i64, x3, x4); WBACKO(x6); break; case 2: // ADC - if(opcode==0x81) {INST_NAME("ADC Ed, Id");} else {INST_NAME("ADC Ed, Ib");} + if (opcode == 0x81) { + INST_NAME("ADC Ed, Id"); + } else { + INST_NAME("ADC Ed, Ib"); + } READFLAGS(X_CF); SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETEDO(x6, (opcode==0x81)?4:1, x5); - if(opcode==0x81) i64 = F32S; else i64 = F8S; + GETEDO(x6, (opcode == 0x81) ? 4 : 1, x5); + if (opcode == 0x81) + i64 = F32S; + else + i64 = F8S; MOV64xw(x5, i64); SD(x6, xEmu, offsetof(x64emu_t, scratch)); emit_adc32(dyn, ninst, rex, ed, x5, x3, x4, x6, x9); @@ -275,45 +298,80 @@ uintptr_t dynarec64_64(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni WBACKO(x6); break; case 3: // SBB - if(opcode==0x81) {INST_NAME("SBB Ed, Id");} else {INST_NAME("SBB Ed, Ib");} + if (opcode == 0x81) { + INST_NAME("SBB Ed, Id"); + } else { + INST_NAME("SBB Ed, Ib"); + } READFLAGS(X_CF); SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETEDO(x6, (opcode==0x81)?4:1, x5); - if(opcode==0x81) i64 = F32S; else i64 = F8S; + GETEDO(x6, (opcode == 0x81) ? 4 : 1, x5); + if (opcode == 0x81) + i64 = F32S; + else + i64 = F8S; MOV64xw(x5, i64); emit_sbb32(dyn, ninst, rex, ed, x5, x3, x4, x9); WBACKO(x6); break; case 4: // AND - if(opcode==0x81) {INST_NAME("AND Ed, Id");} else {INST_NAME("AND Ed, Ib");} + if (opcode == 0x81) { + INST_NAME("AND Ed, Id"); + } else { + INST_NAME("AND Ed, Ib"); + } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETEDO(x6, (opcode==0x81)?4:1, x5); - if(opcode==0x81) i64 = F32S; else i64 = F8S; + GETEDO(x6, (opcode == 0x81) ? 4 : 1, x5); + if (opcode == 0x81) + i64 = F32S; + else + i64 = F8S; emit_and32c(dyn, ninst, rex, ed, i64, x3, x4); WBACKO(x6); break; case 5: // SUB - if(opcode==0x81) {INST_NAME("SUB Ed, Id");} else {INST_NAME("SUB Ed, Ib");} + if (opcode == 0x81) { + INST_NAME("SUB Ed, Id"); + } else { + INST_NAME("SUB Ed, Ib"); + } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETEDO(x6, (opcode==0x81)?4:1, x5); - if(opcode==0x81) i64 = F32S; else i64 = F8S; + GETEDO(x6, (opcode == 0x81) ? 4 : 1, x5); + if (opcode == 0x81) + i64 = F32S; + else + i64 = F8S; emit_sub32c(dyn, ninst, rex, ed, i64, x3, x4, x5, x9); WBACKO(x6); break; case 6: // XOR - if(opcode==0x81) {INST_NAME("XOR Ed, Id");} else {INST_NAME("XOR Ed, Ib");} + if (opcode == 0x81) { + INST_NAME("XOR Ed, Id"); + } else { + INST_NAME("XOR Ed, Ib"); + } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETEDO(x6, (opcode==0x81)?4:1, x5); - if(opcode==0x81) i64 = F32S; else i64 = F8S; + GETEDO(x6, (opcode == 0x81) ? 4 : 1, x5); + if (opcode == 0x81) + i64 = F32S; + else + i64 = F8S; emit_xor32c(dyn, ninst, rex, ed, i64, x3, x4); WBACKO(x6); break; case 7: // CMP - if(opcode==0x81) {INST_NAME("CMP Ed, Id");} else {INST_NAME("CMP Ed, Ib");} + if (opcode == 0x81) { + INST_NAME("CMP Ed, Id"); + } else { + INST_NAME("CMP Ed, Ib"); + } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETEDO(x6, (opcode==0x81)?4:1, x5); - if(opcode==0x81) i64 = F32S; else i64 = F8S; - if(i64) { + GETEDO(x6, (opcode == 0x81) ? 4 : 1, x5); + if (opcode == 0x81) + i64 = F32S; + else + i64 = F8S; + if (i64) { MOV64xw(x2, i64); emit_cmp32(dyn, ninst, rex, ed, x2, x3, x4, x5, x6); } else @@ -324,31 +382,31 @@ uintptr_t dynarec64_64(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0x88: INST_NAME("MOV Seg:Eb, Gb"); grab_segdata(dyn, addr, ninst, x4, seg); - nextop=F8; - gd = ((nextop&0x38)>>3)+(rex.r<<3); - if(rex.rex) { + nextop = F8; + gd = ((nextop & 0x38) >> 3) + (rex.r << 3); + if (rex.rex) { gb2 = 0; - gb1 = xRAX + gd; + gb1 = TO_NAT(gd); } else { - gb2 = ((gd&4)>>2); - gb1 = xRAX+(gd&3); + gb2 = ((gd & 4) >> 2); + gb1 = TO_NAT(gd & 3); } gd = x5; - if(gb2) { + if (gb2) { SRLI(x5, gb1, 8); gb1 = x5; } - if(MODREG) { - ed = (nextop&7) + (rex.b<<3); - if(rex.rex) { - eb1 = xRAX+ed; + if (MODREG) { + ed = (nextop & 7) + (rex.b << 3); + if (rex.rex) { + eb1 = TO_NAT(ed); eb2 = 0; } else { - eb1 = xRAX+(ed&3); // Ax, Cx, Dx or Bx - eb2 = ((ed&4)>>2); // L or H + eb1 = TO_NAT(ed & 3); // Ax, Cx, Dx or Bx + eb2 = ((ed & 4) >> 2); // L or H } ANDI(gd, gb1, 0xff); - if(eb2) { + if (eb2) { MOV64x(x1, 0xffffffffffff00ffLL); ANDI(x1, eb1, x1); SLLI(gd, gd, 8); @@ -367,11 +425,11 @@ uintptr_t dynarec64_64(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0x89: INST_NAME("MOV Seg:Ed, Gd"); grab_segdata(dyn, addr, ninst, x4, seg); - nextop=F8; + nextop = F8; GETGD; - if(MODREG) { // reg <= reg - MVxw(xRAX+(nextop&7)+(rex.b<<3), gd); - } else { // mem <= reg + if (MODREG) { // reg <= reg + MVxw(TO_NAT((nextop & 7) + (rex.b << 3)), gd); + } else { // mem <= reg addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, NULL, 1, 0); ADDz(x4, ed, x4); SDxw(gd, x4, fixedaddress); @@ -382,11 +440,11 @@ uintptr_t dynarec64_64(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0x8B: INST_NAME("MOV Gd, Seg:Ed"); grab_segdata(dyn, addr, ninst, x4, seg); - nextop=F8; + nextop = F8; GETGD; - if(MODREG) { // reg <= reg - MVxw(gd, xRAX+(nextop&7)+(rex.b<<3)); - } else { // mem <= reg + if (MODREG) { // reg <= reg + MVxw(gd, TO_NAT((nextop & 7) + (rex.b << 3))); + } else { // mem <= reg SMREAD(); addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, NULL, 1, 0); ADDz(x4, ed, x4); @@ -397,9 +455,9 @@ uintptr_t dynarec64_64(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni INST_NAME("MOV Seg,Ew"); grab_segdata(dyn, addr, ninst, x4, seg); nextop = F8; - u8 = (nextop&0x38) >> 3; - if ((nextop&0xC0) == 0xC0) { - ed = xRAX+(nextop&7) + (rex.b<<3); + u8 = (nextop & 0x38) >> 3; + if ((nextop & 0xC0) == 0xC0) { + ed = TO_NAT((nextop & 7) + (rex.b << 3)); } else { SMREAD(); addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, NULL, 0, 0); @@ -415,7 +473,7 @@ uintptr_t dynarec64_64(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni grab_segdata(dyn, addr, ninst, x4, seg); nextop = F8; if (MODREG) { - POP1z(xRAX + (nextop & 7) + (rex.b << 3)); + POP1z(TO_NAT((nextop & 7) + (rex.b << 3))); } else { POP1z(x3); // so this can handle POP [ESP] and maybe some variant too addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, NULL, 0, 0); @@ -434,7 +492,7 @@ uintptr_t dynarec64_64(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0xA1: INST_NAME("MOV EAX,FS:Od"); grab_segdata(dyn, addr, ninst, x4, seg); - if(rex.is32bits) + if (rex.is32bits) u64 = F32; else u64 = F64; @@ -447,7 +505,7 @@ uintptr_t dynarec64_64(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0xA3: INST_NAME("MOV FS:Od,EAX"); grab_segdata(dyn, addr, ninst, x4, seg); - if(rex.is32bits) + if (rex.is32bits) u64 = F32; else u64 = F64; @@ -461,15 +519,15 @@ uintptr_t dynarec64_64(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0xC6: INST_NAME("MOV Seg:Eb, Ib"); grab_segdata(dyn, addr, ninst, x4, seg); - nextop=F8; - if(MODREG) { // reg <= u8 + nextop = F8; + if (MODREG) { // reg <= u8 u8 = F8; - if(!rex.rex) { - ed = (nextop&7); - eb1 = xRAX+(ed&3); // Ax, Cx, Dx or Bx - eb2 = (ed&4)>>2; // L or H + if (!rex.rex) { + ed = (nextop & 7); + eb1 = TO_NAT(ed & 3); // Ax, Cx, Dx or Bx + eb2 = (ed & 4) >> 2; // L or H } else { - eb1 = xRAX+(nextop&7)+(rex.b<<3); + eb1 = TO_NAT((nextop & 7) + (rex.b << 3)); eb2 = 0; } @@ -479,9 +537,9 @@ uintptr_t dynarec64_64(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni ORI(x3, x3, 0xff); // apply mask AND(eb1, eb1, x3); - if(u8) { - if((u8<<8)<2048) { - ADDI(x4, xZR, u8<<8); + if (u8) { + if ((u8 << 8) < 2048) { + ADDI(x4, xZR, u8 << 8); } else { ADDI(x4, xZR, u8); SLLI(x4, x4, 8); @@ -489,13 +547,13 @@ uintptr_t dynarec64_64(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni OR(eb1, eb1, x4); } } else { - ANDI(eb1, eb1, 0xf00); // mask ffffffffffffff00 + ANDI(eb1, eb1, 0xf00); // mask ffffffffffffff00 ORI(eb1, eb1, u8); } - } else { // mem <= u8 + } else { // mem <= u8 addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, NULL, 1, 1); u8 = F8; - if(u8) { + if (u8) { ADDI(x3, xZR, u8); ed = x3; } else @@ -508,15 +566,15 @@ uintptr_t dynarec64_64(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0xC7: INST_NAME("MOV Seg:Ed, Id"); grab_segdata(dyn, addr, ninst, x4, seg); - nextop=F8; - if(MODREG) { // reg <= i32 + nextop = F8; + if (MODREG) { // reg <= i32 i64 = F32S; - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); MOV64xw(ed, i64); - } else { // mem <= i32 + } else { // mem <= i32 addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, NULL, 1, 4); i64 = F32S; - if(i64) { + if (i64) { MOV64x(x3, i64); ed = x3; } else @@ -529,7 +587,7 @@ uintptr_t dynarec64_64(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0xFF: nextop = F8; - switch((nextop>>3)&7) { + switch ((nextop >> 3) & 7) { case 6: // Push Ed INST_NAME("PUSH Ed"); grab_segdata(dyn, addr, ninst, x6, seg); diff --git a/src/dynarec/rv64/dynarec_rv64_66.c b/src/dynarec/rv64/dynarec_rv64_66.c index 885d8c14..80a28e13 100644 --- a/src/dynarec/rv64/dynarec_rv64_66.c +++ b/src/dynarec/rv64/dynarec_rv64_66.c @@ -45,20 +45,20 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni MAYUSE(j64); MAYUSE(lock); - while((opcode==0x2E) || (opcode==0x36) || (opcode==0x66)) // ignoring CS:, SS: or multiple 0x66 + while ((opcode == 0x2E) || (opcode == 0x36) || (opcode == 0x66)) // ignoring CS:, SS: or multiple 0x66 opcode = F8; - while((opcode==0xF2) || (opcode==0xF3)) { - rep = opcode-0xF1; + while ((opcode == 0xF2) || (opcode == 0xF3)) { + rep = opcode - 0xF1; opcode = F8; } GETREX(); - if(rex.w && !(opcode==0x0f || opcode==0xf0 || opcode==0x64 || opcode==0x65)) // rex.w cancels "66", but not for 66 0f type of prefix - return dynarec64_00(dyn, addr-1, ip, ninst, rex, rep, ok, need_epilog); // addr-1, to "put back" opcode + if (rex.w && !(opcode == 0x0f || opcode == 0xf0 || opcode == 0x64 || opcode == 0x65)) // rex.w cancels "66", but not for 66 0f type of prefix + return dynarec64_00(dyn, addr - 1, ip, ninst, rex, rep, ok, need_epilog); // addr-1, to "put back" opcode - switch(opcode) { + switch (opcode) { case 0x01: INST_NAME("ADD Ew, Gw"); SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); @@ -83,7 +83,7 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni INST_NAME("ADD AX, Iw"); SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); i32 = F16; - ZEXTH(x1 , xRAX); + ZEXTH(x1, xRAX); MOV32w(x2, i32); emit_add16(dyn, ninst, x1, x2, x3, x4, x6); INSHz(xRAX, x1, x3, x4, 1, 0); @@ -129,7 +129,7 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni INSHz(xRAX, x1, x3, x4, 1, 0); break; case 0x0F: - switch(rep) { + switch (rep) { case 0: { if (rv64_vector) retaddr = dynarec64_660F_vector(dyn, addr, ip, ninst, rex, ok, need_epilog); @@ -296,8 +296,8 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); nextop = F8; if (MODREG && !dyn->insts[ninst].x64.gen_flags) { - gd = xRAX + ((nextop & 0x38) >> 3) + (rex.r << 3); - ed = xRAX + (nextop & 7) + (rex.b << 3); + gd = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); if (ed == gd) { SRLI(ed, ed, 16); SLLI(ed, ed, 16); @@ -315,8 +315,8 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); nextop = F8; if (MODREG && !dyn->insts[ninst].x64.gen_flags) { - gd = xRAX + ((nextop & 0x38) >> 3) + (rex.r << 3); - ed = xRAX + (nextop & 7) + (rex.b << 3); + gd = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); if (ed == gd) { SRLI(gd, gd, 16); SLLI(gd, gd, 16); @@ -359,7 +359,7 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); i32 = F16; ZEXTH(x1, xRAX); - if(i32) { + if (i32) { MOV32w(x2, i32); emit_cmp16(dyn, ninst, x1, x2, x3, x4, x5, x6); } else { @@ -376,7 +376,7 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0x47: INST_NAME("INC Reg16 (32bits)"); SETFLAGS(X_ALL & ~X_CF, SF_SUBSET_PENDING, NAT_FLAGS_FUSION); - gd = xRAX + (opcode&7); + gd = TO_NAT(opcode & 7); ZEXTH(x1, gd); emit_inc16(dyn, ninst, x1, x2, x3, x4, x5); INSHz(gd, x1, x3, x4, 1, 0); @@ -391,7 +391,7 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0x4F: INST_NAME("DEC Reg16 (32bits)"); SETFLAGS(X_ALL & ~X_CF, SF_SUBSET_PENDING, NAT_FLAGS_FUSION); - gd = xRAX + (opcode&7); + gd = TO_NAT(opcode & 7); ZEXTH(x1, gd); emit_dec16(dyn, ninst, x1, x2, x3, x4, x5); INSHz(gd, x1, x3, x4, 1, 0); @@ -405,7 +405,7 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0x56: case 0x57: INST_NAME("PUSH reg"); - gd = xRAX + (opcode & 0x07) + (rex.b << 3); + gd = TO_NAT(opcode & 0x07) + (rex.b << 3); PUSH1_16(gd); break; case 0x58: @@ -417,7 +417,7 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0x5E: case 0x5F: INST_NAME("POP reg"); - gd = xRAX + (opcode & 0x07) + (rex.b << 3); + gd = TO_NAT(opcode & 0x07) + (rex.b << 3); POP1_16(x1); INSHz(gd, x1, x2, x3, 1, 0); break; @@ -432,20 +432,23 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni break; case 0x69: case 0x6B: - if(opcode==0x69) { + if (opcode == 0x69) { INST_NAME("IMUL Gw,Ew,Iw"); } else { INST_NAME("IMUL Gw,Ew,Ib"); } SETFLAGS(X_ALL, SF_PENDING, NAT_FLAGS_NOFUSION); nextop = F8; - GETSEW(x1, (opcode==0x69)?2:1); - if(opcode==0x69) i32 = F16S; else i32 = F8S; + GETSEW(x1, (opcode == 0x69) ? 2 : 1); + if (opcode == 0x69) + i32 = F16S; + else + i32 = F8S; MOV32w(x2, i32); MULW(x2, x2, x1); ZEXTH(x2, x2); UFLAG_RES(x2); - gd=x2; + gd = x2; GWBACK; UFLAG_DF(x1, d_imul16); break; @@ -466,83 +469,139 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0x7e: case 0x7f: // just use regular conditional jump - return dynarec64_00(dyn, addr-1, ip, ninst, rex, rep, ok, need_epilog); + return dynarec64_00(dyn, addr - 1, ip, ninst, rex, rep, ok, need_epilog); case 0x81: case 0x83: nextop = F8; - switch((nextop>>3)&7) { + switch ((nextop >> 3) & 7) { case 0: // ADD - if(opcode==0x81) {INST_NAME("ADD Ew, Iw");} else {INST_NAME("ADD Ew, Ib");} + if (opcode == 0x81) { + INST_NAME("ADD Ew, Iw"); + } else { + INST_NAME("ADD Ew, Ib"); + } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETEW(x1, (opcode==0x81)?2:1); - if(opcode==0x81) u64 = F16; else u64 = (uint16_t)(int16_t)F8S; + GETEW(x1, (opcode == 0x81) ? 2 : 1); + if (opcode == 0x81) + u64 = F16; + else + u64 = (uint16_t)(int16_t)F8S; MOV64x(x5, u64); emit_add16(dyn, ninst, ed, x5, x2, x4, x6); EWBACK; break; case 1: // OR - if(opcode==0x81) {INST_NAME("OR Ew, Iw");} else {INST_NAME("OR Ew, Ib");} + if (opcode == 0x81) { + INST_NAME("OR Ew, Iw"); + } else { + INST_NAME("OR Ew, Ib"); + } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETEW(x1, (opcode==0x81)?2:1); - if(opcode==0x81) u64 = F16; else u64 = (uint16_t)(int16_t)F8S; + GETEW(x1, (opcode == 0x81) ? 2 : 1); + if (opcode == 0x81) + u64 = F16; + else + u64 = (uint16_t)(int16_t)F8S; MOV64x(x5, u64); emit_or16(dyn, ninst, x1, x5, x2, x4); EWBACK; break; case 2: // ADC - if(opcode==0x81) {INST_NAME("ADC Ew, Iw");} else {INST_NAME("ADC Ew, Ib");} + if (opcode == 0x81) { + INST_NAME("ADC Ew, Iw"); + } else { + INST_NAME("ADC Ew, Ib"); + } READFLAGS(X_CF); SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETEW(x1, (opcode==0x81)?2:1); - if(opcode==0x81) u64 = F16; else u64 = (uint16_t)(int16_t)F8S; + GETEW(x1, (opcode == 0x81) ? 2 : 1); + if (opcode == 0x81) + u64 = F16; + else + u64 = (uint16_t)(int16_t)F8S; MOV64x(x5, u64); emit_adc16(dyn, ninst, x1, x5, x2, x4, x6); EWBACK; break; case 3: // SBB - if(opcode==0x81) {INST_NAME("SBB Ew, Iw");} else {INST_NAME("SBB Ew, Ib");} + if (opcode == 0x81) { + INST_NAME("SBB Ew, Iw"); + } else { + INST_NAME("SBB Ew, Ib"); + } READFLAGS(X_CF); SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETEW(x1, (opcode==0x81)?2:1); - if(opcode==0x81) u64 = F16; else u64 = (uint16_t)(int16_t)F8S; + GETEW(x1, (opcode == 0x81) ? 2 : 1); + if (opcode == 0x81) + u64 = F16; + else + u64 = (uint16_t)(int16_t)F8S; MOV64x(x5, u64); emit_sbb16(dyn, ninst, x1, x5, x2, x4, x6); EWBACK; break; case 4: // AND - if(opcode==0x81) {INST_NAME("AND Ew, Iw");} else {INST_NAME("AND Ew, Ib");} + if (opcode == 0x81) { + INST_NAME("AND Ew, Iw"); + } else { + INST_NAME("AND Ew, Ib"); + } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETEW(x1, (opcode==0x81)?2:1); - if(opcode==0x81) u64 = F16; else u64 = (uint16_t)(int16_t)F8S; + GETEW(x1, (opcode == 0x81) ? 2 : 1); + if (opcode == 0x81) + u64 = F16; + else + u64 = (uint16_t)(int16_t)F8S; MOV64x(x5, u64); emit_and16(dyn, ninst, x1, x5, x2, x4); EWBACK; break; case 5: // SUB - if(opcode==0x81) {INST_NAME("SUB Ew, Iw");} else {INST_NAME("SUB Ew, Ib");} + if (opcode == 0x81) { + INST_NAME("SUB Ew, Iw"); + } else { + INST_NAME("SUB Ew, Ib"); + } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETEW(x1, (opcode==0x81)?2:1); - if(opcode==0x81) u64 = F16; else u64 = (uint16_t)(int16_t)F8S; + GETEW(x1, (opcode == 0x81) ? 2 : 1); + if (opcode == 0x81) + u64 = F16; + else + u64 = (uint16_t)(int16_t)F8S; MOV64x(x5, u64); emit_sub16(dyn, ninst, x1, x5, x2, x4, x6); EWBACK; break; case 6: // XOR - if(opcode==0x81) {INST_NAME("XOR Ew, Iw");} else {INST_NAME("XOR Ew, Ib");} + if (opcode == 0x81) { + INST_NAME("XOR Ew, Iw"); + } else { + INST_NAME("XOR Ew, Ib"); + } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETEW(x1, (opcode==0x81)?2:1); - if(opcode==0x81) u64 = F16; else u64 = (uint16_t)(int16_t)F8S; + GETEW(x1, (opcode == 0x81) ? 2 : 1); + if (opcode == 0x81) + u64 = F16; + else + u64 = (uint16_t)(int16_t)F8S; MOV64x(x5, u64); emit_xor16(dyn, ninst, x1, x5, x2, x4, x6); EWBACK; break; case 7: // CMP - if(opcode==0x81) {INST_NAME("CMP Ew, Iw");} else {INST_NAME("CMP Ew, Ib");} + if (opcode == 0x81) { + INST_NAME("CMP Ew, Iw"); + } else { + INST_NAME("CMP Ew, Ib"); + } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETEW(x1, (opcode==0x81)?2:1); - if(opcode==0x81) u64 = F16; else u64 = (uint16_t)(int16_t)F8S; - if(u64) { + GETEW(x1, (opcode == 0x81) ? 2 : 1); + if (opcode == 0x81) + u64 = F16; + else + u64 = (uint16_t)(int16_t)F8S; + if (u64) { MOV64x(x2, u64); emit_cmp16(dyn, ninst, x1, x2, x9, x4, x5, x6); } else @@ -563,7 +622,7 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0x87: INST_NAME("(LOCK) XCHG Ew, Gw"); nextop = F8; - if(MODREG) { + if (MODREG) { GETGD; GETED(0); MV(x1, gd); @@ -620,8 +679,8 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni INST_NAME("MOV Ew, Gw"); nextop = F8; GETGD; - if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + if (MODREG) { + ed = TO_NAT((nextop & 7) + (rex.b << 3)); if (ed != gd) { INSHz(ed, gd, x2, x3, 1, 1); } @@ -634,9 +693,9 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0x8B: INST_NAME("MOV Gw, Ew"); nextop = F8; - GETGD; // don't need GETGW neither - if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + GETGD; // don't need GETGW neither + if (MODREG) { + ed = TO_NAT((nextop & 7) + (rex.b << 3)); if (ed != gd) { INSHz(gd, ed, x2, x3, 1, 1); } @@ -652,7 +711,7 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; LHU(x3, xEmu, offsetof(x64emu_t, segs[(nextop & 0x38) >> 3])); if ((nextop & 0xC0) == 0xC0) { // reg <= seg - INSHz(xRAX + (nextop & 7) + (rex.b << 3), x3, x1, x2, 1, 0); + INSHz(TO_NAT((nextop & 7) + (rex.b << 3)), x3, x1, x2, 1, 0); } else { // mem <= seg addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, NULL, 1, 0); SH(x3, ed, fixedaddress); @@ -667,15 +726,15 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0x95: case 0x96: case 0x97: - gd = xRAX+(opcode&0x07)+(rex.b<<3); - if(gd==xRAX) { - INST_NAME("NOP"); - } else { - INST_NAME("XCHG AX, Reg"); - MV(x2, xRAX); - INSHz(xRAX, gd, x3, x4, 1, 1); - INSHz(gd, x2, x3, x4, 0, 1); - } + gd = TO_NAT(opcode & 0x07) + (rex.b << 3); + if (gd == xRAX) { + INST_NAME("NOP"); + } else { + INST_NAME("XCHG AX, Reg"); + MV(x2, xRAX); + INSHz(xRAX, gd, x3, x4, 1, 1); + INSHz(gd, x2, x3, x4, 0, 1); + } break; case 0x98: INST_NAME("CBW"); @@ -720,31 +779,40 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni break; case 0xA1: INST_NAME("MOV EAX,Od"); - if (rex.is32bits) u64 = F32; else u64 = F64; + if (rex.is32bits) + u64 = F32; + else + u64 = F64; MOV64z(x1, u64); - if (isLockAddress(u64)) lock = 1; else lock = 0; + if (isLockAddress(u64)) + lock = 1; + else + lock = 0; SMREADLOCK(lock); LHU(x2, x1, 0); INSHz(xRAX, x2, x3, x4, 1, 0); break; case 0xA3: INST_NAME("MOV Od,EAX"); - if(rex.is32bits) + if (rex.is32bits) u64 = F32; else u64 = F64; MOV64z(x1, u64); - if(isLockAddress(u64)) lock=1; else lock = 0; + if (isLockAddress(u64)) + lock = 1; + else + lock = 0; SH(xRAX, x1, 0); SMWRITELOCK(lock); break; case 0xA4: - if(rep) { + if (rep) { INST_NAME("REP MOVSB"); CBZ_NEXT(xRCX); - ANDI(x1, xFlags, 1<<F_DF); + ANDI(x1, xFlags, 1 << F_DF); BNEZ_MARK2(x1); - MARK; // Part with DF==0 + MARK; // Part with DF==0 LBU(x1, xRSI, 0); SB(x1, xRDI, 0); ADDI(xRSI, xRSI, 1); @@ -752,7 +820,7 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni SUBI(xRCX, xRCX, 1); BNEZ_MARK(xRCX); B_NEXT_nocond; - MARK2; // Part with DF==1 + MARK2; // Part with DF==1 LBU(x1, xRSI, 0); SB(x1, xRDI, 0); SUBI(xRSI, xRSI, 1); @@ -770,12 +838,12 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni } break; case 0xA5: - if(rep) { + if (rep) { INST_NAME("REP MOVSW"); CBZ_NEXT(xRCX); - ANDI(x1, xFlags, 1<<F_DF); + ANDI(x1, xFlags, 1 << F_DF); BNEZ_MARK2(x1); - MARK; // Part with DF==0 + MARK; // Part with DF==0 LH(x1, xRSI, 0); SH(x1, xRDI, 0); ADDI(xRSI, xRSI, 2); @@ -783,7 +851,7 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni SUBI(xRCX, xRCX, 1); BNEZ_MARK(xRCX); B_NEXT_nocond; - MARK2; // Part with DF==1 + MARK2; // Part with DF==1 LH(x1, xRSI, 0); SH(x1, xRDI, 0); SUBI(xRSI, xRSI, 2); @@ -804,7 +872,11 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni switch (rep) { case 1: case 2: - if (rep == 1) { INST_NAME("REPNZ CMPSW"); } else { INST_NAME("REPZ CMPSW"); } + if (rep == 1) { + INST_NAME("REPNZ CMPSW"); + } else { + INST_NAME("REPZ CMPSW"); + } MAYSETFLAGS(); SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); CBZ_NEXT(xRCX); @@ -816,7 +888,11 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni ADDI(xRSI, xRSI, 2); ADDI(xRDI, xRDI, 2); SUBI(xRCX, xRCX, 1); - if (rep == 1) { BEQ_MARK3(x1, x2); } else { BNE_MARK3(x1, x2); } + if (rep == 1) { + BEQ_MARK3(x1, x2); + } else { + BNE_MARK3(x1, x2); + } BNEZ_MARK(xRCX); B_MARK3_nocond; MARK2; // Part with DF==1 @@ -825,7 +901,11 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni SUBI(xRSI, xRSI, 2); SUBI(xRDI, xRDI, 2); SUBI(xRCX, xRCX, 1); - if (rep == 1) { BEQ_MARK3(x1, x2); } else { BNE_MARK3(x1, x2); } + if (rep == 1) { + BEQ_MARK3(x1, x2); + } else { + BNE_MARK3(x1, x2); + } BNEZ_MARK2(xRCX); MARK3; // end emit_cmp16(dyn, ninst, x1, x2, x3, x4, x5, x6); @@ -852,18 +932,18 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni emit_test16(dyn, ninst, x1, x2, x3, x4, x5); break; case 0xAB: - if(rep) { + if (rep) { INST_NAME("REP STOSW"); CBZ_NEXT(xRCX); - ANDI(x1, xFlags, 1<<F_DF); + ANDI(x1, xFlags, 1 << F_DF); BNEZ_MARK2(x1); - MARK; // Part with DF==0 + MARK; // Part with DF==0 SH(xRAX, xRDI, 0); ADDI(xRDI, xRDI, 2); SUBI(xRCX, xRCX, 1); BNEZ_MARK(xRCX); B_NEXT_nocond; - MARK2; // Part with DF==1 + MARK2; // Part with DF==1 SH(xRAX, xRDI, 0); SUBI(xRDI, xRDI, 2); SUBI(xRCX, xRCX, 1); @@ -891,17 +971,25 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni switch (rep) { case 1: case 2: - if(rep==1) {INST_NAME("REPNZ SCASW");} else {INST_NAME("REPZ SCASW");} + if (rep == 1) { + INST_NAME("REPNZ SCASW"); + } else { + INST_NAME("REPZ SCASW"); + } MAYSETFLAGS(); SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); CBZ_NEXT(xRCX); - GETDIR(x3, x1, rex.w?8:2); + GETDIR(x3, x1, rex.w ? 8 : 2); if (rex.w) { MARK; LD(x2, xRDI, 0); ADD(xRDI, xRDI, x3); ADDI(xRCX, xRCX, -1); - if (rep==1) {BEQ_MARK3(xRAX, x2);} else {BNE_MARK3(xRAX, x2);} + if (rep == 1) { + BEQ_MARK3(xRAX, x2); + } else { + BNE_MARK3(xRAX, x2); + } BNE_MARK(xRCX, xZR); MARK3; emit_cmp32(dyn, ninst, rex, xRAX, x2, x3, x4, x5, x6); @@ -911,7 +999,11 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni LHU(x2, xRDI, 0); ADD(xRDI, xRDI, x3); ADDI(xRCX, xRCX, -1); - if (rep==1) {BEQ_MARK3(x1, x2);} else {BNE_MARK3(x1, x2);} + if (rep == 1) { + BEQ_MARK3(x1, x2); + } else { + BNE_MARK3(x1, x2); + } BNE_MARK(xRCX, xZR); MARK3; emit_cmp16(dyn, ninst, x1, x2, x3, x4, x5, x6); @@ -920,7 +1012,7 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni default: INST_NAME("SCASW"); SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETDIR(x3, x1, rex.w?8:2); + GETDIR(x3, x1, rex.w ? 8 : 2); if (rex.w) { LD(x2, xRDI, 0); ADD(xRDI, xRDI, x3); @@ -946,13 +1038,13 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni INST_NAME("MOV Reg, Iw"); u16 = F16; MOV32w(x1, u16); - gd = xRAX + (opcode & 7) + (rex.b << 3); + gd = TO_NAT(opcode & 7) + (rex.b << 3); INSHz(gd, x1, x2, x3, 1, 0); break; case 0xC1: nextop = F8; - switch((nextop>>3)&7) { + switch ((nextop >> 3) & 7) { case 0: INST_NAME("ROL Ew, Ib"); MESSAGE(LOG_DUMP, "Need Optimization\n"); @@ -1001,7 +1093,7 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni if (geted_ib(dyn, addr, ninst, nextop) & 0x1f) { SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); // some flags are left undefined GETEW(x1, 0); - u8 = (F8)&0x1f; + u8 = (F8) & 0x1f; emit_shl16c(dyn, ninst, x1, u8, x5, x4, x6); EWBACK; } else { @@ -1014,7 +1106,7 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni if (geted_ib(dyn, addr, ninst, nextop) & 0x1f) { SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); // some flags are left undefined GETEW(x1, 0); - u8 = (F8)&0x1f; + u8 = (F8) & 0x1f; emit_shr16c(dyn, ninst, x1, u8, x5, x4, x6); EWBACK; } else { @@ -1027,7 +1119,7 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni if (geted_ib(dyn, addr, ninst, nextop) & 0x1f) { SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); // some flags are left undefined GETSEW(x1, 0); - u8 = (F8)&0x1f; + u8 = (F8) & 0x1f; emit_sar16c(dyn, ninst, x1, u8, x5, x4, x6); EWBACK; } else { @@ -1041,8 +1133,8 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0xC7: INST_NAME("MOV Ew, Iw"); nextop = F8; - if(MODREG) { - ed = xRAX + (nextop & 7) + (rex.b << 3); + if (MODREG) { + ed = TO_NAT((nextop & 7) + (rex.b << 3)); u16 = F16; MOV32w(x1, u16); INSHz(ed, x1, x2, x3, 1, 0); @@ -1057,9 +1149,9 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0xD1: case 0xD3: nextop = F8; - switch((nextop>>3)&7) { + switch ((nextop >> 3) & 7) { case 0: - if(opcode==0xD1) { + if (opcode == 0xD1) { INST_NAME("ROL Ew, 1"); MOV32w(x2, 1); } else { @@ -1073,7 +1165,7 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni EWBACK; break; case 1: - if(opcode==0xD1) { + if (opcode == 0xD1) { INST_NAME("ROR Ew, 1"); MOV32w(x2, 1); } else { @@ -1087,7 +1179,7 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni EWBACK; break; case 2: - if(opcode==0xD1) { + if (opcode == 0xD1) { INST_NAME("RCL Ew, 1"); MOV32w(x2, 1); } else { @@ -1102,7 +1194,7 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni EWBACK; break; case 3: - if(opcode==0xD1) { + if (opcode == 0xD1) { INST_NAME("RCR Ew, 1"); MOV32w(x2, 1); } else { @@ -1117,7 +1209,7 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni EWBACK; break; case 5: - if(opcode==0xD1) { + if (opcode == 0xD1) { INST_NAME("SHR Ew, 1"); MOV32w(x2, 1); } else { @@ -1126,7 +1218,7 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni BEQ_NEXT(x2, xZR); } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); // some flags are left undefined - if(box64_dynarec_safeflags>1) + if (box64_dynarec_safeflags > 1) MAYSETFLAGS(); GETEW(x1, 0); emit_shr16(dyn, ninst, x1, x2, x5, x4, x6); @@ -1134,7 +1226,7 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni break; case 4: case 6: - if(opcode==0xD1) { + if (opcode == 0xD1) { INST_NAME("SHL Ew, 1"); MOV32w(x2, 1); } else { @@ -1143,14 +1235,14 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni BEQ_NEXT(x2, xZR); } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); // some flags are left undefined - if(box64_dynarec_safeflags>1) + if (box64_dynarec_safeflags > 1) MAYSETFLAGS(); GETEW(x1, 0); emit_shl16(dyn, ninst, x1, x2, x5, x4, x6); EWBACK; break; case 7: - if(opcode==0xD1) { + if (opcode == 0xD1) { INST_NAME("SAR Ew, 1"); MOV32w(x2, 1); } else { @@ -1159,7 +1251,7 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni BEQ_NEXT(x2, xZR); } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); // some flags are left undefined - if(box64_dynarec_safeflags>1) + if (box64_dynarec_safeflags > 1) MAYSETFLAGS(); GETSEW(x1, 0); emit_sar16(dyn, ninst, x1, x2, x5, x4, x6); @@ -1175,7 +1267,7 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0xF7: nextop = F8; - switch((nextop>>3)&7) { + switch ((nextop >> 3) & 7) { case 0: case 1: INST_NAME("TEST Ew, Iw"); @@ -1237,7 +1329,7 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni SLLI(x9, xRDX, 48); SRLI(x9, x9, 32); OR(x2, x2, x9); - if(box64_dynarec_div0) { + if (box64_dynarec_div0) { BNE_MARK3(ed, xZR); GETIP_(ip); STORE_XEMU_CALL(x6); @@ -1258,7 +1350,7 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni SETFLAGS(X_ALL, SF_SET, NAT_FLAGS_NOFUSION); SET_DFNONE(); GETSEW(x1, 0); - if(box64_dynarec_div0) { + if (box64_dynarec_div0) { BNE_MARK3(ed, xZR); GETIP_(ip); STORE_XEMU_CALL(x6); @@ -1284,7 +1376,7 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0xFF: nextop = F8; - switch((nextop>>3)&7) { + switch ((nextop >> 3) & 7) { case 0: INST_NAME("INC Ew"); SETFLAGS(X_ALL & ~X_CF, SF_SUBSET_PENDING, NAT_FLAGS_FUSION); diff --git a/src/dynarec/rv64/dynarec_rv64_660f.c b/src/dynarec/rv64/dynarec_rv64_660f.c index 27021b3f..f9547d8c 100644 --- a/src/dynarec/rv64/dynarec_rv64_660f.c +++ b/src/dynarec/rv64/dynarec_rv64_660f.c @@ -245,8 +245,7 @@ uintptr_t dynarec64_660F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int GETEXSD(v0, 0); CLEAR_FLAGS(); // if isnan(d0) || isnan(v0) - IFX(X_ZF | X_PF | X_CF) - { + IFX (X_ZF | X_PF | X_CF) { FEQD(x3, d0, d0); FEQD(x2, v0, v0); AND(x2, x2, x3); @@ -256,8 +255,7 @@ uintptr_t dynarec64_660F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int } MARK; // else if isless(d0, v0) - IFX(X_CF) - { + IFX (X_CF) { FLTD(x2, d0, v0); BEQ_MARK2(x2, xZR); ORI(xFlags, xFlags, 1 << F_CF); @@ -265,8 +263,7 @@ uintptr_t dynarec64_660F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int } MARK2; // else if d0 == v0 - IFX(X_ZF) - { + IFX (X_ZF) { FEQD(x2, d0, v0); CBZ_NEXT(x2); ORI(xFlags, xFlags, 1 << F_ZF); @@ -283,7 +280,7 @@ uintptr_t dynarec64_660F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int nextop = F8; \ GETGD; \ if (MODREG) { \ - ed = xRAX + (nextop & 7) + (rex.b << 3); \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ ZEXTH(x4, ed); \ ed = x4; \ } else { \ @@ -1130,7 +1127,7 @@ uintptr_t dynarec64_660F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int GETGX(); if (rex.w) { if (MODREG) { - ed = xRAX + (nextop & 7) + (rex.b << 3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); LD(ed, gback, gdoffset + 0); } else { addr = geted(dyn, addr, ninst, nextop, &ed, x2, x3, &fixedaddress, rex, NULL, 1, 0); @@ -1140,7 +1137,7 @@ uintptr_t dynarec64_660F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int } } else { if (MODREG) { - ed = xRAX + (nextop & 7) + (rex.b << 3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); LWU(ed, gback, gdoffset + 0); } else { addr = geted(dyn, addr, ninst, nextop, &ed, x2, x3, &fixedaddress, rex, NULL, 1, 0); @@ -1238,15 +1235,15 @@ uintptr_t dynarec64_660F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int case 0xB6: INST_NAME("MOVZX Gw, Eb"); nextop = F8; - gd = xRAX+((nextop&0x38)>>3)+(rex.r<<3); + gd = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)); if (MODREG) { if (rex.rex) { - eb1 = xRAX + (nextop & 7) + (rex.b << 3); + eb1 = TO_NAT((nextop & 7) + (rex.b << 3)); eb2 = 0; } else { ed = (nextop & 7); - eb1 = xRAX + (ed & 3); // Ax, Cx, Dx or Bx - eb2 = (ed & 4) >> 2; // L or H + eb1 = TO_NAT(ed & 3); // Ax, Cx, Dx or Bx + eb2 = (ed & 4) >> 2; // L or H } if (eb2) { SRLI(x1, eb1, 8); @@ -1353,7 +1350,7 @@ uintptr_t dynarec64_660F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int nextop = F8; GETGD; if (MODREG) { - ed = xRAX + (nextop & 7) + (rex.b << 3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); wback = 0; } else { SMREAD(); @@ -1426,13 +1423,13 @@ uintptr_t dynarec64_660F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int GETGD; if (MODREG) { if (rex.rex) { - ed = xRAX + (nextop & 7) + (rex.b << 3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); eb1 = ed; eb2 = 0; } else { ed = (nextop & 7); - eb1 = xRAX + (ed & 3); // Ax, Cx, Dx or Bx - eb2 = (ed & 4) >> 2; // L or H + eb1 = TO_NAT(ed & 3); // Ax, Cx, Dx or Bx + eb2 = (ed & 4) >> 2; // L or H } SLLI(x1, eb1, 56 - eb2 * 8); SRAI(x1, x1, 56); @@ -1453,13 +1450,13 @@ uintptr_t dynarec64_660F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int nextop = F8; GETGW(x1); GETEW(x2, 0); - if (!(MODREG && wback == xRAX + ((nextop & 0x38) >> 3) + (rex.r << 3))) + if (!(MODREG && wback == TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)))) MV(x9, ed); emit_add16(dyn, ninst, ed, gd, x4, x5, x6); - if (!(MODREG && wback == xRAX + ((nextop & 0x38) >> 3) + (rex.r << 3))) + if (!(MODREG && wback == TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)))) MV(gd, x9); EWBACK; - if (!(MODREG && wback == xRAX + ((nextop & 0x38) >> 3) + (rex.r << 3))) + if (!(MODREG && wback == TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)))) GWBACK; break; case 0xC2: @@ -1524,7 +1521,7 @@ uintptr_t dynarec64_660F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int nextop = F8; GETED(1); GETGX(); - u8 = (F8)&7; + u8 = (F8) & 7; SH(ed, gback, gdoffset + u8 * 2); break; case 0xC5: @@ -1532,7 +1529,7 @@ uintptr_t dynarec64_660F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int nextop = F8; GETGD; GETEX(x1, 0, 14); - u8 = (F8)&7; + u8 = (F8) & 7; LHU(gd, wback, fixedaddress + u8 * 2); break; case 0xC6: @@ -1558,10 +1555,10 @@ uintptr_t dynarec64_660F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int case 0xCC: case 0xCD: case 0xCE: - case 0xCF: /* BSWAP reg */ + case 0xCF: /* BSWAP reg */ INST_NAME("BSWAP Reg"); - gd = xRAX+(opcode&7)+(rex.b<<3); - if(rex.w) { + gd = TO_NAT((opcode & 7) + (rex.b << 3)); + if (rex.w) { REV8xw(gd, gd, x1, x2, x3, x4); } else { ANDI(x1, gd, 0xff); @@ -2081,14 +2078,9 @@ uintptr_t dynarec64_660F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int nextop = F8; GETGX(); GETEX(x2, 0, 14); - SSE_LOOP_WS(x3, x4, - if (rv64_zbb) { - MAX(x3, x3, x4); - } else { + SSE_LOOP_WS(x3, x4, if (rv64_zbb) { MAX(x3, x3, x4); } else { BGE(x3, x4, 8); - MV(x3, x4); - } - ); + MV(x3, x4); }); break; case 0xEF: INST_NAME("PXOR Gx, Ex"); diff --git a/src/dynarec/rv64/dynarec_rv64_660f_vector.c b/src/dynarec/rv64/dynarec_rv64_660f_vector.c index 294009d0..2d733b22 100644 --- a/src/dynarec/rv64/dynarec_rv64_660f_vector.c +++ b/src/dynarec/rv64/dynarec_rv64_660f_vector.c @@ -810,7 +810,7 @@ uintptr_t dynarec64_660F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t i SET_ELEMENT_WIDTH(x1, (rex.w ? VECTOR_SEW64 : VECTOR_SEW32), 1); GETGX_vector(q0, 1, dyn->vector_eew); if (MODREG) { - ed = xRAX + (nextop & 7) + (rex.b << 3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); u8 = F8; if (u8 & (rex.w ? 1 : 3)) { if (rv64_xtheadvector) { @@ -852,7 +852,7 @@ uintptr_t dynarec64_660F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t i GETGX_vector(q0, 1, dyn->vector_eew); if (MODREG) { u8 = (F8) & (rex.w ? 1 : 3); - ed = xRAX + (nextop & 7) + (rex.b << 3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); } else { SMREAD(); addr = geted(dyn, addr, ninst, nextop, &ed, x2, x3, &fixedaddress, rex, NULL, 1, 1); @@ -1256,8 +1256,10 @@ uintptr_t dynarec64_660F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t i VWADDU_VX(d0, v0, xZR, VECTOR_UNMASKED); VWADDU_VX(v0, v1, xZR, VECTOR_UNMASKED); SET_ELEMENT_WIDTH(x1, i32, 1); - if (d2 < 32) VSLL_VI(v0, v0, d2, VECTOR_UNMASKED); - else VSLL_VX(v0, v0, x2, VECTOR_UNMASKED); + if (d2 < 32) + VSLL_VI(v0, v0, d2, VECTOR_UNMASKED); + else + VSLL_VX(v0, v0, x2, VECTOR_UNMASKED); VOR_VV(q0, d0, v0, VECTOR_UNMASKED); break; case 0x6B: @@ -1700,7 +1702,7 @@ uintptr_t dynarec64_660F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t i GETGX_vector(q0, 1, VECTOR_SEW16); if (MODREG) { u8 = (F8) & 7; - ed = xRAX + (nextop & 7) + (rex.b << 3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); } else { SMREAD(); addr = geted(dyn, addr, ninst, nextop, &ed, x2, x3, &fixedaddress, rex, NULL, 1, 1); diff --git a/src/dynarec/rv64/dynarec_rv64_6664.c b/src/dynarec/rv64/dynarec_rv64_6664.c index bdf2c279..a76846ce 100644 --- a/src/dynarec/rv64/dynarec_rv64_6664.c +++ b/src/dynarec/rv64/dynarec_rv64_6664.c @@ -23,7 +23,8 @@ uintptr_t dynarec64_6664(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int seg, int* ok, int* need_epilog) { - (void)ip; (void)need_epilog; + (void)ip; + (void)need_epilog; uint8_t opcode = F8; uint8_t nextop; @@ -36,17 +37,17 @@ uintptr_t dynarec64_6664(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int GETREX(); - switch(opcode) { + switch (opcode) { case 0x89: INST_NAME("MOV FS:Ew, Gw"); nextop = F8; - GETGD; // don't need GETGW here - if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); - if(rex.w) { + GETGD; // don't need GETGW here + if (MODREG) { + ed = TO_NAT((nextop & 7) + (rex.b << 3)); + if (rex.w) { ADDI(ed, gd, 0); } else { - if(ed!=gd) { + if (ed != gd) { LUI(x1, 0xffff0); AND(gd, gd, x1); ZEXTH(x1, ed); @@ -57,7 +58,7 @@ uintptr_t dynarec64_6664(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int grab_segdata(dyn, addr, ninst, x4, seg); addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, NULL, 1, 0); ADDz(x4, ed, x4); - if(rex.w) { + if (rex.w) { SD(gd, x4, fixedaddress); } else { SH(gd, x4, fixedaddress); @@ -68,26 +69,26 @@ uintptr_t dynarec64_6664(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int case 0x8B: INST_NAME("MOV Gd, FS:Ed"); - nextop=F8; + nextop = F8; GETGD; - if(MODREG) { // reg <= reg - ed = xRAX+(nextop&7)+(rex.b<<3); - if(rex.w) { + if (MODREG) { // reg <= reg + ed = TO_NAT((nextop & 7) + (rex.b << 3)); + if (rex.w) { MV(gd, ed); } else { - if(ed!=gd) { + if (ed != gd) { LUI(x1, 0xffff0); AND(gd, gd, x1); ZEXTH(x1, ed); OR(gd, gd, x1); } } - } else { // mem <= reg + } else { // mem <= reg grab_segdata(dyn, addr, ninst, x4, seg); SMREAD(); addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, NULL, 1, 0); ADDz(x4, ed, x4); - if(rex.w) { + if (rex.w) { LD(gd, x4, fixedaddress); } else { LHU(x1, x4, fixedaddress); diff --git a/src/dynarec/rv64/dynarec_rv64_66f0.c b/src/dynarec/rv64/dynarec_rv64_66f0.c index 64fad3c0..22263a42 100644 --- a/src/dynarec/rv64/dynarec_rv64_66f0.c +++ b/src/dynarec/rv64/dynarec_rv64_66f0.c @@ -25,7 +25,9 @@ uintptr_t dynarec64_66F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog) { - (void)ip; (void)rep; (void)need_epilog; + (void)ip; + (void)rep; + (void)need_epilog; uint8_t opcode = F8; uint8_t nextop; @@ -42,8 +44,8 @@ uintptr_t dynarec64_66F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int MAYUSE(wb2); MAYUSE(j64); - while((opcode==0xF2) || (opcode==0xF3)) { - rep = opcode-0xF1; + while ((opcode == 0xF2) || (opcode == 0xF3)) { + rep = opcode - 0xF1; opcode = F8; } @@ -54,17 +56,20 @@ uintptr_t dynarec64_66F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int case 0x83: nextop = F8; SMDMB(); - switch((nextop>>3)&7) { - case 0: //ADD - if(opcode==0x81) { + switch ((nextop >> 3) & 7) { + case 0: // ADD + if (opcode == 0x81) { INST_NAME("LOCK ADD Ew, Iw"); } else { INST_NAME("LOCK ADD Ew, Ib"); } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - if(MODREG) { - if(opcode==0x81) u64 = F16; else u64 = (uint16_t)(int16_t)F8S; - ed = xRAX+(nextop&7)+(rex.b<<3); + if (MODREG) { + if (opcode == 0x81) + u64 = F16; + else + u64 = (uint16_t)(int16_t)F8S; + ed = TO_NAT((nextop & 7) + (rex.b << 3)); MOV64x(x5, u64); ZEXTH(x6, ed); emit_add16(dyn, ninst, x6, x5, x3, x4, x2); @@ -72,8 +77,11 @@ uintptr_t dynarec64_66F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int SLLI(ed, ed, 16); OR(ed, ed, x6); } else { - addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, LOCK_LOCK, 0, (opcode==0x81)?2:1); - if(opcode==0x81) u64 = F16; else u64 = (uint16_t)(int16_t)F8S; + addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, LOCK_LOCK, 0, (opcode == 0x81) ? 2 : 1); + if (opcode == 0x81) + u64 = F16; + else + u64 = (uint16_t)(int16_t)F8S; MOV64x(x5, u64); ANDI(x3, wback, 0b10); diff --git a/src/dynarec/rv64/dynarec_rv64_66f20f.c b/src/dynarec/rv64/dynarec_rv64_66f20f.c index 822855c0..9a22da1f 100644 --- a/src/dynarec/rv64/dynarec_rv64_66f20f.c +++ b/src/dynarec/rv64/dynarec_rv64_66f20f.c @@ -51,24 +51,24 @@ uintptr_t dynarec64_66F20F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, in static const int8_t round_round[] = { RD_RNE, RD_RDN, RD_RUP, RD_RTZ }; switch (opcode) { - case 0x38: // these are some more SSSE4.2+ opcodes + case 0x38: // these are some more SSSE4.2+ opcodes opcode = F8; - switch(opcode) { - case 0xF1: // CRC32 Gd, Ew + switch (opcode) { + case 0xF1: // CRC32 Gd, Ew INST_NAME("CRC32 Gd, Ew"); nextop = F8; GETGD; GETEW(x1, 0); MOV32w(x2, 0x82f63b78); - for(int j=0; j<2; ++j) { - SRLI(x5, ed, 8*j); + for (int j = 0; j < 2; ++j) { + SRLI(x5, ed, 8 * j); ANDI(x6, x5, 0xFF); XOR(gd, gd, x6); for (int i = 0; i < 8; i++) { - SRLI((i&1)?gd:x4, (i&1)?x4:gd, 1); - ANDI(x6, (i&1)?x4:gd, 1); - BEQZ(x6, 4+4); - XOR((i&1)?gd:x4, (i&1)?gd:x4, x2); + SRLI((i & 1) ? gd : x4, (i & 1) ? x4 : gd, 1); + ANDI(x6, (i & 1) ? x4 : gd, 1); + BEQZ(x6, 4 + 4); + XOR((i & 1) ? gd : x4, (i & 1) ? gd : x4, x2); } } break; diff --git a/src/dynarec/rv64/dynarec_rv64_67.c b/src/dynarec/rv64/dynarec_rv64_67.c index ef3daed9..c3d6ef18 100644 --- a/src/dynarec/rv64/dynarec_rv64_67.c +++ b/src/dynarec/rv64/dynarec_rv64_67.c @@ -24,14 +24,15 @@ uintptr_t dynarec64_67(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog) { - (void)ip; (void)need_epilog; + (void)ip; + (void)need_epilog; uint8_t opcode = F8; uint8_t nextop; uint8_t gd, ed, wback, wb, wb1, wb2, gb, gb1, gb2, eb1, eb2; int64_t fixedaddress; int unscaled; - int8_t i8; + int8_t i8; uint8_t u8; int32_t i32; int64_t j64, i64; @@ -46,7 +47,7 @@ uintptr_t dynarec64_67(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni MAYUSE(lock); MAYUSE(cacheupd); - if(rex.is32bits) { + if (rex.is32bits) { // should do a different file DEFAULT; return addr; @@ -55,12 +56,12 @@ uintptr_t dynarec64_67(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni GETREX(); rep = 0; - while((opcode==0xF2) || (opcode==0xF3)) { - rep = opcode-0xF1; + while ((opcode == 0xF2) || (opcode == 0xF3)) { + rep = opcode - 0xF1; opcode = F8; } - switch(opcode) { + switch (opcode) { case 0x01: INST_NAME("ADD Ed, Gd"); @@ -133,19 +134,23 @@ uintptr_t dynarec64_67(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni break; case 0x0F: - opcode=F8; - switch(opcode) { + opcode = F8; + switch (opcode) { case 0x2E: // no special check... case 0x2F: switch (rep) { case 0: - if(opcode==0x2F) {INST_NAME("COMISS Gx, Ex");} else {INST_NAME("UCOMISS Gx, Ex");} + if (opcode == 0x2F) { + INST_NAME("COMISS Gx, Ex"); + } else { + INST_NAME("UCOMISS Gx, Ex"); + } SETFLAGS(X_ALL, SF_SET, NAT_FLAGS_NOFUSION); nextop = F8; GETGXSS(s0); - if(MODREG) { - v0 = sse_get_reg(dyn, ninst, x1, (nextop&7) + (rex.b<<3), 1); + if (MODREG) { + v0 = sse_get_reg(dyn, ninst, x1, (nextop & 7) + (rex.b << 3), 1); } else { v0 = fpu_get_scratch(dyn); SMREAD(); @@ -154,28 +159,28 @@ uintptr_t dynarec64_67(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni } CLEAR_FLAGS(); // if isnan(s0) || isnan(v0) - IFX(X_ZF | X_PF | X_CF) { + IFX (X_ZF | X_PF | X_CF) { FEQS(x3, s0, s0); FEQS(x2, v0, v0); AND(x2, x2, x3); BNE_MARK(x2, xZR); - ORI(xFlags, xFlags, (1<<F_ZF) | (1<<F_PF) | (1<<F_CF)); + ORI(xFlags, xFlags, (1 << F_ZF) | (1 << F_PF) | (1 << F_CF)); B_NEXT_nocond; } MARK; // else if isless(d0, v0) - IFX(X_CF) { + IFX (X_CF) { FLTS(x2, s0, v0); BEQ_MARK2(x2, xZR); - ORI(xFlags, xFlags, 1<<F_CF); + ORI(xFlags, xFlags, 1 << F_CF); B_NEXT_nocond; } MARK2; // else if d0 == v0 - IFX(X_ZF) { + IFX (X_ZF) { FEQS(x2, s0, v0); CBZ_NEXT(x2); - ORI(xFlags, xFlags, 1<<F_ZF); + ORI(xFlags, xFlags, 1 << F_ZF); } break; default: @@ -186,14 +191,14 @@ uintptr_t dynarec64_67(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni INST_NAME("MOVXZ Gd, Eb"); nextop = F8; GETGD; - if(MODREG) { + if (MODREG) { if (rex.rex) { - eb1 = xRAX + (nextop & 7) + (rex.b << 3); + eb1 = TO_NAT((nextop & 7) + (rex.b << 3)); eb2 = 0; } else { ed = (nextop & 7); - eb1 = xRAX + (ed & 3); // Ax, Cx, Dx or Bx - eb2 = (ed & 4) >> 2; // L or H + eb1 = TO_NAT(ed & 3); // Ax, Cx, Dx or Bx + eb2 = (ed & 4) >> 2; // L or H } if (eb2) { SRLI(gd, eb1, 8); @@ -211,8 +216,8 @@ uintptr_t dynarec64_67(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni INST_NAME("MOVZX Gd, Ew"); nextop = F8; GETGD; - if(MODREG) { - ed = xRAX + (nextop & 7) + (rex.b << 3); + if (MODREG) { + ed = TO_NAT((nextop & 7) + (rex.b << 3)); ZEXTH(gd, ed); } else { SMREAD(); @@ -441,7 +446,7 @@ uintptr_t dynarec64_67(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); u8 = F8; ANDI(x1, xRAX, 0xff); - if(u8) { + if (u8) { MOV32w(x2, u8); emit_cmp8(dyn, ninst, x1, x2, x3, x4, x5, x6); } else { @@ -452,7 +457,7 @@ uintptr_t dynarec64_67(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni INST_NAME("CMP EAX, Id"); SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); i64 = F32S; - if(i64) { + if (i64) { MOV64xw(x2, i64); emit_cmp32(dyn, ninst, rex, xRAX, x2, x3, x4, x5, x6); } else @@ -464,7 +469,7 @@ uintptr_t dynarec64_67(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni GETGD; if (rex.w) { if (MODREG) { // reg <= reg - ADDIW(gd, xRAX + (nextop & 7) + (rex.b << 3), 0); + ADDIW(gd, TO_NAT((nextop & 7) + (rex.b << 3)), 0); } else { // mem <= reg SMREAD(); addr = geted32(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, &lock, 1, 0); @@ -472,7 +477,7 @@ uintptr_t dynarec64_67(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni } } else { if (MODREG) { // reg <= reg - AND(gd, xRAX + (nextop & 7) + (rex.b << 3), xMASK); + AND(gd, TO_NAT((nextop & 7) + (rex.b << 3)), xMASK); } else { // mem <= reg SMREAD(); addr = geted32(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, &lock, 1, 0); @@ -488,7 +493,7 @@ uintptr_t dynarec64_67(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; GETGD; // don't need GETGW here if (MODREG) { - ed = xRAX + (nextop & 7) + (rex.b << 3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); if (ed != gd) { LUI(x1, 0xffff0); AND(ed, ed, x1); @@ -510,73 +515,129 @@ uintptr_t dynarec64_67(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0x81: case 0x83: nextop = F8; - switch((nextop>>3)&7) { - case 0: //ADD - if(opcode==0x81) {INST_NAME("ADD Ed, Id");} else {INST_NAME("ADD Ed, Ib");} + switch ((nextop >> 3) & 7) { + case 0: // ADD + if (opcode == 0x81) { + INST_NAME("ADD Ed, Id"); + } else { + INST_NAME("ADD Ed, Ib"); + } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETED32((opcode==0x81)?4:1); - if(opcode==0x81) i64 = F32S; else i64 = F8S; + GETED32((opcode == 0x81) ? 4 : 1); + if (opcode == 0x81) + i64 = F32S; + else + i64 = F8S; emit_add32c(dyn, ninst, rex, ed, i64, x3, x4, x5, x6); WBACK; break; - case 1: //OR - if(opcode==0x81) {INST_NAME("OR Ed, Id");} else {INST_NAME("OR Ed, Ib");} + case 1: // OR + if (opcode == 0x81) { + INST_NAME("OR Ed, Id"); + } else { + INST_NAME("OR Ed, Ib"); + } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETED32((opcode==0x81)?4:1); - if(opcode==0x81) i64 = F32S; else i64 = F8S; + GETED32((opcode == 0x81) ? 4 : 1); + if (opcode == 0x81) + i64 = F32S; + else + i64 = F8S; emit_or32c(dyn, ninst, rex, ed, i64, x3, x4); WBACK; break; - case 2: //ADC - if(opcode==0x81) {INST_NAME("ADC Ed, Id");} else {INST_NAME("ADC Ed, Ib");} + case 2: // ADC + if (opcode == 0x81) { + INST_NAME("ADC Ed, Id"); + } else { + INST_NAME("ADC Ed, Ib"); + } READFLAGS(X_CF); SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETED32((opcode==0x81)?4:1); - if(opcode==0x81) i64 = F32S; else i64 = F8S; + GETED32((opcode == 0x81) ? 4 : 1); + if (opcode == 0x81) + i64 = F32S; + else + i64 = F8S; MOV64xw(x5, i64); emit_adc32(dyn, ninst, rex, ed, x5, x3, x4, x5, x6); WBACK; break; - case 3: //SBB - if(opcode==0x81) {INST_NAME("SBB Ed, Id");} else {INST_NAME("SBB Ed, Ib");} + case 3: // SBB + if (opcode == 0x81) { + INST_NAME("SBB Ed, Id"); + } else { + INST_NAME("SBB Ed, Ib"); + } READFLAGS(X_CF); SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETED32((opcode==0x81)?4:1); - if(opcode==0x81) i64 = F32S; else i64 = F8S; + GETED32((opcode == 0x81) ? 4 : 1); + if (opcode == 0x81) + i64 = F32S; + else + i64 = F8S; MOV64xw(x5, i64); emit_sbb32(dyn, ninst, rex, ed, x5, x3, x4, x5); WBACK; break; - case 4: //AND - if(opcode==0x81) {INST_NAME("AND Ed, Id");} else {INST_NAME("AND Ed, Ib");} + case 4: // AND + if (opcode == 0x81) { + INST_NAME("AND Ed, Id"); + } else { + INST_NAME("AND Ed, Ib"); + } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETED32((opcode==0x81)?4:1); - if(opcode==0x81) i64 = F32S; else i64 = F8S; + GETED32((opcode == 0x81) ? 4 : 1); + if (opcode == 0x81) + i64 = F32S; + else + i64 = F8S; emit_and32c(dyn, ninst, rex, ed, i64, x3, x4); WBACK; break; - case 5: //SUB - if(opcode==0x81) {INST_NAME("SUB Ed, Id");} else {INST_NAME("SUB Ed, Ib");} + case 5: // SUB + if (opcode == 0x81) { + INST_NAME("SUB Ed, Id"); + } else { + INST_NAME("SUB Ed, Ib"); + } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETED32((opcode==0x81)?4:1); - if(opcode==0x81) i64 = F32S; else i64 = F8S; + GETED32((opcode == 0x81) ? 4 : 1); + if (opcode == 0x81) + i64 = F32S; + else + i64 = F8S; emit_sub32c(dyn, ninst, rex, ed, i64, x3, x4, x5, x6); WBACK; break; - case 6: //XOR - if(opcode==0x81) {INST_NAME("XOR Ed, Id");} else {INST_NAME("XOR Ed, Ib");} + case 6: // XOR + if (opcode == 0x81) { + INST_NAME("XOR Ed, Id"); + } else { + INST_NAME("XOR Ed, Ib"); + } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETED32((opcode==0x81)?4:1); - if(opcode==0x81) i64 = F32S; else i64 = F8S; + GETED32((opcode == 0x81) ? 4 : 1); + if (opcode == 0x81) + i64 = F32S; + else + i64 = F8S; emit_xor32c(dyn, ninst, rex, ed, i64, x3, x4); WBACK; break; - case 7: //CMP - if(opcode==0x81) {INST_NAME("CMP Ed, Id");} else {INST_NAME("CMP Ed, Ib");} + case 7: // CMP + if (opcode == 0x81) { + INST_NAME("CMP Ed, Id"); + } else { + INST_NAME("CMP Ed, Ib"); + } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - GETED32((opcode==0x81)?4:1); - if(opcode==0x81) i64 = F32S; else i64 = F8S; - if(i64) { + GETED32((opcode == 0x81) ? 4 : 1); + if (opcode == 0x81) + i64 = F32S; + else + i64 = F8S; + if (i64) { MOV64xw(x2, i64); emit_cmp32(dyn, ninst, rex, ed, x2, x3, x4, x5, x6); } else @@ -588,30 +649,30 @@ uintptr_t dynarec64_67(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0x88: INST_NAME("MOV Eb, Gb"); nextop = F8; - gd = ((nextop&0x38)>>3)+(rex.r<<3); - if(rex.rex) { + gd = ((nextop & 0x38) >> 3) + (rex.r << 3); + if (rex.rex) { gb2 = 0; - gb1 = xRAX + gd; + gb1 = TO_NAT(gd); } else { - gb2 = ((gd&4)>>2); - gb1 = xRAX+(gd&3); + gb2 = ((gd & 4) >> 2); + gb1 = TO_NAT(gd & 3); } gd = x4; - if(gb2) { + if (gb2) { SRLI(x4, gb1, 8); gb1 = x4; } - if(MODREG) { - ed = (nextop&7) + (rex.b<<3); - if(rex.rex) { - eb1 = xRAX+ed; + if (MODREG) { + ed = (nextop & 7) + (rex.b << 3); + if (rex.rex) { + eb1 = TO_NAT(ed); eb2 = 0; } else { - eb1 = xRAX+(ed&3); // Ax, Cx, Dx or Bx - eb2 = ((ed&4)>>2); // L or H + eb1 = TO_NAT(ed & 3); // Ax, Cx, Dx or Bx + eb2 = ((ed & 4) >> 2); // L or H } ANDI(gd, gb1, 0xff); - if(eb2) { + if (eb2) { MOV64x(x1, 0xffffffffffff00ffLL); AND(x1, eb1, x1); SLLI(gd, gd, 8); @@ -628,11 +689,11 @@ uintptr_t dynarec64_67(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni break; case 0x89: INST_NAME("MOV Ed, Gd"); - nextop=F8; + nextop = F8; GETGD; - if(MODREG) { // reg <= reg - MVxw(xRAX+(nextop&7)+(rex.b<<3), gd); - } else { // mem <= reg + if (MODREG) { // reg <= reg + MVxw(TO_NAT((nextop & 7) + (rex.b << 3)), gd); + } else { // mem <= reg addr = geted32(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, &lock, 1, 0); SDxw(gd, ed, fixedaddress); SMWRITELOCK(lock); @@ -640,10 +701,10 @@ uintptr_t dynarec64_67(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni break; case 0x8B: INST_NAME("MOV Gd, Ed"); - nextop=F8; + nextop = F8; GETGD; - if(MODREG) { - MVxw(gd, xRAX+(nextop&7)+(rex.b<<3)); + if (MODREG) { + MVxw(gd, TO_NAT((nextop & 7) + (rex.b << 3))); } else { addr = geted32(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, &lock, 1, 0); SMREADLOCK(lock); @@ -652,11 +713,11 @@ uintptr_t dynarec64_67(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni break; case 0x8D: INST_NAME("LEA Gd, Ed"); - nextop=F8; + nextop = F8; GETGD; - if(MODREG) { // reg <= reg? that's an invalid operation + if (MODREG) { // reg <= reg? that's an invalid operation DEFAULT; - } else { // mem <= reg + } else { // mem <= reg addr = geted32(dyn, addr, ninst, nextop, &ed, gd, x1, &fixedaddress, rex, NULL, 0, 0); AND(gd, ed, xMASK); } @@ -693,11 +754,11 @@ uintptr_t dynarec64_67(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0xC7: INST_NAME("MOV Ed, Id"); nextop = F8; - if(MODREG) { // reg <= i32 + if (MODREG) { // reg <= i32 i64 = F32S; - ed = xRAX + (nextop & 7) + (rex.b << 3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); MOV64xw(ed, i64); - } else { // mem <= i32 + } else { // mem <= i32 addr = geted32(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, &lock, 1, 4); i64 = F32S; MOV64x(x3, i64); @@ -706,32 +767,39 @@ uintptr_t dynarec64_67(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni } break; - #define GO(Z) \ - BARRIER(BARRIER_MAYBE); \ - JUMP(addr+i8, 1); \ - if(dyn->insts[ninst].x64.jmp_insts==-1 || \ - CHECK_CACHE()) { \ - /* out of the block */ \ - i32 = dyn->insts[ninst].epilog-(dyn->native_size); \ - if(Z) {BNE(x1, xZR, i32);} else {BEQ(x1, xZR, i32);}; \ - if(dyn->insts[ninst].x64.jmp_insts==-1) { \ - if(!(dyn->insts[ninst].x64.barrier&BARRIER_FLOAT)) \ - fpu_purgecache(dyn, ninst, 1, x1, x2, x3); \ - jump_to_next(dyn, addr+i8, 0, ninst, rex.is32bits); \ - } else { \ - CacheTransform(dyn, ninst, cacheupd, x1, x2, x3); \ - i32 = dyn->insts[dyn->insts[ninst].x64.jmp_insts].address-(dyn->native_size); \ - B(i32); \ - } \ - } else { \ - /* inside the block */ \ - i32 = dyn->insts[dyn->insts[ninst].x64.jmp_insts].address-(dyn->native_size); \ - if(Z) {BEQ(x1, xZR, i32);} else {BNE(x1, xZR, i32);}; \ - } +#define GO(Z) \ + BARRIER(BARRIER_MAYBE); \ + JUMP(addr + i8, 1); \ + if (dyn->insts[ninst].x64.jmp_insts == -1 || CHECK_CACHE()) { \ + /* out of the block */ \ + i32 = dyn->insts[ninst].epilog - (dyn->native_size); \ + if (Z) { \ + BNE(x1, xZR, i32); \ + } else { \ + BEQ(x1, xZR, i32); \ + }; \ + if (dyn->insts[ninst].x64.jmp_insts == -1) { \ + if (!(dyn->insts[ninst].x64.barrier & BARRIER_FLOAT)) \ + fpu_purgecache(dyn, ninst, 1, x1, x2, x3); \ + jump_to_next(dyn, addr + i8, 0, ninst, rex.is32bits); \ + } else { \ + CacheTransform(dyn, ninst, cacheupd, x1, x2, x3); \ + i32 = dyn->insts[dyn->insts[ninst].x64.jmp_insts].address - (dyn->native_size); \ + B(i32); \ + } \ + } else { \ + /* inside the block */ \ + i32 = dyn->insts[dyn->insts[ninst].x64.jmp_insts].address - (dyn->native_size); \ + if (Z) { \ + BEQ(x1, xZR, i32); \ + } else { \ + BNE(x1, xZR, i32); \ + }; \ + } case 0xE0: INST_NAME("LOOPNZ (32bits)"); READFLAGS(X_ZF); - + i8 = F8S; SUBI(xRCX, xRCX, 1); ANDI(x1, xFlags, 1 << F_ZF); @@ -762,7 +830,7 @@ uintptr_t dynarec64_67(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni AND(x1, xRCX, xMASK); GO(1); break; - #undef GO +#undef GO case 0xE8: return dynarec64_00(dyn, addr - 1, ip, ninst, rex, rep, ok, need_epilog); // addr-1, to "put back" opcode) diff --git a/src/dynarec/rv64/dynarec_rv64_67_32.c b/src/dynarec/rv64/dynarec_rv64_67_32.c index 8d799cee..3ca4c763 100644 --- a/src/dynarec/rv64/dynarec_rv64_67_32.c +++ b/src/dynarec/rv64/dynarec_rv64_67_32.c @@ -24,14 +24,15 @@ uintptr_t dynarec64_67_32(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog) { - (void)ip; (void)need_epilog; + (void)ip; + (void)need_epilog; uint8_t opcode = F8; uint8_t nextop; uint8_t gd, ed, wback, wb, wb1, wb2, gb1, gb2, eb1, eb2; int64_t fixedaddress; int unscaled; - int8_t i8; + int8_t i8; uint8_t u8; int32_t i32; int64_t j64, i64; @@ -39,19 +40,19 @@ uintptr_t dynarec64_67_32(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int int lock; int v0, v1, s0; - if(!rex.is32bits) { + if (!rex.is32bits) { // should do a different file DEFAULT; return addr; } rep = 0; - while((opcode==0xF2) || (opcode==0xF3)) { - rep = opcode-0xF1; + while ((opcode == 0xF2) || (opcode == 0xF3)) { + rep = opcode - 0xF1; opcode = F8; } - switch(opcode) { + switch (opcode) { default: DEFAULT; } diff --git a/src/dynarec/rv64/dynarec_rv64_d8.c b/src/dynarec/rv64/dynarec_rv64_d8.c index ee397753..1af3cfa0 100644 --- a/src/dynarec/rv64/dynarec_rv64_d8.c +++ b/src/dynarec/rv64/dynarec_rv64_d8.c @@ -25,7 +25,9 @@ uintptr_t dynarec64_D8(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog) { - (void)ip; (void)rep; (void)need_epilog; + (void)ip; + (void)rep; + (void)need_epilog; uint8_t nextop = F8; uint8_t ed; @@ -41,12 +43,12 @@ uintptr_t dynarec64_D8(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni MAYUSE(v2); MAYUSE(v1); - switch(nextop) { + switch (nextop) { case 0xC0 ... 0xC7: INST_NAME("FADD ST0, STx"); - v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop&7)); - v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7, X87_COMBINE(0, nextop&7)); - if(ST_IS_F(0)) { + v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop & 7)); + v2 = x87_get_st(dyn, ninst, x1, x2, nextop & 7, X87_COMBINE(0, nextop & 7)); + if (ST_IS_F(0)) { FADDS(v1, v1, v2); } else { FADDD(v1, v1, v2); @@ -74,9 +76,9 @@ uintptr_t dynarec64_D8(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni break; case 0xD8 ... 0xDF: INST_NAME("FCOMP ST0, STx"); - v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop&7)); + v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop & 7)); v2 = x87_get_st(dyn, ninst, x1, x2, nextop & 7, X87_COMBINE(0, nextop & 7)); - if(ST_IS_F(0)) { + if (ST_IS_F(0)) { FCOMS(v1, v2, x1, x2, x3, x4, x5); } else { FCOMD(v1, v2, x1, x2, x3, x4, x5); @@ -85,9 +87,9 @@ uintptr_t dynarec64_D8(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni break; case 0xE0 ... 0xE7: INST_NAME("FSUB ST0, STx"); - v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop&7)); - v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7, X87_COMBINE(0, nextop&7)); - if(ST_IS_F(0)) { + v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop & 7)); + v2 = x87_get_st(dyn, ninst, x1, x2, nextop & 7, X87_COMBINE(0, nextop & 7)); + if (ST_IS_F(0)) { FSUBS(v1, v1, v2); } else { FSUBD(v1, v1, v2); @@ -107,7 +109,7 @@ uintptr_t dynarec64_D8(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni INST_NAME("FDIV ST0, STx"); v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop & 7)); v2 = x87_get_st(dyn, ninst, x1, x2, nextop & 7, X87_COMBINE(0, nextop & 7)); - if(ST_IS_F(0)) { + if (ST_IS_F(0)) { FDIVS(v1, v1, v2); } else { FDIVD(v1, v1, v2); @@ -125,14 +127,14 @@ uintptr_t dynarec64_D8(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni break; default: - switch((nextop>>3)&7) { + switch ((nextop >> 3) & 7) { case 0: INST_NAME("FADD ST0, float[ED]"); v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_ST0); s0 = fpu_get_scratch(dyn); addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, NULL, 1, 0); FLW(s0, ed, fixedaddress); - if(ST_IS_F(0)) { + if (ST_IS_F(0)) { FADDS(v1, v1, s0); } else { FCVTDS(s0, s0); @@ -145,7 +147,7 @@ uintptr_t dynarec64_D8(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni s0 = fpu_get_scratch(dyn); addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, NULL, 1, 0); FLW(s0, ed, fixedaddress); - if(ST_IS_F(0)) { + if (ST_IS_F(0)) { FMULS(v1, v1, s0); } else { FCVTDS(s0, s0); @@ -185,7 +187,7 @@ uintptr_t dynarec64_D8(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni s0 = fpu_get_scratch(dyn); addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, NULL, 1, 0); FLW(s0, ed, fixedaddress); - if(ST_IS_F(0)) { + if (ST_IS_F(0)) { FSUBS(v1, v1, s0); } else { FCVTDS(s0, s0); @@ -211,7 +213,7 @@ uintptr_t dynarec64_D8(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni s0 = fpu_get_scratch(dyn); addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, NULL, 1, 0); FLW(s0, ed, fixedaddress); - if(ST_IS_F(0)) { + if (ST_IS_F(0)) { FDIVS(v1, v1, s0); } else { FCVTDS(s0, s0); diff --git a/src/dynarec/rv64/dynarec_rv64_d9.c b/src/dynarec/rv64/dynarec_rv64_d9.c index fc149371..44fe914d 100644 --- a/src/dynarec/rv64/dynarec_rv64_d9.c +++ b/src/dynarec/rv64/dynarec_rv64_d9.c @@ -25,7 +25,9 @@ uintptr_t dynarec64_D9(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog) { - (void)ip; (void)rep; (void)need_epilog; + (void)ip; + (void)rep; + (void)need_epilog; uint8_t nextop = F8; uint8_t ed; @@ -44,7 +46,7 @@ uintptr_t dynarec64_D9(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni MAYUSE(v2); MAYUSE(j64); - switch(nextop) { + switch (nextop) { case 0xC0: case 0xC1: case 0xC2: @@ -54,9 +56,9 @@ uintptr_t dynarec64_D9(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0xC6: case 0xC7: INST_NAME("FLD STx"); - X87_PUSH_OR_FAIL(v2, dyn, ninst, x1, X87_ST(nextop&7)); - v1 = x87_get_st(dyn, ninst, x1, x2, (nextop&7)+1, X87_COMBINE(0, (nextop&7)+1)); - if(ST_IS_F(0)) { + X87_PUSH_OR_FAIL(v2, dyn, ninst, x1, X87_ST(nextop & 7)); + v1 = x87_get_st(dyn, ninst, x1, x2, (nextop & 7) + 1, X87_COMBINE(0, (nextop & 7) + 1)); + if (ST_IS_F(0)) { FMVS(v2, v1); } else { FMVD(v2, v1); @@ -75,9 +77,9 @@ uintptr_t dynarec64_D9(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0xCF: INST_NAME("FXCH STx"); // swap the cache value, not the double value itself :p - x87_get_st(dyn, ninst, x1, x2, nextop&7, X87_ST(nextop&7)); + x87_get_st(dyn, ninst, x1, x2, nextop & 7, X87_ST(nextop & 7)); x87_get_st(dyn, ninst, x1, x2, 0, X87_ST0); - x87_swapreg(dyn, ninst, x1, x2, 0, nextop&7); + x87_swapreg(dyn, ninst, x1, x2, 0, nextop & 7); // should set C1 to 0 break; @@ -98,15 +100,15 @@ uintptr_t dynarec64_D9(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0xDF: INST_NAME("FSTPNCE ST0, STx"); // copy the cache value for st0 to stx - x87_get_st_empty(dyn, ninst, x1, x2, nextop&7, X87_ST(nextop&7)); + x87_get_st_empty(dyn, ninst, x1, x2, nextop & 7, X87_ST(nextop & 7)); x87_get_st(dyn, ninst, x1, x2, 0, X87_ST0); - x87_swapreg(dyn, ninst, x1, x2, 0, nextop&7); + x87_swapreg(dyn, ninst, x1, x2, 0, nextop & 7); X87_POP_OR_FAIL(dyn, ninst, x3); break; case 0xE0: INST_NAME("FCHS"); v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_ST0); - if(ST_IS_F(0)) { + if (ST_IS_F(0)) { FNEGS(v1, v1); } else { FNEGD(v1, v1); @@ -115,7 +117,7 @@ uintptr_t dynarec64_D9(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0xE1: INST_NAME("FABS"); v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_ST0); - if(ST_IS_F(0)) { + if (ST_IS_F(0)) { FABSS(v1, v1); } else { FABSD(v1, v1); @@ -128,27 +130,27 @@ uintptr_t dynarec64_D9(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni break; case 0xE5: INST_NAME("FXAM"); - #if 1 +#if 1 i1 = x87_get_current_cache(dyn, ninst, 0, EXT_CACHE_ST_D); // value put in x14 - if(i1==-1) { - if(fpu_is_st_freed(dyn, ninst, 0)) { + if (i1 == -1) { + if (fpu_is_st_freed(dyn, ninst, 0)) { MOV32w(x4, 0b100000100000000); B_MARK3_nocond; } else { // not in cache, so check Empty status and load it i2 = -dyn->e.x87stack; LWU(x3, xEmu, offsetof(x64emu_t, fpu_stack)); - if(i2) { + if (i2) { ADDI(x3, x3, i2); } MOV32w(x4, 0b100000100000000); // empty: C3,C2,C0 = 101 BGE_MARK3(xZR, x3); // x5 will be the actual top LWU(x5, xEmu, offsetof(x64emu_t, top)); - if(i2) { + if (i2) { ADDI(x5, x5, i2); - ANDI(x5, x5, 7); // (emu->top + i)&7 + ANDI(x5, x5, 7); // (emu->top + i)&7 } // load tag LHU(x3, xEmu, offsetof(x64emu_t, fpu_tags)); @@ -162,7 +164,12 @@ uintptr_t dynarec64_D9(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni ANDI(x2, x3, 0b11); BNEZ_MARK3(x2); // empty: C3,C2,C0 = 101 // load x2 with ST0 anyway, for sign extraction - if(rv64_zba) SH3ADD(x1, x5, xEmu); else {SLLI(x5, x5, 3); ADD(x1, xEmu, x5);} + if (rv64_zba) + SH3ADD(x1, x5, xEmu); + else { + SLLI(x5, x5, 3); + ADD(x1, xEmu, x5); + } LD(x2, x1, offsetof(x64emu_t, x87)); } } else { @@ -171,9 +178,9 @@ uintptr_t dynarec64_D9(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni FMVXD(x2, v1); } // get exponant in x1 - SRLI(x1, x2, 20+32); + SRLI(x1, x2, 20 + 32); ANDI(x1, x1, 0x7ff); // 0x7ff - BNEZ_MARK(x1); // not zero or denormal + BNEZ_MARK(x1); // not zero or denormal MOV64x(x3, 0x7fffffffffffffff); AND(x1, x2, x3); MOV32w(x4, 0b100000000000000); // Zero: C3,C2,C0 = 100 @@ -181,11 +188,11 @@ uintptr_t dynarec64_D9(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni MOV32w(x4, 0b100010000000000); // Denormal: C3,C2,C0 = 110 B_MARK3_nocond; MARK; - ADDI(x3, xZR, 0x7ff); // infinite/NaN? + ADDI(x3, xZR, 0x7ff); // infinite/NaN? MOV32w(x4, 0b000010000000000); // normal: C3,C2,C0 = 010 BNE_MARK3(x1, x3); SLLI(x3, x2, 12); - SRLI(x3, x3, 12); // and 0x000fffffffffffff + SRLI(x3, x3, 12); // and 0x000fffffffffffff MOV32w(x4, 0b000010100000000); // infinity: C3,C2,C0 = 011 BEQZ_MARK3(x3); MOV32w(x4, 0b000000100000000); // NaN: C3,C2,C0 = 001 @@ -193,25 +200,25 @@ uintptr_t dynarec64_D9(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni // Extract signa & Update SW SRLI(x1, x2, 63); SLLI(x1, x1, 9); - OR(x4, x4, x1); //C1 + OR(x4, x4, x1); // C1 LHU(x1, xEmu, offsetof(x64emu_t, sw)); MOV32w(x2, ~0b0100011100000000); AND(x1, x1, x2); OR(x4, x4, x1); SH(x4, xEmu, offsetof(x64emu_t, sw)); - #else +#else MESSAGE(LOG_DUMP, "Need Optimization\n"); x87_refresh(dyn, ninst, x1, x2, 0); s0 = x87_stackcount(dyn, ninst, x1); - CALL(fpu_fxam, -1); // should be possible inline, but is it worth it? + CALL(fpu_fxam, -1); // should be possible inline, but is it worth it? x87_unstackcount(dyn, ninst, x1, s0); - #endif +#endif break; case 0xE8: INST_NAME("FLD1"); X87_PUSH_OR_FAIL(v1, dyn, ninst, x1, EXT_CACHE_ST_F); - if(ST_IS_F(0)) { + if (ST_IS_F(0)) { MOV32w(x1, 0x3f800000); FMVWX(v1, x1); } else { @@ -247,7 +254,7 @@ uintptr_t dynarec64_D9(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0xEE: INST_NAME("FLDZ"); X87_PUSH_OR_FAIL(v1, dyn, ninst, x1, EXT_CACHE_ST_F); - if(ST_IS_F(0)) { + if (ST_IS_F(0)) { FMVWX(v1, xZR); } else { FMVDX(v1, xZR); @@ -280,7 +287,7 @@ uintptr_t dynarec64_D9(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni CALL(native_ftan, -1); x87_unstackcount(dyn, ninst, x3, s0); X87_PUSH_OR_FAIL(v1, dyn, ninst, x1, EXT_CACHE_ST_F); - if(ST_IS_F(0)) { + if (ST_IS_F(0)) { MOV32w(x1, 0x3f800000); FMVWX(v1, x1); } else { @@ -354,7 +361,7 @@ uintptr_t dynarec64_D9(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0xFA: INST_NAME("FSQRT"); v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_ST0); - if(ST_IS_F(0)) { + if (ST_IS_F(0)) { FSQRTS(v1, v1); } else { FSQRTD(v1, v1); @@ -376,7 +383,7 @@ uintptr_t dynarec64_D9(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni v2 = fpu_get_scratch(dyn); u8 = x87_setround(dyn, ninst, x1, x2); - if(ST_IS_F(0)) { + if (ST_IS_F(0)) { FEQS(x2, v0, v0); BNEZ_MARK(x2); B_NEXT_nocond; @@ -450,20 +457,20 @@ uintptr_t dynarec64_D9(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni break; default: - switch((nextop>>3)&7) { + switch ((nextop >> 3) & 7) { case 0: INST_NAME("FLD ST0, float[ED]"); - X87_PUSH_OR_FAIL(v1, dyn, ninst, x1, box64_dynarec_x87double?EXT_CACHE_ST_D:EXT_CACHE_ST_F); + X87_PUSH_OR_FAIL(v1, dyn, ninst, x1, box64_dynarec_x87double ? EXT_CACHE_ST_D : EXT_CACHE_ST_F); addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, NULL, 1, 0); FLW(v1, ed, fixedaddress); - if(!ST_IS_F(0)) { + if (!ST_IS_F(0)) { FCVTDS(v1, v1); } break; case 2: INST_NAME("FST float[ED], ST0"); v1 = x87_get_st(dyn, ninst, x1, x2, 0, EXT_CACHE_ST_F); - if(ST_IS_F(0)) + if (ST_IS_F(0)) s0 = v1; else { s0 = fpu_get_scratch(dyn); @@ -476,7 +483,7 @@ uintptr_t dynarec64_D9(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni INST_NAME("FSTP float[ED], ST0"); v1 = x87_get_st(dyn, ninst, x1, x2, 0, EXT_CACHE_ST_F); addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, NULL, 1, 0); - if(!ST_IS_F(0)) { + if (!ST_IS_F(0)) { FCVTSD(v1, v1); } FSW(v1, ed, fixedaddress); @@ -487,7 +494,7 @@ uintptr_t dynarec64_D9(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni MESSAGE(LOG_DUMP, "Need Optimization\n"); fpu_purgecache(dyn, ninst, 0, x1, x2, x3); // maybe only x87, not SSE? addr = geted(dyn, addr, ninst, nextop, &ed, x1, x2, &fixedaddress, rex, NULL, 0, 0); - if(ed!=x1) { + if (ed != x1) { MV(x1, ed); } MOV32w(x2, 0); @@ -496,14 +503,14 @@ uintptr_t dynarec64_D9(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 5: INST_NAME("FLDCW Ew"); GETEW(x1, 0); - SH(x1, xEmu, offsetof(x64emu_t, cw)); // hopefully cw is not too far for an imm8 + SH(x1, xEmu, offsetof(x64emu_t, cw)); // hopefully cw is not too far for an imm8 break; case 6: INST_NAME("FNSTENV Ed"); MESSAGE(LOG_DUMP, "Need Optimization\n"); fpu_purgecache(dyn, ninst, 0, x1, x2, x3); // maybe only x87, not SSE? addr = geted(dyn, addr, ninst, nextop, &ed, x1, x2, &fixedaddress, rex, NULL, 0, 0); - if(ed!=x1) { + if (ed != x1) { MV(x1, ed); } MOV32w(x2, 0); diff --git a/src/dynarec/rv64/dynarec_rv64_db.c b/src/dynarec/rv64/dynarec_rv64_db.c index ed14eb40..70c77965 100644 --- a/src/dynarec/rv64/dynarec_rv64_db.c +++ b/src/dynarec/rv64/dynarec_rv64_db.c @@ -25,7 +25,9 @@ uintptr_t dynarec64_DB(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog) { - (void)ip; (void)rep; (void)need_epilog; + (void)ip; + (void)rep; + (void)need_epilog; uint8_t nextop = F8; uint8_t ed; @@ -42,7 +44,7 @@ uintptr_t dynarec64_DB(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni MAYUSE(v1); MAYUSE(j64); - switch(nextop) { + switch (nextop) { case 0xC0: case 0xC1: case 0xC2: @@ -53,14 +55,14 @@ uintptr_t dynarec64_DB(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0xC7: INST_NAME("FCMOVNB ST0, STx"); READFLAGS(X_CF); - v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop&7)); - v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7, X87_COMBINE(0, nextop&7)); - ANDI(x1, xFlags, 1<<F_CF); + v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop & 7)); + v2 = x87_get_st(dyn, ninst, x1, x2, nextop & 7, X87_COMBINE(0, nextop & 7)); + ANDI(x1, xFlags, 1 << F_CF); CBNZ_NEXT(x1); - if(ST_IS_F(0)) { + if (ST_IS_F(0)) { FMVS(v1, v2); } else { - FMVD(v1, v2); // F_CF==0 + FMVD(v1, v2); // F_CF==0 } break; case 0xC8: @@ -73,14 +75,14 @@ uintptr_t dynarec64_DB(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0xCF: INST_NAME("FCMOVNE ST0, STx"); READFLAGS(X_ZF); - v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop&7)); - v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7, X87_COMBINE(0, nextop&7)); - ANDI(x1, xFlags, 1<<F_ZF); + v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop & 7)); + v2 = x87_get_st(dyn, ninst, x1, x2, nextop & 7, X87_COMBINE(0, nextop & 7)); + ANDI(x1, xFlags, 1 << F_ZF); CBNZ_NEXT(x1); - if(ST_IS_F(0)) { + if (ST_IS_F(0)) { FMVS(v1, v2); } else { - FMVD(v1, v2); // F_ZF==0 + FMVD(v1, v2); // F_ZF==0 } break; case 0xD0: @@ -92,15 +94,15 @@ uintptr_t dynarec64_DB(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0xD6: case 0xD7: INST_NAME("FCMOVNBE ST0, STx"); - READFLAGS(X_CF|X_ZF); - v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop&7)); - v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7, X87_COMBINE(0, nextop&7)); - ANDI(x1, xFlags, (1<<F_CF)|(1<<F_ZF)); + READFLAGS(X_CF | X_ZF); + v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop & 7)); + v2 = x87_get_st(dyn, ninst, x1, x2, nextop & 7, X87_COMBINE(0, nextop & 7)); + ANDI(x1, xFlags, (1 << F_CF) | (1 << F_ZF)); CBNZ_NEXT(x1); - if(ST_IS_F(0)) { + if (ST_IS_F(0)) { FMVS(v1, v2); } else { - FMVD(v1, v2); // F_CF==0 & F_ZF==0 + FMVD(v1, v2); // F_CF==0 & F_ZF==0 } break; case 0xD8: @@ -113,14 +115,14 @@ uintptr_t dynarec64_DB(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0xDF: INST_NAME("FCMOVNU ST0, STx"); READFLAGS(X_PF); - v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop&7)); - v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7, X87_COMBINE(0, nextop&7)); - ANDI(x1, xFlags, 1<<F_PF); + v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop & 7)); + v2 = x87_get_st(dyn, ninst, x1, x2, nextop & 7, X87_COMBINE(0, nextop & 7)); + ANDI(x1, xFlags, 1 << F_PF); CBNZ_NEXT(x1); - if(ST_IS_F(0)) { + if (ST_IS_F(0)) { FMVS(v1, v2); } else { - FMVD(v1, v2); // F_PF==0 + FMVD(v1, v2); // F_PF==0 } break; case 0xE1: @@ -130,7 +132,7 @@ uintptr_t dynarec64_DB(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni INST_NAME("FNCLEX"); LH(x2, xEmu, offsetof(x64emu_t, sw)); ANDI(x2, x2, ~(0xff)); // IE .. PE, SF, ES - MOV32w(x1, ~(1<<15)); // B + MOV32w(x1, ~(1 << 15)); // B AND(x2, x2, x1); SH(x2, xEmu, offsetof(x64emu_t, sw)); break; @@ -150,8 +152,8 @@ uintptr_t dynarec64_DB(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0xEF: INST_NAME("FUCOMI ST0, STx"); SETFLAGS(X_ALL, SF_SET, NAT_FLAGS_NOFUSION); - v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop&7)); - v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7, X87_COMBINE(0, nextop&7)); + v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop & 7)); + v2 = x87_get_st(dyn, ninst, x1, x2, nextop & 7, X87_COMBINE(0, nextop & 7)); if (ST_IS_F(0)) { FCOMIS(v1, v2, x1, x2, x3, x4, x5); } else { @@ -187,13 +189,13 @@ uintptr_t dynarec64_DB(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni break; default: - switch((nextop>>3)&7) { + switch ((nextop >> 3) & 7) { case 0: INST_NAME("FILD ST0, Ed"); X87_PUSH_OR_FAIL(v1, dyn, ninst, x1, EXT_CACHE_ST_D); addr = geted(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, NULL, 1, 0); LW(x1, ed, fixedaddress); - FCVTDW(v1, x1, RD_RNE); // i32 -> double + FCVTDW(v1, x1, RD_RNE); // i32 -> double break; case 1: INST_NAME("FISTTP Ed, ST0"); @@ -223,14 +225,14 @@ uintptr_t dynarec64_DB(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni u8 = x87_setround(dyn, ninst, x1, x2); addr = geted(dyn, addr, ninst, nextop, &wback, x2, x3, &fixedaddress, rex, NULL, 1, 0); v2 = fpu_get_scratch(dyn); - if(!box64_dynarec_fastround) { + if (!box64_dynarec_fastround) { FSFLAGSI(0); // reset all bits } FCVTWD(x4, v1, RD_DYN); x87_restoreround(dyn, ninst, u8); - if(!box64_dynarec_fastround) { - FRFLAGS(x5); // get back FPSR to check the IOC bit - ANDI(x5, x5, 1<<FR_NV); + if (!box64_dynarec_fastround) { + FRFLAGS(x5); // get back FPSR to check the IOC bit + ANDI(x5, x5, 1 << FR_NV); BEQ_MARK2(x5, xZR); MOV32w(x4, 0x80000000); } @@ -241,28 +243,28 @@ uintptr_t dynarec64_DB(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 5: INST_NAME("FLD tbyte"); addr = geted(dyn, addr, ninst, nextop, &ed, x1, x2, &fixedaddress, rex, NULL, 8, 0); - if((PK(0)==0xDB && ((PK(1)>>3)&7)==7) || (PK(0)>=0x40 && PK(0)<=0x4f && PK(1)==0xDB && ((PK(2)>>3)&7)==7)) { + if ((PK(0) == 0xDB && ((PK(1) >> 3) & 7) == 7) || (PK(0) >= 0x40 && PK(0) <= 0x4f && PK(1) == 0xDB && ((PK(2) >> 3) & 7) == 7)) { // the FLD is immediatly followed by an FSTP - LD(x5, ed, fixedaddress+0); - LH(x6, ed, fixedaddress+8); + LD(x5, ed, fixedaddress + 0); + LH(x6, ed, fixedaddress + 8); // no persistant scratch register, so unrool both instruction here... MESSAGE(LOG_DUMP, "\tHack: FSTP tbyte\n"); - nextop = F8; // 0xDB or rex - if(nextop>=0x40 && nextop<=0x4f) { + nextop = F8; // 0xDB or rex + if (nextop >= 0x40 && nextop <= 0x4f) { rex.rex = nextop; - nextop = F8; //0xDB + nextop = F8; // 0xDB } else rex.rex = 0; - nextop = F8; //modrm + nextop = F8; // modrm addr = geted(dyn, addr, ninst, nextop, &ed, x1, x2, &fixedaddress, rex, NULL, 8, 0); - SD(x5, ed, fixedaddress+0); - SH(x6, ed, fixedaddress+8); + SD(x5, ed, fixedaddress + 0); + SH(x6, ed, fixedaddress + 8); } else { - if(box64_x87_no80bits) { + if (box64_x87_no80bits) { X87_PUSH_OR_FAIL(v1, dyn, ninst, x1, EXT_CACHE_ST_D); FLD(v1, ed, fixedaddress); } else { - if(ed!=x1) { + if (ed != x1) { ADDI(x1, ed, fixedaddress); } X87_PUSH_EMPTY_OR_FAIL(dyn, ninst, x3); @@ -272,14 +274,14 @@ uintptr_t dynarec64_DB(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni break; case 7: INST_NAME("FSTP tbyte"); - if(box64_x87_no80bits) { + if (box64_x87_no80bits) { v1 = x87_get_st(dyn, ninst, x1, x2, 0, EXT_CACHE_ST_D); addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, NULL, 1, 0); FSD(v1, wback, fixedaddress); } else { x87_forget(dyn, ninst, x1, x3, 0); addr = geted(dyn, addr, ninst, nextop, &ed, x1, x2, &fixedaddress, rex, NULL, 0, 0); - if(ed!=x1) { + if (ed != x1) { MV(x1, ed); } s0 = x87_stackcount(dyn, ninst, x3); diff --git a/src/dynarec/rv64/dynarec_rv64_dc.c b/src/dynarec/rv64/dynarec_rv64_dc.c index 4255bca0..955438ff 100644 --- a/src/dynarec/rv64/dynarec_rv64_dc.c +++ b/src/dynarec/rv64/dynarec_rv64_dc.c @@ -25,7 +25,9 @@ uintptr_t dynarec64_DC(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog) { - (void)ip; (void)rep; (void)need_epilog; + (void)ip; + (void)rep; + (void)need_epilog; uint8_t nextop = F8; uint8_t wback; @@ -36,7 +38,7 @@ uintptr_t dynarec64_DC(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni MAYUSE(v2); MAYUSE(v1); - switch(nextop) { + switch (nextop) { case 0xC0 ... 0xC7: INST_NAME("FADD STx, ST0"); v2 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop & 7)); @@ -58,7 +60,7 @@ uintptr_t dynarec64_DC(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni } break; case 0xD0 ... 0xD7: - INST_NAME("FCOM ST0, STx"); //yep + INST_NAME("FCOM ST0, STx"); // yep v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop & 7)); v2 = x87_get_st(dyn, ninst, x1, x2, nextop & 7, X87_COMBINE(0, nextop & 7)); if (ST_IS_F(0)) { @@ -119,7 +121,7 @@ uintptr_t dynarec64_DC(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni } break; default: - switch((nextop>>3)&7) { + switch ((nextop >> 3) & 7) { case 0: INST_NAME("FADD ST0, double[ED]"); v1 = x87_get_st(dyn, ninst, x1, x2, 0, EXT_CACHE_ST_D); diff --git a/src/dynarec/rv64/dynarec_rv64_dd.c b/src/dynarec/rv64/dynarec_rv64_dd.c index 1fa37951..fccc97d5 100644 --- a/src/dynarec/rv64/dynarec_rv64_dd.c +++ b/src/dynarec/rv64/dynarec_rv64_dd.c @@ -25,7 +25,9 @@ uintptr_t dynarec64_DD(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog) { - (void)ip; (void)rep; (void)need_epilog; + (void)ip; + (void)rep; + (void)need_epilog; uint8_t nextop = F8; uint8_t ed, wback; @@ -40,7 +42,7 @@ uintptr_t dynarec64_DD(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni MAYUSE(v1); MAYUSE(j64); - switch(nextop) { + switch (nextop) { case 0xC0: case 0xC1: case 0xC2: @@ -52,7 +54,7 @@ uintptr_t dynarec64_DD(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni INST_NAME("FFREE STx"); MESSAGE(LOG_DUMP, "Need Optimization\n"); x87_purgecache(dyn, ninst, 0, x1, x2, x3); - MOV32w(x1, nextop&7); + MOV32w(x1, nextop & 7); CALL(fpu_do_free, -1); break; case 0xD0: @@ -85,9 +87,9 @@ uintptr_t dynarec64_DD(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0xDF: INST_NAME("FSTP ST0, STx"); // copy the cache value for st0 to stx - x87_get_st_empty(dyn, ninst, x1, x2, nextop&7, X87_ST(nextop&7)); + x87_get_st_empty(dyn, ninst, x1, x2, nextop & 7, X87_ST(nextop & 7)); x87_get_st(dyn, ninst, x1, x2, 0, X87_ST0); - x87_swapreg(dyn, ninst, x1, x2, 0, nextop&7); + x87_swapreg(dyn, ninst, x1, x2, 0, nextop & 7); X87_POP_OR_FAIL(dyn, ninst, x3); break; case 0xE0: @@ -153,7 +155,7 @@ uintptr_t dynarec64_DD(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni break; default: - switch((nextop>>3)&7) { + switch ((nextop >> 3) & 7) { case 0: INST_NAME("FLD double"); X87_PUSH_OR_FAIL(v1, dyn, ninst, x1, EXT_CACHE_ST_D); @@ -209,16 +211,16 @@ uintptr_t dynarec64_DD(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni addr = geted(dyn, addr, ninst, nextop, &ed, x4, x6, &fixedaddress, rex, NULL, 0, 0); LWU(x2, xEmu, offsetof(x64emu_t, top)); LHU(x3, xEmu, offsetof(x64emu_t, sw)); - if(dyn->e.x87stack) { + if (dyn->e.x87stack) { // update top ADDI(x2, x2, -dyn->e.x87stack); ANDI(x2, x2, 7); } MOV32w(x5, ~0x3800); - AND(x3, x3, x5); // mask out TOP - SLLI(x2, x2, 11); // shift TOP to bit 11 - OR(x3, x3, x2); // inject TOP - SH(x3, ed, fixedaddress); // store whole sw flags + AND(x3, x3, x5); // mask out TOP + SLLI(x2, x2, 11); // shift TOP to bit 11 + OR(x3, x3, x2); // inject TOP + SH(x3, ed, fixedaddress); // store whole sw flags break; default: DEFAULT; diff --git a/src/dynarec/rv64/dynarec_rv64_de.c b/src/dynarec/rv64/dynarec_rv64_de.c index 370ef7e0..5613a3eb 100644 --- a/src/dynarec/rv64/dynarec_rv64_de.c +++ b/src/dynarec/rv64/dynarec_rv64_de.c @@ -25,7 +25,9 @@ uintptr_t dynarec64_DE(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog) { - (void)ip; (void)rep; (void)need_epilog; + (void)ip; + (void)rep; + (void)need_epilog; uint8_t nextop = F8; uint8_t wback; @@ -35,7 +37,7 @@ uintptr_t dynarec64_DE(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni MAYUSE(v2); MAYUSE(v1); - switch(nextop) { + switch (nextop) { case 0xC0: case 0xC1: case 0xC2: @@ -45,9 +47,9 @@ uintptr_t dynarec64_DE(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0xC6: case 0xC7: INST_NAME("FADDP STx, ST0"); - v2 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop&7)); - v1 = x87_get_st(dyn, ninst, x1, x2, nextop&7, X87_COMBINE(0, nextop&7)); - if(ST_IS_F(0)) { + v2 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop & 7)); + v1 = x87_get_st(dyn, ninst, x1, x2, nextop & 7, X87_COMBINE(0, nextop & 7)); + if (ST_IS_F(0)) { FADDS(v1, v1, v2); } else { FADDD(v1, v1, v2); @@ -63,9 +65,9 @@ uintptr_t dynarec64_DE(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0xCE: case 0xCF: INST_NAME("FMULP STx, ST0"); - v2 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop&7)); - v1 = x87_get_st(dyn, ninst, x1, x2, nextop&7, X87_COMBINE(0, nextop&7)); - if(ST_IS_F(0)) { + v2 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop & 7)); + v1 = x87_get_st(dyn, ninst, x1, x2, nextop & 7, X87_COMBINE(0, nextop & 7)); + if (ST_IS_F(0)) { FMULS(v1, v1, v2); } else { FMULD(v1, v1, v2); @@ -111,9 +113,9 @@ uintptr_t dynarec64_DE(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0xE6: case 0xE7: INST_NAME("FSUBRP STx, ST0"); - v2 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop&7)); - v1 = x87_get_st(dyn, ninst, x1, x2, nextop&7, X87_COMBINE(0, nextop&7)); - if(ST_IS_F(0)) { + v2 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop & 7)); + v1 = x87_get_st(dyn, ninst, x1, x2, nextop & 7, X87_COMBINE(0, nextop & 7)); + if (ST_IS_F(0)) { FSUBS(v1, v2, v1); } else { FSUBD(v1, v2, v1); @@ -129,9 +131,9 @@ uintptr_t dynarec64_DE(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0xEE: case 0xEF: INST_NAME("FSUBP STx, ST0"); - v2 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop&7)); - v1 = x87_get_st(dyn, ninst, x1, x2, nextop&7, X87_COMBINE(0, nextop&7)); - if(ST_IS_F(0)) { + v2 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop & 7)); + v1 = x87_get_st(dyn, ninst, x1, x2, nextop & 7, X87_COMBINE(0, nextop & 7)); + if (ST_IS_F(0)) { FSUBS(v1, v1, v2); } else { FSUBD(v1, v1, v2); @@ -147,9 +149,9 @@ uintptr_t dynarec64_DE(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0xF6: case 0xF7: INST_NAME("FDIVRP STx, ST0"); - v2 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop&7)); - v1 = x87_get_st(dyn, ninst, x1, x2, nextop&7, X87_COMBINE(0, nextop&7)); - if(ST_IS_F(0)) { + v2 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop & 7)); + v1 = x87_get_st(dyn, ninst, x1, x2, nextop & 7, X87_COMBINE(0, nextop & 7)); + if (ST_IS_F(0)) { FDIVS(v1, v2, v1); } else { FDIVD(v1, v2, v1); @@ -165,9 +167,9 @@ uintptr_t dynarec64_DE(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0xFE: case 0xFF: INST_NAME("FDIVP STx, ST0"); - v2 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop&7)); - v1 = x87_get_st(dyn, ninst, x1, x2, nextop&7, X87_COMBINE(0, nextop&7)); - if(ST_IS_F(0)) { + v2 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop & 7)); + v1 = x87_get_st(dyn, ninst, x1, x2, nextop & 7, X87_COMBINE(0, nextop & 7)); + if (ST_IS_F(0)) { FDIVS(v1, v1, v2); } else { FDIVD(v1, v1, v2); @@ -184,7 +186,7 @@ uintptr_t dynarec64_DE(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni DEFAULT; break; default: - switch((nextop>>3)&7) { + switch ((nextop >> 3) & 7) { default: DEFAULT; } diff --git a/src/dynarec/rv64/dynarec_rv64_df.c b/src/dynarec/rv64/dynarec_rv64_df.c index f1b19cf4..7a775c3c 100644 --- a/src/dynarec/rv64/dynarec_rv64_df.c +++ b/src/dynarec/rv64/dynarec_rv64_df.c @@ -24,7 +24,9 @@ uintptr_t dynarec64_DF(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog) { - (void)ip; (void)rep; (void)need_epilog; + (void)ip; + (void)rep; + (void)need_epilog; uint8_t nextop = F8; uint8_t ed, wback, u8; @@ -38,7 +40,7 @@ uintptr_t dynarec64_DF(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni MAYUSE(v1); MAYUSE(j64); - switch(nextop) { + switch (nextop) { case 0xC0 ... 0xC7: INST_NAME("FFREEP STx"); // not handling Tag... @@ -70,25 +72,25 @@ uintptr_t dynarec64_DF(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni } SETFLAGS(X_ALL, SF_SET, NAT_FLAGS_NOFUSION); SET_DFNONE(); - v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop&7)); - v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7, X87_COMBINE(0, nextop&7)); + v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop & 7)); + v2 = x87_get_st(dyn, ninst, x1, x2, nextop & 7, X87_COMBINE(0, nextop & 7)); CLEAR_FLAGS(); - IFX(X_ZF | X_PF | X_CF) { - if(ST_IS_F(0)) { + IFX (X_ZF | X_PF | X_CF) { + if (ST_IS_F(0)) { FEQS(x5, v1, v1); FEQS(x4, v2, v2); AND(x5, x5, x4); BEQZ(x5, 24); // undefined/NaN FEQS(x5, v1, v2); - BNEZ(x5, 24); // equal - FLTS(x3, v1, v2); // x3 = (v1<v2)?1:0 + BNEZ(x5, 24); // equal + FLTS(x3, v1, v2); // x3 = (v1<v2)?1:0 OR(xFlags, xFlags, x3); // CF is the least significant bit - J(16); // end + J(16); // end // NaN - ORI(xFlags, xFlags, (1<<F_ZF) | (1<<F_PF) | (1<<F_CF)); + ORI(xFlags, xFlags, (1 << F_ZF) | (1 << F_PF) | (1 << F_CF)); J(8); // end // equal - ORI(xFlags, xFlags, 1<<F_ZF); + ORI(xFlags, xFlags, 1 << F_ZF); // end } else { FEQD(x5, v1, v1); @@ -96,15 +98,15 @@ uintptr_t dynarec64_DF(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni AND(x5, x5, x4); BEQZ(x5, 24); // undefined/NaN FEQD(x5, v1, v2); - BNEZ(x5, 24); // equal - FLTD(x3, v1, v2); // x3 = (v1<v2)?1:0 + BNEZ(x5, 24); // equal + FLTD(x3, v1, v2); // x3 = (v1<v2)?1:0 OR(xFlags, xFlags, x3); // CF is the least significant bit - J(16); // end + J(16); // end // NaN - ORI(xFlags, xFlags, (1<<F_ZF) | (1<<F_PF) | (1<<F_CF)); + ORI(xFlags, xFlags, (1 << F_ZF) | (1 << F_PF) | (1 << F_CF)); J(8); // end // equal - ORI(xFlags, xFlags, 1<<F_ZF); + ORI(xFlags, xFlags, 1 << F_ZF); // end } } @@ -117,13 +119,13 @@ uintptr_t dynarec64_DF(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni break; default: - switch((nextop>>3)&7) { + switch ((nextop >> 3) & 7) { case 0: INST_NAME("FILD ST0, Ew"); X87_PUSH_OR_FAIL(v1, dyn, ninst, x1, EXT_CACHE_ST_F); addr = geted(dyn, addr, ninst, nextop, &wback, x3, x4, &fixedaddress, rex, NULL, 1, 0); LH(x1, wback, fixedaddress); - if(ST_IS_F(0)) { + if (ST_IS_F(0)) { FCVTSL(v1, x1, RD_RNE); } else { FCVTDL(v1, x1, RD_RNE); @@ -133,7 +135,7 @@ uintptr_t dynarec64_DF(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni INST_NAME("FISTTP Ew, ST0"); v1 = x87_get_st(dyn, ninst, x1, x2, 0, EXT_CACHE_ST_F); addr = geted(dyn, addr, ninst, nextop, &wback, x3, x4, &fixedaddress, rex, NULL, 1, 0); - if(!box64_dynarec_fastround) { + if (!box64_dynarec_fastround) { FSFLAGSI(0); // reset all bits } if (ST_IS_F(0)) { @@ -141,9 +143,9 @@ uintptr_t dynarec64_DF(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni } else { FCVTWD(x4, v1, RD_RTZ); } - if(!box64_dynarec_fastround) { - FRFLAGS(x5); // get back FPSR to check the IOC bit - ANDI(x5, x5, 1<<FR_NV); + if (!box64_dynarec_fastround) { + FRFLAGS(x5); // get back FPSR to check the IOC bit + ANDI(x5, x5, 1 << FR_NV); BNEZ_MARK(x5); SLLIW(x5, x4, 16); SRAIW(x5, x5, 16); @@ -160,7 +162,7 @@ uintptr_t dynarec64_DF(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni v1 = x87_get_st(dyn, ninst, x1, x2, 0, EXT_CACHE_ST_F); u8 = x87_setround(dyn, ninst, x1, x2); addr = geted(dyn, addr, ninst, nextop, &wback, x2, x3, &fixedaddress, rex, NULL, 1, 0); - if(!box64_dynarec_fastround) { + if (!box64_dynarec_fastround) { FSFLAGSI(0); // reset all bits } if (ST_IS_F(0)) { @@ -169,9 +171,9 @@ uintptr_t dynarec64_DF(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni FCVTWD(x4, v1, RD_DYN); } x87_restoreround(dyn, ninst, u8); - if(!box64_dynarec_fastround) { - FRFLAGS(x5); // get back FPSR to check the IOC bit - ANDI(x5, x5, 1<<FR_NV); + if (!box64_dynarec_fastround) { + FRFLAGS(x5); // get back FPSR to check the IOC bit + ANDI(x5, x5, 1 << FR_NV); BNEZ_MARK(x5); SLLIW(x5, x4, 16); SRAIW(x5, x5, 16); @@ -187,7 +189,7 @@ uintptr_t dynarec64_DF(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni v1 = x87_get_st(dyn, ninst, x1, x2, 0, EXT_CACHE_ST_F); u8 = x87_setround(dyn, ninst, x1, x2); addr = geted(dyn, addr, ninst, nextop, &wback, x2, x3, &fixedaddress, rex, NULL, 1, 0); - if(!box64_dynarec_fastround) { + if (!box64_dynarec_fastround) { FSFLAGSI(0); // reset all bits } if (ST_IS_F(0)) { @@ -196,9 +198,9 @@ uintptr_t dynarec64_DF(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni FCVTWD(x4, v1, RD_DYN); } x87_restoreround(dyn, ninst, u8); - if(!box64_dynarec_fastround) { - FRFLAGS(x5); // get back FPSR to check the IOC bit - ANDI(x5, x5, 1<<FR_NV); + if (!box64_dynarec_fastround) { + FRFLAGS(x5); // get back FPSR to check the IOC bit + ANDI(x5, x5, 1 << FR_NV); BNEZ_MARK(x5); SLLIW(x5, x4, 16); SRAIW(x5, x5, 16); @@ -214,7 +216,7 @@ uintptr_t dynarec64_DF(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni INST_NAME("FBLD ST0, tbytes"); X87_PUSH_EMPTY_OR_FAIL(dyn, ninst, x1); addr = geted(dyn, addr, ninst, nextop, &ed, x1, x2, &fixedaddress, rex, NULL, 0, 0); - if(ed != x1) { MV(x1, ed); } + if (ed != x1) { MV(x1, ed); } s0 = x87_stackcount(dyn, ninst, x3); CALL(fpu_fbld, -1); x87_unstackcount(dyn, ninst, x3, s0); diff --git a/src/dynarec/rv64/dynarec_rv64_emit_logic.c b/src/dynarec/rv64/dynarec_rv64_emit_logic.c index 5cbd6eca..76a4f9be 100644 --- a/src/dynarec/rv64/dynarec_rv64_emit_logic.c +++ b/src/dynarec/rv64/dynarec_rv64_emit_logic.c @@ -25,7 +25,7 @@ void emit_xor8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4) { CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { SET_DF(s4, d_xor8); } else IFXORNAT (X_ALL) { SET_DFNONE(); @@ -35,17 +35,17 @@ void emit_xor8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4) if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_SF) { + IFX (X_SF) { SRLI(s3, s1, 7); SET_FLAGS_NEZ(s3, F_SF, s4); } - IFX(X_PEND) { + IFX (X_PEND) { SB(s1, xEmu, offsetof(x64emu_t, res)); } IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s4); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -54,7 +54,7 @@ void emit_xor8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4) void emit_xor8c(dynarec_rv64_t* dyn, int ninst, int s1, int32_t c, int s3, int s4) { CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { SET_DF(s4, d_xor8); } else IFXORNAT (X_ALL) { SET_DFNONE(); @@ -63,17 +63,17 @@ void emit_xor8c(dynarec_rv64_t* dyn, int ninst, int s1, int32_t c, int s3, int s if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_SF) { + IFX (X_SF) { SRLI(s3, s1, 7); SET_FLAGS_NEZ(s3, F_SF, s4); } - IFX(X_PEND) { + IFX (X_PEND) { SB(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s4); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -82,8 +82,8 @@ void emit_xor8c(dynarec_rv64_t* dyn, int ninst, int s1, int32_t c, int s3, int s void emit_xor32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3, int s4) { CLEAR_FLAGS(); - IFX(X_PEND) { - SET_DF(s4, rex.w?d_xor64:d_xor32); + IFX (X_PEND) { + SET_DF(s4, rex.w ? d_xor64 : d_xor32); } else IFXORNAT (X_ALL) { SET_DFNONE(); } @@ -93,21 +93,21 @@ void emit_xor32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); // test sign bit before zeroup. - IFX(X_SF) { + IFX (X_SF) { if (!rex.w) SEXT_W(s1, s1); SET_FLAGS_LTZ(s1, F_SF, s3, s4); } if (!rex.w && s1 != s2) ZEROUP(s1); - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s4); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -116,8 +116,8 @@ void emit_xor32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s void emit_xor32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int64_t c, int s3, int s4) { CLEAR_FLAGS(); - IFX(X_PEND) { - SET_DF(s4, rex.w?d_xor64:d_xor32); + IFX (X_PEND) { + SET_DF(s4, rex.w ? d_xor64 : d_xor32); } else IFXORNAT (X_ALL) { SET_DFNONE(); } @@ -132,20 +132,20 @@ void emit_xor32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int64_t c, i if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); // test sign bit before zeroup. - IFX(X_SF) { + IFX (X_SF) { if (!rex.w) SEXT_W(s1, s1); SET_FLAGS_LTZ(s1, F_SF, s3, s4); } if (!rex.w) ZEROUP(s1); - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s4); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -154,7 +154,7 @@ void emit_xor32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int64_t c, i void emit_xor16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, int s5) { CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { SET_DF(s4, d_xor16); } else IFXORNAT (X_ALL) { SET_DFNONE(); @@ -164,20 +164,20 @@ void emit_xor16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SH(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_ZF | X_SF) { - IFX(X_ZF) { + IFX (X_ZF | X_SF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s4); } - IFX(X_SF) { + IFX (X_SF) { SRLI(s3, s1, 15); SET_FLAGS_NEZ(s3, F_SF, s4); } } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -186,7 +186,7 @@ void emit_xor16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, void emit_or16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4) { CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { SET_DF(s3, d_or16); } else IFXORNAT (X_ALL) { SET_DFNONE(); @@ -196,19 +196,19 @@ void emit_or16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4) if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SD(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_SF) { + IFX (X_SF) { SRLI(s3, s1, 15); SET_FLAGS_NEZ(s3, F_SF, s4); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s4); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -217,8 +217,8 @@ void emit_or16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4) void emit_or32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3, int s4) { CLEAR_FLAGS(); - IFX(X_PEND) { - SET_DF(s4, rex.w?d_or64:d_or32); + IFX (X_PEND) { + SET_DF(s4, rex.w ? d_or64 : d_or32); } else IFXORNAT (X_ALL) { SET_DFNONE(); } @@ -227,7 +227,7 @@ void emit_or32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3 if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_SF) { + IFX (X_SF) { if (!rex.w) SEXT_W(s1, s1); SET_FLAGS_LTZ(s1, F_SF, s3, s4); } @@ -235,14 +235,14 @@ void emit_or32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3 ZEROUP(s1); } - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s4); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -251,8 +251,8 @@ void emit_or32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3 void emit_or32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int64_t c, int s3, int s4) { CLEAR_FLAGS(); - IFX(X_PEND) { - SET_DF(s4, rex.w?d_or64:d_or32); + IFX (X_PEND) { + SET_DF(s4, rex.w ? d_or64 : d_or32); } else IFXORNAT (X_ALL) { SET_DFNONE(); } @@ -266,7 +266,7 @@ void emit_or32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int64_t c, in if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_SF) { + IFX (X_SF) { if (!rex.w) SEXT_W(s1, s1); SET_FLAGS_LTZ(s1, F_SF, s3, s4); } @@ -274,14 +274,14 @@ void emit_or32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int64_t c, in ZEROUP(s1); } - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s4); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -291,7 +291,7 @@ void emit_or32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int64_t c, in void emit_and8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4) { CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { SET_DF(s3, d_and8); } else IFXORNAT (X_ALL) { SET_DFNONE(); @@ -301,17 +301,17 @@ void emit_and8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4) if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SB(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_SF) { + IFX (X_SF) { SRLI(s3, s1, 7); SET_FLAGS_NEZ(s3, F_SF, s4); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s4); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -321,7 +321,7 @@ void emit_and8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4) void emit_and8c(dynarec_rv64_t* dyn, int ninst, int s1, int32_t c, int s3, int s4) { CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { SET_DF(s3, d_and8); } else IFXORNAT (X_ALL) { SET_DFNONE(); @@ -331,17 +331,17 @@ void emit_and8c(dynarec_rv64_t* dyn, int ninst, int s1, int32_t c, int s3, int s if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SD(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_SF) { + IFX (X_SF) { SRLI(s3, s1, 7); SET_FLAGS_NEZ(s3, F_SF, s4); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s4); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -349,7 +349,7 @@ void emit_and8c(dynarec_rv64_t* dyn, int ninst, int s1, int32_t c, int s3, int s void emit_and16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4) { CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { SET_DF(s3, d_tst16); } else IFXORNAT (X_ALL) { SET_DFNONE(); @@ -359,17 +359,17 @@ void emit_and16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4) if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SH(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_SF) { + IFX (X_SF) { SRLI(s3, s1, 15); SET_FLAGS_NEZ(s3, F_SF, s4); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s4); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -378,8 +378,8 @@ void emit_and16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4) void emit_and32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3, int s4) { CLEAR_FLAGS(); - IFX(X_PEND) { - SET_DF(s3, rex.w?d_tst64:d_tst32); + IFX (X_PEND) { + SET_DF(s3, rex.w ? d_tst64 : d_tst32); } else IFXORNAT (X_ALL) { SET_DFNONE(); } @@ -389,17 +389,17 @@ void emit_and32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_SF) { - SRLI(s3, s1, rex.w?63:31); + IFX (X_SF) { + SRLI(s3, s1, rex.w ? 63 : 31); SET_FLAGS_NEZ(s3, F_SF, s4); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s4); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -408,8 +408,8 @@ void emit_and32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s void emit_and32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int64_t c, int s3, int s4) { CLEAR_FLAGS(); - IFX(X_PEND) { - SET_DF(s3, rex.w?d_tst64:d_tst32); + IFX (X_PEND) { + SET_DF(s3, rex.w ? d_tst64 : d_tst32); } else IFXORNAT (X_ALL) { SET_DFNONE(); } @@ -424,17 +424,17 @@ void emit_and32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int64_t c, i if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_SF) { - SRLI(s3, s1, rex.w?63:31); + IFX (X_SF) { + SRLI(s3, s1, rex.w ? 63 : 31); SET_FLAGS_NEZ(s3, F_SF, s4); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s4); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -443,7 +443,7 @@ void emit_and32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int64_t c, i void emit_or8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4) { CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { SET_DF(s3, d_or8); } else IFXORNAT (X_ALL) { SET_DFNONE(); @@ -453,17 +453,17 @@ void emit_or8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4) if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SB(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_SF) { + IFX (X_SF) { SRLI(s3, s1, 7); SET_FLAGS_NEZ(s3, F_SF, s4); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s4); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -471,6 +471,6 @@ void emit_or8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4) // emit OR8 instruction, from s1 , constant c, store result in s1 using s3 and s4 as scratch void emit_or8c(dynarec_rv64_t* dyn, int ninst, int s1, int32_t c, int s2, int s3, int s4) { - MOV32w(s2, c&0xff); + MOV32w(s2, c & 0xff); emit_or8(dyn, ninst, s1, s2, s3, s4); } diff --git a/src/dynarec/rv64/dynarec_rv64_emit_math.c b/src/dynarec/rv64/dynarec_rv64_emit_math.c index 2b2ab7a8..cfa08eac 100644 --- a/src/dynarec/rv64/dynarec_rv64_emit_math.c +++ b/src/dynarec/rv64/dynarec_rv64_emit_math.c @@ -25,14 +25,14 @@ void emit_add32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3, int s4, int s5) { CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, op1)); SDxw(s2, xEmu, offsetof(x64emu_t, op2)); - SET_DF(s3, rex.w?d_add64:d_add32b); + SET_DF(s3, rex.w ? d_add64 : d_add32b); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - IFX(X_CF) { + IFX (X_CF) { if (rex.w) { AND(s5, xMASK, s1); if (rv64_zba) // lo @@ -64,39 +64,39 @@ void emit_add32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_AF | X_OF) { - if(rv64_zbb) { - ANDN(s3, s3, s1); // s3 = ~res & (op1 | op2) + IFX (X_AF | X_OF) { + if (rv64_zbb) { + ANDN(s3, s3, s1); // s3 = ~res & (op1 | op2) } else { - NOT(s5, s1); // s5 = ~res - AND(s3, s5, s3); // s3 = ~res & (op1 | op2) + NOT(s5, s1); // s5 = ~res + AND(s3, s5, s3); // s3 = ~res & (op1 | op2) } - OR(s3, s3, s4); // cc = (~res & (op1 | op2)) | (op1 & op2) - IFX(X_AF) { + OR(s3, s3, s4); // cc = (~res & (op1 | op2)) | (op1 & op2) + IFX (X_AF) { ANDI(s4, s3, 0x08); // AF: cc & 0x08 SET_FLAGS_NEZ(s4, F_AF, s5); } - IFX(X_OF) { - SRLI(s3, s3, rex.w?62:30); + IFX (X_OF) { + SRLI(s3, s3, rex.w ? 62 : 30); SRLI(s4, s3, 1); XOR(s3, s3, s4); ANDI(s3, s3, 1); // OF: xor of two MSB's of cc SET_FLAGS_NEZ(s3, F_OF2, s5); } } - IFX(X_SF) { + IFX (X_SF) { SET_FLAGS_LTZ(s1, F_SF, s3, s5); } if (!rex.w) { ZEROUP(s1); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s4); } } @@ -118,17 +118,17 @@ void emit_add32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int64_t c, i return; } CLEAR_FLAGS(); - IFX(X_PEND | X_AF | X_CF | X_OF) { + IFX (X_PEND | X_AF | X_CF | X_OF) { MOV64xw(s2, c); } - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, op1)); SDxw(s2, xEmu, offsetof(x64emu_t, op2)); - SET_DF(s3, rex.w?d_add64:d_add32b); + SET_DF(s3, rex.w ? d_add64 : d_add32b); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - IFX(X_CF) { + IFX (X_CF) { if (rex.w) { AND(s5, xMASK, s1); if (rv64_zba) // lo @@ -151,12 +151,12 @@ void emit_add32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int64_t c, i } SET_FLAGS_NEZ(s5, F_CF, s4); } - IFX(X_AF | X_OF) { - OR(s3, s1, s2); // s3 = op1 | op2 - AND(s4, s1, s2); // s4 = op1 & op2 + IFX (X_AF | X_OF) { + OR(s3, s1, s2); // s3 = op1 | op2 + AND(s4, s1, s2); // s4 = op1 & op2 } - if(c >= -2048 && c < 2048) { + if (c >= -2048 && c < 2048) { ADDIxw(s1, s1, c); } else { IFX (X_PEND | X_AF | X_CF | X_OF) { @@ -168,39 +168,39 @@ void emit_add32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int64_t c, i if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_AF | X_OF) { - if(rv64_zbb) { - ANDN(s3, s3, s1); // s3 = ~res & (op1 | op2) + IFX (X_AF | X_OF) { + if (rv64_zbb) { + ANDN(s3, s3, s1); // s3 = ~res & (op1 | op2) } else { - NOT(s2, s1); // s2 = ~res - AND(s3, s2, s3); // s3 = ~res & (op1 | op2) + NOT(s2, s1); // s2 = ~res + AND(s3, s2, s3); // s3 = ~res & (op1 | op2) } - OR(s3, s3, s4); // cc = (~res & (op1 | op2)) | (op1 & op2) - IFX(X_AF) { + OR(s3, s3, s4); // cc = (~res & (op1 | op2)) | (op1 & op2) + IFX (X_AF) { ANDI(s4, s3, 0x08); // AF: cc & 0x08 SET_FLAGS_NEZ(s4, F_AF, s5); } - IFX(X_OF) { - SRLI(s3, s3, rex.w?62:30); + IFX (X_OF) { + SRLI(s3, s3, rex.w ? 62 : 30); SRLI(s4, s3, 1); XOR(s3, s3, s4); ANDI(s3, s3, 1); // OF: xor of two MSB's of cc SET_FLAGS_NEZ(s3, F_OF2, s5); } } - IFX(X_SF) { + IFX (X_SF) { SET_FLAGS_LTZ(s1, F_SF, s3, s5); } if (!rex.w) { ZEROUP(s1); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s4); } } @@ -209,37 +209,37 @@ void emit_add32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int64_t c, i void emit_add16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, int s5) { CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { SH(s1, xEmu, offsetof(x64emu_t, op1)); SH(s2, xEmu, offsetof(x64emu_t, op2)); SET_DF(s3, d_add16); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - IFX(X_AF | X_OF) { - OR(s3, s1, s2); // s3 = op1 | op2 - AND(s4, s1, s2); // s4 = op1 & op2 + IFX (X_AF | X_OF) { + OR(s3, s1, s2); // s3 = op1 | op2 + AND(s4, s1, s2); // s4 = op1 & op2 } ADD(s1, s1, s2); if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SW(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_AF | X_OF) { - if(rv64_zbb) { - ANDN(s3, s3, s1); // s3 = ~res & (op1 | op2) + IFX (X_AF | X_OF) { + if (rv64_zbb) { + ANDN(s3, s3, s1); // s3 = ~res & (op1 | op2) } else { - NOT(s5, s1); // s5 = ~res - AND(s3, s5, s3); // s3 = ~res & (op1 | op2) + NOT(s5, s1); // s5 = ~res + AND(s3, s5, s3); // s3 = ~res & (op1 | op2) } - OR(s3, s3, s4); // cc = (~res & (op1 | op2)) | (op1 & op2) - IFX(X_AF) { + OR(s3, s3, s4); // cc = (~res & (op1 | op2)) | (op1 & op2) + IFX (X_AF) { ANDI(s4, s3, 0x08); // AF: cc & 0x08 SET_FLAGS_NEZ(s4, F_AF, s5); } - IFX(X_OF) { + IFX (X_OF) { SRLI(s3, s3, 14); SRLI(s4, s3, 1); XOR(s3, s3, s4); @@ -248,21 +248,21 @@ void emit_add16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, } } - IFX(X_CF) { + IFX (X_CF) { SRLI(s3, s1, 16); SET_FLAGS_NEZ(s3, F_CF, s4); } ZEXTH(s1, s1); - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s4); } - IFX(X_SF) { + IFX (X_SF) { SRLI(s3, s1, 15); SET_FLAGS_NEZ(s3, F_SF, s4); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -271,34 +271,34 @@ void emit_add16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, void emit_add8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, int s5) { CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { SB(s1, xEmu, offsetof(x64emu_t, op1)); SB(s2, xEmu, offsetof(x64emu_t, op2)); SET_DF(s3, d_add8); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - IFX(X_AF | X_OF) { - OR(s3, s1, s2); // s3 = op1 | op2 - AND(s4, s1, s2); // s4 = op1 & op2 + IFX (X_AF | X_OF) { + OR(s3, s1, s2); // s3 = op1 | op2 + AND(s4, s1, s2); // s4 = op1 & op2 } ADD(s1, s1, s2); if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_AF|X_OF) { - if(rv64_zbb) { - ANDN(s3, s3, s1); // s3 = ~res & (op1 | op2) + IFX (X_AF | X_OF) { + if (rv64_zbb) { + ANDN(s3, s3, s1); // s3 = ~res & (op1 | op2) } else { - NOT(s2, s1); // s4 = ~res - AND(s3, s2, s3); // s3 = ~res & (op1 | op2) + NOT(s2, s1); // s4 = ~res + AND(s3, s2, s3); // s3 = ~res & (op1 | op2) } - OR(s3, s3, s4); // cc = (~res & (op1 | op2)) | (op1 & op2) - IFX(X_AF) { + OR(s3, s3, s4); // cc = (~res & (op1 | op2)) | (op1 & op2) + IFX (X_AF) { ANDI(s4, s3, 0x08); // AF: cc & 0x08 SET_FLAGS_NEZ(s4, F_AF, s5); } - IFX(X_OF) { + IFX (X_OF) { SRLI(s3, s3, 6); SRLI(s4, s3, 1); XOR(s3, s3, s4); @@ -306,22 +306,22 @@ void emit_add8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, i SET_FLAGS_NEZ(s3, F_OF2, s5); } } - IFX(X_CF) { + IFX (X_CF) { SRLI(s3, s1, 8); SET_FLAGS_NEZ(s3, F_CF, s4); } - IFX(X_PEND) { + IFX (X_PEND) { SH(s1, xEmu, offsetof(x64emu_t, res)); } ANDI(s1, s1, 0xff); - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s4); } - IFX(X_SF) { + IFX (X_SF) { SRLI(s3, s1, 7); SET_FLAGS_NEZ(s3, F_SF, s4); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -330,36 +330,39 @@ void emit_add8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, i void emit_add8c(dynarec_rv64_t* dyn, int ninst, int s1, int c, int s2, int s3, int s4, int s5) { CLEAR_FLAGS(); - IFX(X_PEND) { - MOV32w(s4, c&0xff); + IFX (X_PEND) { + MOV32w(s4, c & 0xff); SB(s1, xEmu, offsetof(x64emu_t, op1)); SB(s4, xEmu, offsetof(x64emu_t, op2)); SET_DF(s3, d_add8); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - IFX(X_AF | X_OF) { - IFX(X_PEND) {} else {MOV32w(s4, c&0xff);} - OR(s3, s1, s4); // s3 = op1 | op2 - AND(s4, s1, s4); // s4 = op1 & op2 + IFX (X_AF | X_OF) { + IFX (X_PEND) { + } else { + MOV32w(s4, c & 0xff); + } + OR(s3, s1, s4); // s3 = op1 | op2 + AND(s4, s1, s4); // s4 = op1 & op2 } ADDI(s1, s1, c); if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_AF|X_OF) { - if(rv64_zbb) { - ANDN(s3, s3, s1); // s3 = ~res & (op1 | op2) + IFX (X_AF | X_OF) { + if (rv64_zbb) { + ANDN(s3, s3, s1); // s3 = ~res & (op1 | op2) } else { - NOT(s2, s1); // s2 = ~res - AND(s3, s2, s3); // s3 = ~res & (op1 | op2) + NOT(s2, s1); // s2 = ~res + AND(s3, s2, s3); // s3 = ~res & (op1 | op2) } - OR(s3, s3, s4); // cc = (~res & (op1 | op2)) | (op1 & op2) - IFX(X_AF) { + OR(s3, s3, s4); // cc = (~res & (op1 | op2)) | (op1 & op2) + IFX (X_AF) { ANDI(s4, s3, 0x08); // AF: cc & 0x08 SET_FLAGS_NEZ(s4, F_AF, s5); } - IFX(X_OF) { + IFX (X_OF) { SRLI(s3, s3, 6); SRLI(s4, s3, 1); XOR(s3, s3, s4); @@ -367,22 +370,22 @@ void emit_add8c(dynarec_rv64_t* dyn, int ninst, int s1, int c, int s2, int s3, i SET_FLAGS_NEZ(s3, F_OF2, s5); } } - IFX(X_CF) { + IFX (X_CF) { SRLI(s3, s1, 8); SET_FLAGS_NEZ(s3, F_CF, s4); } - IFX(X_PEND) { + IFX (X_PEND) { SH(s1, xEmu, offsetof(x64emu_t, res)); } ANDI(s1, s1, 0xff); - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s4); } - IFX(X_SF) { + IFX (X_SF) { SRLI(s3, s1, 7); SET_FLAGS_NEZ(s3, F_SF, s4); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -391,7 +394,7 @@ void emit_add8c(dynarec_rv64_t* dyn, int ninst, int s1, int c, int s2, int s3, i void emit_sub8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, int s5) { CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { SB(s1, xEmu, offsetof(x64emu_t, op1)); SB(s2, xEmu, offsetof(x64emu_t, op2)); SET_DF(s3, d_sub8); @@ -399,7 +402,7 @@ void emit_sub8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, i SET_DFNONE(); } - IFX(X_AF | X_CF | X_OF) { + IFX (X_AF | X_CF | X_OF) { // for later flag calculation NOT(s5, s1); } @@ -409,18 +412,18 @@ void emit_sub8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, i if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_SF) { + IFX (X_SF) { SRLI(s3, s1, 7); SET_FLAGS_NEZ(s3, F_SF, s4); } - IFX(X_PEND) { + IFX (X_PEND) { SB(s1, xEmu, offsetof(x64emu_t, res)); } CALC_SUB_FLAGS(s5, s2, s1, s3, s4, 8); - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s5); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -428,7 +431,7 @@ void emit_sub8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, i // emit SUB8 instruction, from s1, constant c, store result in s1 using s3 and s4 as scratch void emit_sub8c(dynarec_rv64_t* dyn, int ninst, int s1, int c, int s2, int s3, int s4, int s5) { - MOV32w(s2, c&0xff); + MOV32w(s2, c & 0xff); emit_sub8(dyn, ninst, s1, s2, s3, s4, s5); } @@ -436,7 +439,7 @@ void emit_sub8c(dynarec_rv64_t* dyn, int ninst, int s1, int c, int s2, int s3, i void emit_sub16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, int s5) { CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { SH(s1, xEmu, offsetof(x64emu_t, op1)); SH(s2, xEmu, offsetof(x64emu_t, op2)); SET_DF(s3, d_sub16); @@ -444,7 +447,7 @@ void emit_sub16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, SET_DFNONE(); } - IFX(X_AF | X_CF | X_OF) { + IFX (X_AF | X_CF | X_OF) { // for later flag calculation NOT(s5, s1); } @@ -452,20 +455,20 @@ void emit_sub16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, SUBW(s1, s1, s2); if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SH(s1, xEmu, offsetof(x64emu_t, res)); } SLLI(s1, s1, 48); - IFX(X_SF) { + IFX (X_SF) { SET_FLAGS_LTZ(s1, F_SF, s3, s4); } SRLI(s1, s1, 48); CALC_SUB_FLAGS(s5, s2, s1, s3, s4, 16); - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s5); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -475,15 +478,15 @@ void emit_sub16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, void emit_sub32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3, int s4, int s5) { CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, op1)); SDxw(s2, xEmu, offsetof(x64emu_t, op2)); - SET_DF(s3, rex.w?d_sub64:d_sub32); + SET_DF(s3, rex.w ? d_sub64 : d_sub32); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - IFX(X_AF | X_CF | X_OF) { + IFX (X_AF | X_CF | X_OF) { // for later flag calculation NOT(s5, s1); } @@ -491,20 +494,20 @@ void emit_sub32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s SUBxw(s1, s1, s2); if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_SF) { + IFX (X_SF) { SET_FLAGS_LTZ(s1, F_SF, s3, s4); } if (!rex.w) { ZEROUP(s1); } - CALC_SUB_FLAGS(s5, s2, s1, s3, s4, rex.w?64:32); - IFX(X_ZF) { + CALC_SUB_FLAGS(s5, s2, s1, s3, s4, rex.w ? 64 : 32); + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s5); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -527,16 +530,16 @@ void emit_sub32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int64_t c, i return; } CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, op1)); MOV64xw(s2, c); SDxw(s2, xEmu, offsetof(x64emu_t, op2)); - SET_DF(s3, rex.w?d_sub64:d_sub32); + SET_DF(s3, rex.w ? d_sub64 : d_sub32); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - IFX(X_AF | X_CF | X_OF) { + IFX (X_AF | X_CF | X_OF) { // for later flag calculation NOT(s5, s1); } @@ -544,31 +547,34 @@ void emit_sub32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int64_t c, i if (c > -2048 && c <= 2048) { ADDIxw(s1, s1, -c); } else { - IFX(X_PEND) {} else {MOV64xw(s2, c);} + IFX (X_PEND) { + } else { + MOV64xw(s2, c); + } SUBxw(s1, s1, s2); } if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_AF | X_CF | X_OF) { - IFX(X_PEND) {} - else if (c > -2048 && c <= 2048) { + IFX (X_AF | X_CF | X_OF) { + IFX (X_PEND) { + } else if (c > -2048 && c <= 2048) { MOV64xw(s2, c); } } - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_SF) { + IFX (X_SF) { SET_FLAGS_LTZ(s1, F_SF, s3, s4); } if (!rex.w) { ZEROUP(s1); } - CALC_SUB_FLAGS(s5, s2, s1, s3, s4, rex.w?64:32); - IFX(X_ZF) { + CALC_SUB_FLAGS(s5, s2, s1, s3, s4, rex.w ? 64 : 32); + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s5); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -577,38 +583,38 @@ void emit_sub32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int64_t c, i void emit_inc8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4) { IFXORNAT (X_ALL) { - ANDI(xFlags, xFlags, ~((1UL<<F_AF) | (1UL<<F_OF2) | (1UL<<F_ZF) | (1UL<<F_SF) | (1UL<<F_PF))); + ANDI(xFlags, xFlags, ~((1UL << F_AF) | (1UL << F_OF2) | (1UL << F_ZF) | (1UL << F_SF) | (1UL << F_PF))); } - IFX(X_PEND) { + IFX (X_PEND) { SB(s1, xEmu, offsetof(x64emu_t, op1)); SET_DF(s3, d_inc8); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - IFX(X_AF | X_OF) { - ORI(s3, s1, 1); // s3 = op1 | op2 - ANDI(s4, s1, 1); // s5 = op1 & op2 + IFX (X_AF | X_OF) { + ORI(s3, s1, 1); // s3 = op1 | op2 + ANDI(s4, s1, 1); // s5 = op1 & op2 } ADDIW(s1, s1, 1); if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SB(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_AF | X_OF) { - if(rv64_zbb) { - ANDN(s3, s3, s1); // s3 = ~res & (op1 | op2) + IFX (X_AF | X_OF) { + if (rv64_zbb) { + ANDN(s3, s3, s1); // s3 = ~res & (op1 | op2) } else { - NOT(s2, s1); // s2 = ~res - AND(s3, s2, s3); // s3 = ~res & (op1 | op2) + NOT(s2, s1); // s2 = ~res + AND(s3, s2, s3); // s3 = ~res & (op1 | op2) } - OR(s3, s3, s4); // cc = (~res & (op1 | op2)) | (op1 & op2) - IFX(X_AF) { + OR(s3, s3, s4); // cc = (~res & (op1 | op2)) | (op1 & op2) + IFX (X_AF) { ANDI(s2, s3, 0x08); // AF: cc & 0x08 SET_FLAGS_NEZ(s2, F_AF, s4); } - IFX(X_OF) { + IFX (X_OF) { SRLI(s3, s3, 6); SRLI(s2, s3, 1); XOR(s3, s3, s2); @@ -616,15 +622,15 @@ void emit_inc8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4) SET_FLAGS_NEZ(s3, F_OF2, s4); } } - IFX(X_SF) { + IFX (X_SF) { ANDI(s2, s1, 0x80); SET_FLAGS_NEZ(s2, F_SF, s4); } ANDI(s1, s1, 0xff); - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s2); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s4); } } @@ -634,34 +640,34 @@ void emit_inc8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4) void emit_dec8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4) { IFXORNAT (X_ALL) { - ANDI(xFlags, xFlags, ~((1UL<<F_AF) | (1UL<<F_OF2) | (1UL<<F_ZF) | (1UL<<F_SF) | (1UL<<F_PF))); + ANDI(xFlags, xFlags, ~((1UL << F_AF) | (1UL << F_OF2) | (1UL << F_ZF) | (1UL << F_SF) | (1UL << F_PF))); } - IFX(X_PEND) { + IFX (X_PEND) { SB(s1, xEmu, offsetof(x64emu_t, op1)); SET_DF(s3, d_dec8); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - IFX(X_AF | X_OF) { - NOT(s4, s1); // s4 = ~op1 - ORI(s3, s4, 1); // s3 = ~op1 | op2 - ANDI(s4, s4, 1); // s4 = ~op1 & op2 + IFX (X_AF | X_OF) { + NOT(s4, s1); // s4 = ~op1 + ORI(s3, s4, 1); // s3 = ~op1 | op2 + ANDI(s4, s4, 1); // s4 = ~op1 & op2 } ADDIW(s1, s1, -1); if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SB(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_AF | X_OF) { - AND(s3, s1, s3); // s3 = res & (~op1 | op2) - OR(s3, s3, s4); // cc = (res & (~op1 | op2)) | (~op1 & op2) - IFX(X_AF) { + IFX (X_AF | X_OF) { + AND(s3, s1, s3); // s3 = res & (~op1 | op2) + OR(s3, s3, s4); // cc = (res & (~op1 | op2)) | (~op1 & op2) + IFX (X_AF) { ANDI(s2, s3, 0x08); // AF: cc & 0x08 SET_FLAGS_NEZ(s2, F_AF, s4); } - IFX(X_OF) { + IFX (X_OF) { SRLI(s3, s3, 6); SRLI(s2, s3, 1); XOR(s3, s3, s2); @@ -669,15 +675,15 @@ void emit_dec8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4) SET_FLAGS_NEZ(s3, F_OF2, s4); } } - IFX(X_SF) { + IFX (X_SF) { ANDI(s2, s1, 0x80); SET_FLAGS_NEZ(s2, F_SF, s4); } ANDI(s1, s1, 0xff); - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s2); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s4); } } @@ -686,55 +692,55 @@ void emit_dec8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4) void emit_inc32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3, int s4, int s5) { IFXORNAT (X_ALL) { - ANDI(xFlags, xFlags, ~((1UL<<F_AF) | (1UL<<F_OF2) | (1UL<<F_ZF) | (1UL<<F_SF) | (1UL<<F_PF))); + ANDI(xFlags, xFlags, ~((1UL << F_AF) | (1UL << F_OF2) | (1UL << F_ZF) | (1UL << F_SF) | (1UL << F_PF))); } - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, op1)); - SET_DF(s3, rex.w?d_inc64:d_inc32); + SET_DF(s3, rex.w ? d_inc64 : d_inc32); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - IFX(X_AF | X_OF) { - ORI(s3, s1, 1); // s3 = op1 | op2 - ANDI(s5, s1, 1); // s5 = op1 & op2 + IFX (X_AF | X_OF) { + ORI(s3, s1, 1); // s3 = op1 | op2 + ANDI(s5, s1, 1); // s5 = op1 & op2 } ADDIxw(s1, s1, 1); if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_AF | X_OF) { - if(rv64_zbb) { - ANDN(s3, s3, s1); // s3 = ~res & (op1 | op2) + IFX (X_AF | X_OF) { + if (rv64_zbb) { + ANDN(s3, s3, s1); // s3 = ~res & (op1 | op2) } else { - NOT(s2, s1); // s2 = ~res - AND(s3, s2, s3); // s3 = ~res & (op1 | op2) + NOT(s2, s1); // s2 = ~res + AND(s3, s2, s3); // s3 = ~res & (op1 | op2) } - OR(s3, s3, s5); // cc = (~res & (op1 | op2)) | (op1 & op2) - IFX(X_AF) { + OR(s3, s3, s5); // cc = (~res & (op1 | op2)) | (op1 & op2) + IFX (X_AF) { ANDI(s2, s3, 0x08); // AF: cc & 0x08 SET_FLAGS_NEZ(s2, F_AF, s4); } - IFX(X_OF) { - SRLI(s3, s3, rex.w?62:30); + IFX (X_OF) { + SRLI(s3, s3, rex.w ? 62 : 30); SRLI(s2, s3, 1); XOR(s3, s3, s2); ANDI(s3, s3, 1); // OF: xor of two MSB's of cc SET_FLAGS_NEZ(s3, F_OF2, s4); } } - IFX(X_SF) { + IFX (X_SF) { SET_FLAGS_LTZ(s1, F_SF, s4, s5); } if (!rex.w) { ZEROUP(s1); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s2); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s4); } } @@ -743,51 +749,51 @@ void emit_inc32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s void emit_dec32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3, int s4, int s5) { IFXORNAT (X_ALL) { - ANDI(xFlags, xFlags, ~((1UL<<F_AF) | (1UL<<F_OF2) | (1UL<<F_ZF) | (1UL<<F_SF) | (1UL<<F_PF))); + ANDI(xFlags, xFlags, ~((1UL << F_AF) | (1UL << F_OF2) | (1UL << F_ZF) | (1UL << F_SF) | (1UL << F_PF))); } - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, op1)); - SET_DF(s3, rex.w?d_dec64:d_dec32); + SET_DF(s3, rex.w ? d_dec64 : d_dec32); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - IFX(X_AF | X_OF) { + IFX (X_AF | X_OF) { NOT(s5, s1); - ORI(s3, s5, 1); // s3 = ~op1 | op2 - ANDI(s5, s5, 1); // s5 = ~op1 & op2 + ORI(s3, s5, 1); // s3 = ~op1 | op2 + ANDI(s5, s5, 1); // s5 = ~op1 & op2 } ADDIxw(s1, s1, -1); if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_AF | X_OF) { - AND(s3, s1, s3); // s3 = res & (~op1 | op2) - OR(s3, s3, s5); // cc = (res & (~op1 | op2)) | (~op1 & op2) - IFX(X_AF) { + IFX (X_AF | X_OF) { + AND(s3, s1, s3); // s3 = res & (~op1 | op2) + OR(s3, s3, s5); // cc = (res & (~op1 | op2)) | (~op1 & op2) + IFX (X_AF) { ANDI(s2, s3, 0x08); // AF: cc & 0x08 SET_FLAGS_NEZ(s2, F_AF, s4); } - IFX(X_OF) { - SRLI(s3, s3, rex.w?62:30); + IFX (X_OF) { + SRLI(s3, s3, rex.w ? 62 : 30); SRLI(s2, s3, 1); XOR(s3, s3, s2); ANDI(s3, s3, 1); // OF: xor of two MSB's of cc SET_FLAGS_NEZ(s3, F_OF2, s4); } } - IFX(X_SF) { + IFX (X_SF) { SET_FLAGS_LTZ(s1, F_SF, s4, s5); } if (!rex.w) { ZEROUP(s1); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s2); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s4); } } @@ -796,38 +802,38 @@ void emit_dec32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s void emit_inc16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, int s5) { IFXORNAT (X_ALL) { - ANDI(xFlags, xFlags, ~((1UL<<F_AF) | (1UL<<F_OF2) | (1UL<<F_ZF) | (1UL<<F_SF) | (1UL<<F_PF))); + ANDI(xFlags, xFlags, ~((1UL << F_AF) | (1UL << F_OF2) | (1UL << F_ZF) | (1UL << F_SF) | (1UL << F_PF))); } - IFX(X_PEND) { + IFX (X_PEND) { SH(s1, xEmu, offsetof(x64emu_t, op1)); SET_DF(s3, d_inc16); } else IFXORNAT (X_ZF | X_OF | X_AF | X_SF | X_PF) { SET_DFNONE(); } - IFX(X_AF | X_OF) { - ORI(s3, s1, 1); // s3 = op1 | op2 - ANDI(s4, s1, 1); // s4 = op1 & op2 + IFX (X_AF | X_OF) { + ORI(s3, s1, 1); // s3 = op1 | op2 + ANDI(s4, s1, 1); // s4 = op1 & op2 } ADDI(s1, s1, 1); if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SH(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_AF | X_OF) { - if(rv64_zbb) { - ANDN(s3, s3, s1); // s3 = ~res & (op1 | op2) + IFX (X_AF | X_OF) { + if (rv64_zbb) { + ANDN(s3, s3, s1); // s3 = ~res & (op1 | op2) } else { - NOT(s2, s1); // s2 = ~res - AND(s3, s2, s3); // s3 = ~res & (op1 | op2) + NOT(s2, s1); // s2 = ~res + AND(s3, s2, s3); // s3 = ~res & (op1 | op2) } - OR(s3, s3, s4); // cc = (~res & (op1 | op2)) | (op1 & op2) - IFX(X_AF) { + OR(s3, s3, s4); // cc = (~res & (op1 | op2)) | (op1 & op2) + IFX (X_AF) { ANDI(s4, s3, 0x08); // AF: cc & 0x08 SET_FLAGS_NEZ(s4, F_AF, s5); } - IFX(X_OF) { + IFX (X_OF) { SRLI(s3, s3, 14); SRLI(s4, s3, 1); XOR(s3, s3, s4); @@ -838,14 +844,14 @@ void emit_inc16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, ZEXTH(s1, s1); - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s5); } - IFX(X_SF) { + IFX (X_SF) { SRLI(s3, s1, 15); SET_FLAGS_NEZ(s3, F_SF, s5); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -854,35 +860,35 @@ void emit_inc16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, void emit_dec16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, int s5) { IFXORNAT (X_ALL) { - ANDI(xFlags, xFlags, ~((1UL<<F_AF) | (1UL<<F_OF2) | (1UL<<F_ZF) | (1UL<<F_SF) | (1UL<<F_PF))); + ANDI(xFlags, xFlags, ~((1UL << F_AF) | (1UL << F_OF2) | (1UL << F_ZF) | (1UL << F_SF) | (1UL << F_PF))); } - IFX(X_PEND) { + IFX (X_PEND) { SH(s1, xEmu, offsetof(x64emu_t, op1)); SET_DF(s3, d_dec16); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - IFX(X_AF | X_OF) { + IFX (X_AF | X_OF) { NOT(s5, s1); - ORI(s3, s5, 1); // s3 = ~op1 | op2 - ANDI(s5, s5, 1); // s5 = ~op1 & op2 + ORI(s3, s5, 1); // s3 = ~op1 | op2 + ANDI(s5, s5, 1); // s5 = ~op1 & op2 } ADDIW(s1, s1, -1); if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SH(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_AF | X_OF) { - AND(s3, s1, s3); // s3 = res & (~op1 | op2) - OR(s3, s3, s5); // cc = (res & (~op1 | op2)) | (~op1 & op2) - IFX(X_AF) { + IFX (X_AF | X_OF) { + AND(s3, s1, s3); // s3 = res & (~op1 | op2) + OR(s3, s3, s5); // cc = (res & (~op1 | op2)) | (~op1 & op2) + IFX (X_AF) { ANDI(s2, s3, 0x08); // AF: cc & 0x08 SET_FLAGS_NEZ(s2, F_AF, s5); } - IFX(X_OF) { + IFX (X_OF) { SRLI(s3, s3, 14); SRLI(s2, s3, 1); XOR(s3, s3, s2); @@ -891,14 +897,14 @@ void emit_dec16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, } } SLLIW(s1, s1, 16); - IFX(X_SF) { + IFX (X_SF) { SET_FLAGS_LTZ(s1, F_SF, s4, s5); } SRLIW(s1, s1, 16); - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s2); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s5); } } @@ -906,7 +912,7 @@ void emit_dec16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, // emit SBB8 instruction, from s1, s2, store result in s1 using s3, s4 and s5 as scratch void emit_sbb8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, int s5) { - IFX(X_PEND) { + IFX (X_PEND) { SB(s1, xEmu, offsetof(x64emu_t, op1)); SB(s2, xEmu, offsetof(x64emu_t, op2)); SET_DF(s3, d_sbb8); @@ -914,7 +920,7 @@ void emit_sbb8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, i SET_DFNONE(); } - IFX(X_AF | X_CF | X_OF) { + IFX (X_AF | X_CF | X_OF) { // for later flag calculation NOT(s5, s1); } @@ -927,19 +933,19 @@ void emit_sbb8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, i if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { SB(s1, xEmu, offsetof(x64emu_t, res)); } CALC_SUB_FLAGS(s5, s2, s1, s3, s4, 8); - IFX(X_SF) { + IFX (X_SF) { SRLI(s3, s1, 7); SET_FLAGS_NEZ(s3, F_SF, s5); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s5); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -947,14 +953,14 @@ void emit_sbb8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, i // emit ADC8 instruction, from s1, s2, store result in s1 using s3 and s4 as scratch void emit_adc8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, int s5) { - IFX(X_PEND) { + IFX (X_PEND) { SH(s1, xEmu, offsetof(x64emu_t, op1)); SH(s2, xEmu, offsetof(x64emu_t, op2)); SET_DF(s3, d_adc8); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - IFX(X_AF | X_OF) { + IFX (X_AF | X_OF) { OR(s4, s1, s2); // s4 = op1 | op2 AND(s5, s1, s2); // s5 = op1 & op2 } @@ -966,22 +972,22 @@ void emit_adc8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, i if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { SW(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_AF | X_OF) { - if(rv64_zbb) { - ANDN(s3, s4, s1); // s3 = ~res & (op1 | op2) + IFX (X_AF | X_OF) { + if (rv64_zbb) { + ANDN(s3, s4, s1); // s3 = ~res & (op1 | op2) } else { NOT(s2, s1); // s2 = ~res AND(s3, s2, s4); // s3 = ~res & (op1 | op2) } - OR(s3, s3, s5); // cc = (~res & (op1 | op2)) | (op1 & op2) - IFX(X_AF) { + OR(s3, s3, s5); // cc = (~res & (op1 | op2)) | (op1 & op2) + IFX (X_AF) { ANDI(s4, s3, 0x08); // AF: cc & 0x08 SET_FLAGS_NEZ(s4, F_AF, s5); } - IFX(X_OF) { + IFX (X_OF) { SRLI(s3, s3, 6); SRLI(s4, s3, 1); XOR(s3, s3, s4); @@ -989,42 +995,43 @@ void emit_adc8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, i SET_FLAGS_NEZ(s3, F_OF2, s5); } } - IFX(X_CF) { + IFX (X_CF) { SRLI(s3, s1, 8); SET_FLAGS_NEZ(s3, F_CF, s5); } ANDI(s1, s1, 0xff); - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s5); } - IFX(X_SF) { + IFX (X_SF) { SRLI(s3, s1, 7); SET_FLAGS_NEZ(s3, F_SF, s5); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } // emit ADC8 instruction, from s1, const c, store result in s1 using s3, s4, s5 and s6 as scratch -void emit_adc8c(dynarec_rv64_t* dyn, int ninst, int s1, int32_t c, int s3, int s4, int s5, int s6) { - MOV32w(s5, c&0xff); +void emit_adc8c(dynarec_rv64_t* dyn, int ninst, int s1, int32_t c, int s3, int s4, int s5, int s6) +{ + MOV32w(s5, c & 0xff); emit_adc8(dyn, ninst, s1, s5, s3, s4, s6); } // emit SBB8 instruction, from s1, constant c, store result in s1 using s3, s4, s5 and s6 as scratch void emit_sbb8c(dynarec_rv64_t* dyn, int ninst, int s1, int c, int s3, int s4, int s5, int s6) { - MOV32w(s6, c&0xff); + MOV32w(s6, c & 0xff); emit_sbb8(dyn, ninst, s1, s6, s3, s4, s5); } // emit SBB16 instruction, from s1, s2, store result in s1 using s3, s4 and s5 as scratch void emit_sbb16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, int s5) { - IFX(X_PEND) { + IFX (X_PEND) { SH(s1, xEmu, offsetof(x64emu_t, op1)); SH(s2, xEmu, offsetof(x64emu_t, op2)); SET_DF(s3, d_sbb16); @@ -1032,7 +1039,7 @@ void emit_sbb16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, SET_DFNONE(); } - IFX(X_AF | X_CF | X_OF) { + IFX (X_AF | X_CF | X_OF) { // for later flag calculation NOT(s5, s1); } @@ -1045,20 +1052,20 @@ void emit_sbb16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, CLEAR_FLAGS(); SLLIW(s1, s1, 16); - IFX(X_SF) { + IFX (X_SF) { SET_FLAGS_LTZ(s1, F_SF, s4, s5); } SRLIW(s1, s1, 16); - IFX(X_PEND) { + IFX (X_PEND) { SH(s1, xEmu, offsetof(x64emu_t, res)); } CALC_SUB_FLAGS(s5, s2, s1, s3, s4, 16); - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s5); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -1066,15 +1073,15 @@ void emit_sbb16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, // emit SBB32 instruction, from s1, s2, store result in s1 using s3, s4 and s5 as scratch void emit_sbb32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3, int s4, int s5) { - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, op1)); SDxw(s2, xEmu, offsetof(x64emu_t, op2)); - SET_DF(s3, rex.w?d_sbb64:d_sbb32); + SET_DF(s3, rex.w ? d_sbb64 : d_sbb32); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - IFX(X_AF | X_CF | X_OF) { + IFX (X_AF | X_CF | X_OF) { // for later flag calculation NOT(s5, s1); } @@ -1086,22 +1093,22 @@ void emit_sbb32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); CLEAR_FLAGS(); - IFX(X_SF) { + IFX (X_SF) { SET_FLAGS_LTZ(s1, F_SF, s4, s5); } if (!rex.w) { ZEROUP(s1); } - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, res)); } - CALC_SUB_FLAGS(s5, s2, s1, s3, s4, rex.w?64:32); - IFX(X_ZF) { + CALC_SUB_FLAGS(s5, s2, s1, s3, s4, rex.w ? 64 : 32); + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s5); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -1110,53 +1117,53 @@ void emit_sbb32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s void emit_neg32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3, int s4, int s5) { CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, op1)); - SET_DF(s3, rex.w?d_neg64:d_neg32); + SET_DF(s3, rex.w ? d_neg64 : d_neg32); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - IFX(X_AF | X_OF) { - MV(s3, s1); // s3 = op1 + IFX (X_AF | X_OF) { + MV(s3, s1); // s3 = op1 } NEGxw(s1, s1); if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_CF) { + IFX (X_CF) { SET_FLAGS_NEZ(s1, F_CF, s4); } - IFX(X_AF | X_OF) { + IFX (X_AF | X_OF) { OR(s3, s1, s3); // s3 = res | op1 - IFX(X_AF) { + IFX (X_AF) { /* af = bc & 0x8 */ ANDI(s2, s3, 8); SET_FLAGS_NEZ(s2, F_AF, s4); } - IFX(X_OF) { + IFX (X_OF) { /* of = ((bc >> (width-2)) ^ (bc >> (width-1))) & 0x1; */ - SRLI(s2, s3, (rex.w?64:32)-2); + SRLI(s2, s3, (rex.w ? 64 : 32) - 2); SRLI(s3, s2, 1); XOR(s2, s2, s3); ANDI(s2, s2, 1); SET_FLAGS_NEZ(s2, F_OF2, s4); } } - IFX(X_SF) { + IFX (X_SF) { SET_FLAGS_LTZ(s1, F_SF, s4, s5); } if (!rex.w) { ZEROUP(s1); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s2); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s4); } } @@ -1165,36 +1172,36 @@ void emit_neg32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s void emit_neg16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4) { CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { SH(s1, xEmu, offsetof(x64emu_t, op1)); SET_DF(s3, d_neg16); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - IFX(X_AF | X_OF) { - MV(s3, s1); // s3 = op1 + IFX (X_AF | X_OF) { + MV(s3, s1); // s3 = op1 } NEG(s1, s1); ZEXTH(s1, s1); if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SH(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_CF) { + IFX (X_CF) { SET_FLAGS_NEZ(s1, F_CF, s4); } - IFX(X_AF | X_OF) { + IFX (X_AF | X_OF) { OR(s3, s1, s3); // s3 = res | op1 - IFX(X_AF) { + IFX (X_AF) { /* af = bc & 0x8 */ ANDI(s2, s3, 8); SET_FLAGS_NEZ(s2, F_AF, s4); } - IFX(X_OF) { + IFX (X_OF) { /* of = ((bc >> (width-2)) ^ (bc >> (width-1))) & 0x1; */ SRLI(s2, s3, 14); SRLI(s3, s2, 1); @@ -1203,15 +1210,15 @@ void emit_neg16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4) SET_FLAGS_NEZ(s2, F_OF2, s4); } } - IFX(X_SF) { - SRLI(s3, s1, 15-F_SF); // put sign bit in place - ANDI(s3, s3, 1 << F_SF); // 1<<F_SF is sign bit, so just mask + IFX (X_SF) { + SRLI(s3, s1, 15 - F_SF); // put sign bit in place + ANDI(s3, s3, 1 << F_SF); // 1<<F_SF is sign bit, so just mask OR(xFlags, xFlags, s3); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s2); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s4); } } @@ -1220,36 +1227,36 @@ void emit_neg16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4) void emit_neg8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4) { CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { SB(s1, xEmu, offsetof(x64emu_t, op1)); SET_DF(s3, d_neg8); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - IFX(X_AF | X_OF) { - MV(s3, s1); // s3 = op1 + IFX (X_AF | X_OF) { + MV(s3, s1); // s3 = op1 } NEG(s1, s1); ANDI(s1, s1, 0xff); if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SB(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_CF) { + IFX (X_CF) { SET_FLAGS_NEZ(s1, F_CF, s4); } - IFX(X_AF | X_OF) { + IFX (X_AF | X_OF) { OR(s3, s1, s3); // s3 = res | op1 - IFX(X_AF) { + IFX (X_AF) { /* af = bc & 0x8 */ ANDI(s2, s3, 8); SET_FLAGS_NEZ(s2, F_AF, s4); } - IFX(X_OF) { + IFX (X_OF) { /* of = ((bc >> (width-2)) ^ (bc >> (width-1))) & 0x1; */ SRLI(s2, s3, 6); SRLI(s3, s2, 1); @@ -1258,14 +1265,14 @@ void emit_neg8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4) SET_FLAGS_NEZ(s2, F_OF2, s4); } } - IFX(X_SF) { - ANDI(s3, s1, 1 << F_SF); // 1<<F_SF is sign bit, so just mask + IFX (X_SF) { + ANDI(s3, s1, 1 << F_SF); // 1<<F_SF is sign bit, so just mask OR(xFlags, xFlags, s3); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s2); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s4); } } @@ -1273,14 +1280,14 @@ void emit_neg8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4) // emit ADC16 instruction, from s1, s2, store result in s1 using s3 and s4 as scratch void emit_adc16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, int s5) { - IFX(X_PEND) { + IFX (X_PEND) { SH(s1, xEmu, offsetof(x64emu_t, op1)); SH(s2, xEmu, offsetof(x64emu_t, op2)); SET_DF(s3, d_adc16); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - IFX(X_AF | X_OF) { + IFX (X_AF | X_OF) { OR(s4, s1, s2); // s4 = op1 | op2 AND(s5, s1, s2); // s5 = op1 & op2 } @@ -1292,22 +1299,22 @@ void emit_adc16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { SW(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_AF | X_OF) { - if(rv64_zbb) { - ANDN(s3, s4, s1); // s3 = ~res & (op1 | op2) + IFX (X_AF | X_OF) { + if (rv64_zbb) { + ANDN(s3, s4, s1); // s3 = ~res & (op1 | op2) } else { NOT(s2, s1); // s2 = ~res AND(s3, s2, s4); // s3 = ~res & (op1 | op2) } - OR(s3, s3, s5); // cc = (~res & (op1 | op2)) | (op1 & op2) - IFX(X_AF) { + OR(s3, s3, s5); // cc = (~res & (op1 | op2)) | (op1 & op2) + IFX (X_AF) { ANDI(s4, s3, 0x08); // AF: cc & 0x08 SET_FLAGS_NEZ(s4, F_AF, s5); } - IFX(X_OF) { + IFX (X_OF) { SRLI(s3, s3, 14); SRLI(s4, s3, 1); XOR(s3, s3, s4); @@ -1315,21 +1322,21 @@ void emit_adc16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, SET_FLAGS_NEZ(s3, F_OF2, s5); } } - IFX(X_CF) { + IFX (X_CF) { SRLI(s3, s1, 16); SET_FLAGS_NEZ(s3, F_CF, s5); } ZEXTH(s1, s1); - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s5); } - IFX(X_SF) { + IFX (X_SF) { SRLI(s3, s1, 15); SET_FLAGS_NEZ(s3, F_SF, s5); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -1337,19 +1344,24 @@ void emit_adc16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, // emit ADC32 instruction, from s1, s2, store result in s1 using s3 and s4 as scratch void emit_adc32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s3, int s4, int s5, int s6) { - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, op1)); SDxw(s2, xEmu, offsetof(x64emu_t, op2)); - SET_DF(s3, rex.w?d_adc64:d_adc32b); + SET_DF(s3, rex.w ? d_adc64 : d_adc32b); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - IFX(X_CF) { + IFX (X_CF) { if (rex.w) { AND(s5, xMASK, s1); - if(rv64_zba) ADDUW(s5, s2, s5); else {AND(s4, xMASK, s2); ADD(s5, s5, s4);} // lo + if (rv64_zba) + ADDUW(s5, s2, s5); + else { + AND(s4, xMASK, s2); + ADD(s5, s5, s4); + } // lo ANDI(s3, xFlags, 1); - ADD(s5, s5, s3); // add carry + ADD(s5, s5, s3); // add carry SRLI(s3, s1, 0x20); SRLI(s4, s2, 0x20); ADD(s4, s4, s3); @@ -1361,11 +1373,11 @@ void emit_adc32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s AND(s4, s2, xMASK); ADD(s5, s3, s4); ANDI(s3, xFlags, 1); - ADD(s5, s5, s3); // add carry + ADD(s5, s5, s3); // add carry SRLI(s6, s5, 0x20); } } - IFX(X_AF | X_OF) { + IFX (X_AF | X_OF) { OR(s4, s1, s2); // s4 = op1 | op2 AND(s5, s1, s2); // s5 = op1 & op2 } @@ -1377,23 +1389,23 @@ void emit_adc32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_AF | X_OF) { - if(rv64_zbb) { - ANDN(s3, s4, s1); // s3 = ~res & (op1 | op2) + IFX (X_AF | X_OF) { + if (rv64_zbb) { + ANDN(s3, s4, s1); // s3 = ~res & (op1 | op2) } else { NOT(s3, s1); // s2 = ~res AND(s3, s3, s4); // s3 = ~res & (op1 | op2) } - OR(s3, s3, s5); // cc = (~res & (op1 | op2)) | (op1 & op2) - IFX(X_AF) { + OR(s3, s3, s5); // cc = (~res & (op1 | op2)) | (op1 & op2) + IFX (X_AF) { ANDI(s4, s3, 0x08); // AF: cc & 0x08 SET_FLAGS_NEZ(s4, F_AF, s5); } - IFX(X_OF) { - SRLI(s3, s3, rex.w?62:30); + IFX (X_OF) { + SRLI(s3, s3, rex.w ? 62 : 30); SRLI(s4, s3, 1); XOR(s3, s3, s4); ANDI(s3, s3, 1); // OF: xor of two MSB's of cc @@ -1403,16 +1415,16 @@ void emit_adc32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s IFX (X_CF) { SET_FLAGS_NEZ(s6, F_CF, s5); } - IFX(X_SF) { + IFX (X_SF) { SET_FLAGS_LTZ(s1, F_SF, s5, s6); } if (!rex.w) { ZEROUP(s1); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s5); } } diff --git a/src/dynarec/rv64/dynarec_rv64_emit_shift.c b/src/dynarec/rv64/dynarec_rv64_emit_shift.c index 3c4b26b4..267bf1cf 100644 --- a/src/dynarec/rv64/dynarec_rv64_emit_shift.c +++ b/src/dynarec/rv64/dynarec_rv64_emit_shift.c @@ -28,7 +28,7 @@ void emit_shl8c(dynarec_rv64_t* dyn, int ninst, int s1, uint32_t c, int s3, int // c != 0 CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { MOV64x(s3, c); SB(s3, xEmu, offsetof(x64emu_t, op2)); SB(s1, xEmu, offsetof(x64emu_t, op1)); @@ -38,28 +38,28 @@ void emit_shl8c(dynarec_rv64_t* dyn, int ninst, int s1, uint32_t c, int s3, int } if (c < 8) { - IFX(X_CF|X_OF) { - SRLI(s3, s1, 8-c); + IFX (X_CF | X_OF) { + SRLI(s3, s1, 8 - c); ANDI(s5, s3, 1); // LSB == F_CF - IFX(X_CF) { + IFX (X_CF) { OR(xFlags, xFlags, s5); } } - SLLI(s1, s1, c+56); - IFX(X_SF) { + SLLI(s1, s1, c + 56); + IFX (X_SF) { SET_FLAGS_LTZ(s1, F_SF, s3, s4); } SRLI(s1, s1, 56); if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SB(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s3); } - IFX(X_OF) { + IFX (X_OF) { // OF flag is affected only on 1-bit shifts if (c == 1) { SRLI(s3, s1, 7); @@ -68,11 +68,11 @@ void emit_shl8c(dynarec_rv64_t* dyn, int ninst, int s1, uint32_t c, int s3, int OR(xFlags, xFlags, s3); } } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } else { - IFX(X_CF) { + IFX (X_CF) { if (c == 8) { ANDI(s3, s1, 1); OR(xFlags, xFlags, s3); // F_CF == 0 @@ -81,17 +81,17 @@ void emit_shl8c(dynarec_rv64_t* dyn, int ninst, int s1, uint32_t c, int s3, int MV(s1, xZR); if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(xZR, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SB(s1, xEmu, offsetof(x64emu_t, res)); } // OF nop // SF nop // AF nop - IFX(X_PF | X_ZF) { - IFX(X_ZF) { + IFX (X_PF | X_ZF) { + IFX (X_ZF) { ORI(xFlags, xFlags, 1 << F_ZF); } - IFX(X_PF) { + IFX (X_PF) { ORI(xFlags, xFlags, 1 << F_PF); } } @@ -104,7 +104,7 @@ void emit_shr8c(dynarec_rv64_t* dyn, int ninst, int s1, uint32_t c, int s3, int if (!c) return; // c != 0 CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { MOV64x(s3, c); SB(s3, xEmu, offsetof(x64emu_t, op2)); SB(s1, xEmu, offsetof(x64emu_t, op1)); @@ -112,9 +112,9 @@ void emit_shr8c(dynarec_rv64_t* dyn, int ninst, int s1, uint32_t c, int s3, int } else IFXORNAT (X_ALL) { SET_DFNONE(); } - IFX(X_CF) { + IFX (X_CF) { if (c > 1) { - SRAI(s3, s1, c-1); + SRAI(s3, s1, c - 1); ANDI(s3, s3, 1); // LSB == F_CF } else { // no need to shift @@ -122,7 +122,7 @@ void emit_shr8c(dynarec_rv64_t* dyn, int ninst, int s1, uint32_t c, int s3, int } OR(xFlags, xFlags, s3); } - IFX(X_OF) { + IFX (X_OF) { // OF flag is affected only on 1-bit shifts // OF flag is set to the most-significant bit of the original operand if (c == 1) { @@ -138,13 +138,13 @@ void emit_shr8c(dynarec_rv64_t* dyn, int ninst, int s1, uint32_t c, int s3, int if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); // SF should be unset - IFX(X_PEND) { + IFX (X_PEND) { SB(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s5); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -155,7 +155,7 @@ void emit_sar8c(dynarec_rv64_t* dyn, int ninst, int s1, uint32_t c, int s3, int if (!c) return; // c != 0 CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { MOV64x(s3, c); SB(s3, xEmu, offsetof(x64emu_t, op2)); SB(s1, xEmu, offsetof(x64emu_t, op1)); @@ -163,9 +163,9 @@ void emit_sar8c(dynarec_rv64_t* dyn, int ninst, int s1, uint32_t c, int s3, int } else IFXORNAT (X_ALL) { SET_DFNONE(); } - IFX(X_CF) { + IFX (X_CF) { if (c > 1) { - SRAI(s3, s1, c-1); + SRAI(s3, s1, c - 1); ANDI(s3, s3, 1); // LSB == F_CF } else { // no need to shift @@ -175,7 +175,7 @@ void emit_sar8c(dynarec_rv64_t* dyn, int ninst, int s1, uint32_t c, int s3, int } // For the SAR instruction, the OF flag is cleared for all 1-bit shifts. // OF nop - IFX(X_SF) { + IFX (X_SF) { // SF is the same as the original operand SET_FLAGS_LTZ(s1, F_SF, s3, s4); } @@ -185,13 +185,13 @@ void emit_sar8c(dynarec_rv64_t* dyn, int ninst, int s1, uint32_t c, int s3, int if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SB(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s3); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -201,7 +201,7 @@ void emit_shl8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, i { // s2 is not 0 here and is 1..1f/3f CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { SB(s1, xEmu, offsetof(x64emu_t, op1)); SB(s2, xEmu, offsetof(x64emu_t, op2)); SET_DF(s4, d_shl8); @@ -211,29 +211,29 @@ void emit_shl8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, i SLL(s1, s1, s2); - IFX(X_CF | X_OF) { + IFX (X_CF | X_OF) { SRLI(s5, s1, 8); ANDI(s5, s5, 1); // LSB == F_CF - IFX(X_CF) { + IFX (X_CF) { OR(xFlags, xFlags, s5); } } SLLI(s1, s1, 56); - IFX(X_SF) { + IFX (X_SF) { SET_FLAGS_LTZ(s1, F_SF, s3, s4); } SRLI(s1, s1, 56); if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SB(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s3); } - IFX(X_OF) { + IFX (X_OF) { // OF flag is affected only on 1-bit shifts ADDI(s3, s2, -1); BNEZ(s3, 4 + 4 * 4); @@ -242,7 +242,7 @@ void emit_shl8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, i SLLI(s3, s3, F_OF2); OR(xFlags, xFlags, s3); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -254,7 +254,7 @@ void emit_shr8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, i CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { SB(s2, xEmu, offsetof(x64emu_t, op2)); SB(s1, xEmu, offsetof(x64emu_t, op1)); SET_DF(s4, d_shr8); @@ -262,13 +262,13 @@ void emit_shr8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, i SET_DFNONE(); } - IFX(X_CF) { + IFX (X_CF) { SUBI(s3, s2, 1); SRA(s3, s1, s3); ANDI(s3, s3, 1); // LSB == F_CF OR(xFlags, xFlags, s3); } - IFX(X_OF) { + IFX (X_OF) { // OF flag is affected only on 1-bit shifts // OF flag is set to the most-significant bit of the original operand ADDI(s3, xZR, 1); @@ -284,13 +284,13 @@ void emit_shr8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, i if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); // SF should be unset - IFX(X_PEND) { + IFX (X_PEND) { SB(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s3); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -302,14 +302,14 @@ void emit_sar8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, i CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { SB(s2, xEmu, offsetof(x64emu_t, op2)); SB(s1, xEmu, offsetof(x64emu_t, op1)); SET_DF(s4, d_sar8); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - IFX(X_CF) { + IFX (X_CF) { SUBI(s3, s2, 1); SRA(s3, s1, s3); ANDI(s3, s3, 1); // LSB == F_CF @@ -317,7 +317,7 @@ void emit_sar8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, i } // For the SAR instruction, the OF flag is cleared for all 1-bit shifts. // OF nop - IFX(X_SF) { + IFX (X_SF) { // SF is the same as the original operand SET_FLAGS_LTZ(s1, F_SF, s3, s4); } @@ -327,13 +327,13 @@ void emit_sar8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, i if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SB(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s3); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -345,7 +345,7 @@ void emit_shl16c(dynarec_rv64_t* dyn, int ninst, int s1, uint32_t c, int s3, int // c != 0 CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { MOV64x(s3, c); SH(s3, xEmu, offsetof(x64emu_t, op2)); SH(s1, xEmu, offsetof(x64emu_t, op1)); @@ -355,29 +355,29 @@ void emit_shl16c(dynarec_rv64_t* dyn, int ninst, int s1, uint32_t c, int s3, int } if (c < 16) { - IFX(X_CF|X_OF) { - SRLI(s3, s1, 16-c); + IFX (X_CF | X_OF) { + SRLI(s3, s1, 16 - c); ANDI(s5, s3, 1); // LSB == F_CF - IFX(X_CF) { + IFX (X_CF) { OR(xFlags, xFlags, s5); } } - SLLI(s1, s1, c+48); - IFX(X_SF) { + SLLI(s1, s1, c + 48); + IFX (X_SF) { SET_FLAGS_LTZ(s1, F_SF, s3, s4); } SRLI(s1, s1, 48); if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SH(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s3); } - IFX(X_OF) { + IFX (X_OF) { // OF flag is affected only on 1-bit shifts if (c == 1) { SRLI(s3, s1, 15); @@ -386,11 +386,11 @@ void emit_shl16c(dynarec_rv64_t* dyn, int ninst, int s1, uint32_t c, int s3, int OR(xFlags, xFlags, s3); } } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } else { - IFX(X_CF) { + IFX (X_CF) { if (c == 16) { ANDI(s3, s1, 1); OR(xFlags, xFlags, s3); // F_CF == 0 @@ -399,17 +399,17 @@ void emit_shl16c(dynarec_rv64_t* dyn, int ninst, int s1, uint32_t c, int s3, int MV(s1, xZR); if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(xZR, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SH(s1, xEmu, offsetof(x64emu_t, res)); } // OF nop // SF nop // AF nop - IFX(X_PF | X_ZF) { - IFX(X_ZF) { + IFX (X_PF | X_ZF) { + IFX (X_ZF) { ORI(xFlags, xFlags, 1 << F_ZF); } - IFX(X_PF) { + IFX (X_PF) { ORI(xFlags, xFlags, 1 << F_PF); } } @@ -422,7 +422,7 @@ void emit_shr16c(dynarec_rv64_t* dyn, int ninst, int s1, uint32_t c, int s3, int if (!c) return; // c != 0 CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { MOV64x(s3, c); SH(s3, xEmu, offsetof(x64emu_t, op2)); SH(s1, xEmu, offsetof(x64emu_t, op1)); @@ -430,9 +430,9 @@ void emit_shr16c(dynarec_rv64_t* dyn, int ninst, int s1, uint32_t c, int s3, int } else IFXORNAT (X_ALL) { SET_DFNONE(); } - IFX(X_CF) { + IFX (X_CF) { if (c > 1) { - SRAI(s3, s1, c-1); + SRAI(s3, s1, c - 1); ANDI(s3, s3, 1); // LSB == F_CF } else { // no need to shift @@ -440,7 +440,7 @@ void emit_shr16c(dynarec_rv64_t* dyn, int ninst, int s1, uint32_t c, int s3, int } OR(xFlags, xFlags, s3); } - IFX(X_OF) { + IFX (X_OF) { // OF flag is affected only on 1-bit shifts // OF flag is set to the most-significant bit of the original operand if (c == 1) { @@ -456,13 +456,13 @@ void emit_shr16c(dynarec_rv64_t* dyn, int ninst, int s1, uint32_t c, int s3, int // SF should be unset - IFX(X_PEND) { + IFX (X_PEND) { SH(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s3); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -473,7 +473,7 @@ void emit_sar16c(dynarec_rv64_t* dyn, int ninst, int s1, uint32_t c, int s3, int if (!c) return; // c != 0 CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { MOV64x(s3, c); SH(s3, xEmu, offsetof(x64emu_t, op2)); SH(s1, xEmu, offsetof(x64emu_t, op1)); @@ -481,9 +481,9 @@ void emit_sar16c(dynarec_rv64_t* dyn, int ninst, int s1, uint32_t c, int s3, int } else IFXORNAT (X_ALL) { SET_DFNONE(); } - IFX(X_CF) { + IFX (X_CF) { if (c > 1) { - SRAI(s3, s1, c-1); + SRAI(s3, s1, c - 1); ANDI(s3, s3, 1); // LSB == F_CF } else { // no need to shift @@ -493,7 +493,7 @@ void emit_sar16c(dynarec_rv64_t* dyn, int ninst, int s1, uint32_t c, int s3, int } // For the SAR instruction, the OF flag is cleared for all 1-bit shifts. // OF nop - IFX(X_SF) { + IFX (X_SF) { // SF is the same as the original operand SET_FLAGS_LTZ(s1, F_SF, s3, s4); } @@ -503,13 +503,13 @@ void emit_sar16c(dynarec_rv64_t* dyn, int ninst, int s1, uint32_t c, int s3, int if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SH(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s3); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -520,7 +520,7 @@ void emit_shl16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, { // s2 is not 0 here and is 1..1f/3f CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { SH(s1, xEmu, offsetof(x64emu_t, op1)); SH(s2, xEmu, offsetof(x64emu_t, op2)); SET_DF(s4, d_shl16); @@ -530,29 +530,29 @@ void emit_shl16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, SLL(s1, s1, s2); - IFX(X_CF | X_OF) { + IFX (X_CF | X_OF) { SRLI(s5, s1, 16); ANDI(s5, s5, 1); // LSB == F_CF - IFX(X_CF) { + IFX (X_CF) { OR(xFlags, xFlags, s5); } } SLLI(s1, s1, 48); - IFX(X_SF) { + IFX (X_SF) { SET_FLAGS_LTZ(s1, F_SF, s3, s4); } SRLI(s1, s1, 48); if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SH(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s3); } - IFX(X_OF) { + IFX (X_OF) { // OF flag is affected only on 1-bit shifts ADDI(s3, s2, -1); BNEZ(s3, 4 + 4 * 4); @@ -561,7 +561,7 @@ void emit_shl16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, SLLI(s3, s3, F_OF2); OR(xFlags, xFlags, s3); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -573,7 +573,7 @@ void emit_shr16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { SH(s2, xEmu, offsetof(x64emu_t, op2)); SH(s1, xEmu, offsetof(x64emu_t, op1)); SET_DF(s4, d_shr16); @@ -581,13 +581,13 @@ void emit_shr16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, SET_DFNONE(); } - IFX(X_CF) { + IFX (X_CF) { SUBI(s3, s2, 1); SRA(s3, s1, s3); ANDI(s3, s3, 1); // LSB == F_CF OR(xFlags, xFlags, s3); } - IFX(X_OF) { + IFX (X_OF) { // OF flag is affected only on 1-bit shifts // OF flag is set to the most-significant bit of the original operand ADDI(s3, xZR, 1); @@ -603,13 +603,13 @@ void emit_shr16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); // SF should be unset - IFX(X_PEND) { + IFX (X_PEND) { SH(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s3); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -621,14 +621,14 @@ void emit_sar16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { SH(s2, xEmu, offsetof(x64emu_t, op2)); SH(s1, xEmu, offsetof(x64emu_t, op1)); SET_DF(s4, d_sar16); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - IFX(X_CF) { + IFX (X_CF) { SUBI(s3, s2, 1); SRA(s3, s1, s3); ANDI(s3, s3, 1); // LSB == F_CF @@ -636,7 +636,7 @@ void emit_sar16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, } // For the SAR instruction, the OF flag is cleared for all 1-bit shifts. // OF nop - IFX(X_SF) { + IFX (X_SF) { // SF is the same as the original operand SET_FLAGS_LTZ(s1, F_SF, s3, s4); } @@ -646,13 +646,13 @@ void emit_sar16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SH(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s3); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -662,20 +662,20 @@ void emit_shl32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s { // s2 is not 0 here and is 1..1f/3f CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, op1)); SDxw(s2, xEmu, offsetof(x64emu_t, op2)); - SET_DF(s4, rex.w?d_shl64:d_shl32); + SET_DF(s4, rex.w ? d_shl64 : d_shl32); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - IFX(X_CF|X_OF) { - SUBI(s5, s2, rex.w?64:32); + IFX (X_CF | X_OF) { + SUBI(s5, s2, rex.w ? 64 : 32); NEG(s5, s5); SRL(s3, s1, s5); ANDI(s5, s3, 1); // LSB == F_CF - IFX(X_CF) { + IFX (X_CF) { OR(xFlags, xFlags, s5); } } @@ -688,28 +688,28 @@ void emit_shl32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_SF) { + IFX (X_SF) { SET_FLAGS_LTZ(s1, F_SF, s3, s4); } if (!rex.w) { ZEROUP(s1); } - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s3); } - IFX(X_OF) { + IFX (X_OF) { // OF flag is affected only on 1-bit shifts ADDI(s3, s2, -1); BNEZ(s3, 4 + 4 * 4); - SRLIxw(s3, s1, rex.w?63:31); + SRLIxw(s3, s1, rex.w ? 63 : 31); XOR(s3, s3, s5); SLLI(s3, s3, F_OF2); OR(xFlags, xFlags, s3); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -722,19 +722,19 @@ void emit_shl32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, uint32_t c, } CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { MOV64x(s3, c); SDxw(s3, xEmu, offsetof(x64emu_t, op2)); SDxw(s1, xEmu, offsetof(x64emu_t, op1)); - SET_DF(s4, rex.w?d_shl64:d_shl32); + SET_DF(s4, rex.w ? d_shl64 : d_shl32); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - IFX(X_CF|X_OF) { - SRLI(s3, s1, (rex.w?64:32)-c); + IFX (X_CF | X_OF) { + SRLI(s3, s1, (rex.w ? 64 : 32) - c); ANDI(s5, s3, 1); // LSB == F_CF - IFX(X_CF) { + IFX (X_CF) { OR(xFlags, xFlags, s5); } } @@ -747,28 +747,28 @@ void emit_shl32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, uint32_t c, if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_SF) { + IFX (X_SF) { SET_FLAGS_LTZ(s1, F_SF, s3, s4); } if (!rex.w) { ZEROUP(s1); } - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s3); } - IFX(X_OF) { + IFX (X_OF) { // OF flag is affected only on 1-bit shifts if (c == 1) { - SRLIxw(s3, s1, rex.w?63:31); + SRLIxw(s3, s1, rex.w ? 63 : 31); XOR(s3, s3, s5); SLLI(s3, s3, F_OF2); OR(xFlags, xFlags, s3); } } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -780,26 +780,26 @@ void emit_shr32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s2, xEmu, offsetof(x64emu_t, op2)); SDxw(s1, xEmu, offsetof(x64emu_t, op1)); - SET_DF(s4, rex.w?d_shr64:d_shr32); + SET_DF(s4, rex.w ? d_shr64 : d_shr32); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - IFX(X_CF) { + IFX (X_CF) { SUBI(s3, s2, 1); SRA(s3, s1, s3); ANDI(s3, s3, 1); // LSB == F_CF OR(xFlags, xFlags, s3); } - IFX(X_OF) { + IFX (X_OF) { // OF flag is affected only on 1-bit shifts // OF flag is set to the most-significant bit of the original operand ADDI(s3, xZR, 1); BNE(s2, s3, 4 + 3 * 4); - SRLIxw(s3, s1, rex.w?63:31); + SRLIxw(s3, s1, rex.w ? 63 : 31); SLLI(s3, s3, F_OF2); OR(xFlags, xFlags, s3); } @@ -808,19 +808,19 @@ void emit_shr32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_SF) { + IFX (X_SF) { SET_FLAGS_LTZ(s1, F_SF, s3, s4); } if (!rex.w) { ZEROUP(s1); } - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s3); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -835,19 +835,20 @@ void emit_shr32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, uint32_t c, CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { if (c) { MOV64x(s3, c); SDxw(s3, xEmu, offsetof(x64emu_t, op2)); - } else SDxw(xZR, xEmu, offsetof(x64emu_t, op2)); + } else + SDxw(xZR, xEmu, offsetof(x64emu_t, op2)); SDxw(s1, xEmu, offsetof(x64emu_t, op1)); - SET_DF(s4, rex.w?d_shr64:d_shr32); + SET_DF(s4, rex.w ? d_shr64 : d_shr32); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - IFX(X_CF) { + IFX (X_CF) { if (c > 1) { - SRAI(s3, s1, c-1); + SRAI(s3, s1, c - 1); ANDI(s3, s3, 1); // LSB == F_CF } else { // no need to shift @@ -855,11 +856,11 @@ void emit_shr32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, uint32_t c, } OR(xFlags, xFlags, s3); } - IFX(X_OF) { + IFX (X_OF) { // OF flag is affected only on 1-bit shifts // OF flag is set to the most-significant bit of the original operand - if(c==1) { - SRLIxw(s3, s1, rex.w?63:31); + if (c == 1) { + SRLIxw(s3, s1, rex.w ? 63 : 31); SLLI(s3, s3, F_OF2); OR(xFlags, xFlags, s3); } @@ -873,19 +874,19 @@ void emit_shr32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, uint32_t c, if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_SF) { + IFX (X_SF) { SET_FLAGS_LTZ(s1, F_SF, s3, s4); } if (!rex.w && c == 0) { ZEROUP(s1); } - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s3); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -900,19 +901,20 @@ void emit_sar32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, uint32_t c, CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { if (c) { MOV64x(s3, c); SDxw(s3, xEmu, offsetof(x64emu_t, op2)); - } else SDxw(xZR, xEmu, offsetof(x64emu_t, op2)); + } else + SDxw(xZR, xEmu, offsetof(x64emu_t, op2)); SDxw(s1, xEmu, offsetof(x64emu_t, op1)); - SET_DF(s4, rex.w?d_sar64:d_sar32); + SET_DF(s4, rex.w ? d_sar64 : d_sar32); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - IFX(X_CF) { + IFX (X_CF) { if (c > 1) { - SRAI(s3, s1, c-1); + SRAI(s3, s1, c - 1); ANDI(s3, s3, 1); // LSB == F_CF } else { // no need to shift @@ -932,19 +934,19 @@ void emit_sar32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, uint32_t c, if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); // SRAIW sign-extends, so test sign bit before clearing upper bits - IFX(X_SF) { + IFX (X_SF) { SET_FLAGS_LTZ(s1, F_SF, s3, s4); } if (!rex.w) { ZEROUP(s1); } - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s3); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -958,14 +960,14 @@ void emit_rol32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s ZEROUP(s1); } BEQ_NEXT(s2, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s2, xEmu, offsetof(x64emu_t, op2)); - SET_DF(s4, rex.w?d_rol64:d_rol32); + SET_DF(s4, rex.w ? d_rol64 : d_rol32); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - if(rv64_zbb) { + if (rv64_zbb) { if (rex.w) { ROL(s1, s1, s2); } else { @@ -975,27 +977,27 @@ void emit_rol32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s } else { SLLxw(s3, s1, s2); NEG(s4, s2); - ADDI(s4, s4, rex.w?64:32); + ADDI(s4, s4, rex.w ? 64 : 32); SRLxw(s1, s1, s4); OR(s1, s3, s1); } if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_CF | X_OF) { - ANDI(xFlags, xFlags, ~((1UL<<F_CF) | (1UL<<F_OF2))); + IFX (X_CF | X_OF) { + ANDI(xFlags, xFlags, ~((1UL << F_CF) | (1UL << F_OF2))); } - IFX(X_CF | X_OF) { + IFX (X_CF | X_OF) { ANDI(s4, s1, 1); // LSB == F_CF - IFX(X_CF) OR(xFlags, xFlags, s4); + IFX (X_CF) OR(xFlags, xFlags, s4); } - IFX(X_OF) { + IFX (X_OF) { // the OF flag is set to the exclusive OR of the CF bit (after the rotate) and the most-significant bit of the result. ADDI(s3, s2, -1); BNEZ_MARK(s3); - SRLIxw(s3, s1, rex.w?63:31); + SRLIxw(s3, s1, rex.w ? 63 : 31); XOR(s3, s3, s4); // s3: MSB, s4: CF bit SLLI(s3, s3, F_OF2); OR(xFlags, xFlags, s3); @@ -1012,14 +1014,14 @@ void emit_ror32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s ZEROUP(s1); } BEQ_NEXT(s2, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s2, xEmu, offsetof(x64emu_t, op2)); - SET_DF(s4, rex.w?d_ror64:d_ror32); + SET_DF(s4, rex.w ? d_ror64 : d_ror32); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - if(rv64_zbb) { + if (rv64_zbb) { if (rex.w) { ROR(s1, s1, s2); } else { @@ -1029,28 +1031,28 @@ void emit_ror32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s } else { SRLxw(s3, s1, s2); NEG(s4, s2); - ADDI(s4, s4, rex.w?64:32); + ADDI(s4, s4, rex.w ? 64 : 32); SLLxw(s1, s1, s4); OR(s1, s3, s1); } if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_CF | X_OF) { - ANDI(xFlags, xFlags, ~(1UL<<F_CF | 1UL<<F_OF2)); + IFX (X_CF | X_OF) { + ANDI(xFlags, xFlags, ~(1UL << F_CF | 1UL << F_OF2)); } - IFX(X_CF) { - SRLIxw(s3, s1, rex.w?63:31); + IFX (X_CF) { + SRLIxw(s3, s1, rex.w ? 63 : 31); OR(xFlags, xFlags, s3); } - IFX(X_OF) { + IFX (X_OF) { // the OF flag is set to the exclusive OR of the two most-significant bits of the result ADDI(s3, s2, -1); BNEZ_MARK(s3); - SRLIxw(s3, s1, rex.w?63:31); - SRLIxw(s4, s1, rex.w?62:30); + SRLIxw(s3, s1, rex.w ? 63 : 31); + SRLIxw(s4, s1, rex.w ? 62 : 30); XOR(s3, s3, s4); ANDI(s3, s3, 1); SLLI(s3, s3, F_OF2); @@ -1067,24 +1069,24 @@ void emit_rol32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, uint32_t c, return; } - IFX(X_CF | X_OF) { - ANDI(xFlags, xFlags, ~(1UL<<F_CF | 1UL<<F_OF2)); + IFX (X_CF | X_OF) { + ANDI(xFlags, xFlags, ~(1UL << F_CF | 1UL << F_OF2)); } - IFX(X_PEND) { + IFX (X_PEND) { MOV32w(s3, c); SDxw(s3, xEmu, offsetof(x64emu_t, op2)); - SET_DF(s4, rex.w?d_rol64:d_rol32); + SET_DF(s4, rex.w ? d_rol64 : d_rol32); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - if(rv64_zbb) { - RORIxw(s1, s1, (rex.w?64:32)-c); + if (rv64_zbb) { + RORIxw(s1, s1, (rex.w ? 64 : 32) - c); } else if (rv64_xtheadbb) { - TH_SRRIxw(s1, s1, (rex.w?64:32)-c); + TH_SRRIxw(s1, s1, (rex.w ? 64 : 32) - c); } else { SLLIxw(s3, s1, c); - SRLIxw(s1, s1, (rex.w?64:32)-c); + SRLIxw(s1, s1, (rex.w ? 64 : 32) - c); OR(s1, s3, s1); } @@ -1092,17 +1094,17 @@ void emit_rol32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, uint32_t c, if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_CF | X_OF) { - ANDI(s4, s1, 1<<F_CF); - IFX(X_CF) OR(xFlags, xFlags, s4); + IFX (X_CF | X_OF) { + ANDI(s4, s1, 1 << F_CF); + IFX (X_CF) OR(xFlags, xFlags, s4); } - IFX(X_OF) { + IFX (X_OF) { // the OF flag is set to the exclusive OR of the CF bit (after the rotate) and the most-significant bit of the result. - if(c==1) { - SRLIxw(s3, s1, rex.w?63:31); + if (c == 1) { + SRLIxw(s3, s1, rex.w ? 63 : 31); XOR(s3, s3, s4); SLLI(s3, s3, F_OF2); OR(xFlags, xFlags, s3); @@ -1118,24 +1120,24 @@ void emit_ror32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, uint32_t c, return; } - IFX(X_CF | X_OF) { - ANDI(xFlags, xFlags, ~(1UL<<F_CF | 1UL<<F_OF2)); + IFX (X_CF | X_OF) { + ANDI(xFlags, xFlags, ~(1UL << F_CF | 1UL << F_OF2)); } - IFX(X_PEND) { + IFX (X_PEND) { MOV32w(s3, c); SDxw(s3, xEmu, offsetof(x64emu_t, op2)); - SET_DF(s4, rex.w?d_ror64:d_ror32); + SET_DF(s4, rex.w ? d_ror64 : d_ror32); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - if(rv64_zbb) { + if (rv64_zbb) { RORIxw(s1, s1, c); } else if (rv64_xtheadbb) { TH_SRRIxw(s1, s1, c); } else { SRLIxw(s3, s1, c); - SLLIxw(s1, s1, (rex.w?64:32)-c); + SLLIxw(s1, s1, (rex.w ? 64 : 32) - c); OR(s1, s3, s1); } @@ -1143,17 +1145,17 @@ void emit_ror32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, uint32_t c, if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_CF) { - SRLIxw(s3, s1, rex.w?63:31); + IFX (X_CF) { + SRLIxw(s3, s1, rex.w ? 63 : 31); OR(xFlags, xFlags, s3); } - IFX(X_OF) { + IFX (X_OF) { // the OF flag is set to the exclusive OR of the two most-significant bits of the result - if(c==1) { - SRLI(s3, s1, rex.w?62:30); + if (c == 1) { + SRLI(s3, s1, rex.w ? 62 : 30); SRLI(s4, s3, 1); XOR(s3, s3, s4); ANDI(s3, s3, 1); @@ -1166,42 +1168,43 @@ void emit_ror32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, uint32_t c, // emit SHRD32 instruction, from s1, fill s2 , constant c, store result in s1 using s3 and s4 as scratch void emit_shrd32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, uint32_t c, int s3, int s4, int s5) { - c&=(rex.w?0x3f:0x1f); + c &= (rex.w ? 0x3f : 0x1f); CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { if (c) { MOV64x(s3, c); SDxw(s3, xEmu, offsetof(x64emu_t, op2)); - } else SDxw(xZR, xEmu, offsetof(x64emu_t, op2)); + } else + SDxw(xZR, xEmu, offsetof(x64emu_t, op2)); SDxw(s1, xEmu, offsetof(x64emu_t, op1)); - SET_DF(s4, rex.w?d_shrd64:d_shrd32); + SET_DF(s4, rex.w ? d_shrd64 : d_shrd32); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - if(!c) { + if (!c) { if (!rex.w) ZEROUP(s1); - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, res)); } return; } - IFX(X_CF) { + IFX (X_CF) { if (c > 1) { - SRAI(s3, s1, c-1); + SRAI(s3, s1, c - 1); ANDI(s3, s3, 1); // LSB == F_CF } else { ANDI(s3, s1, 1); // LSB == F_CF } OR(xFlags, xFlags, s3); } - IFX(X_OF) { + IFX (X_OF) { // Store sign for later use. - if (c == 1) SRLIxw(s4, s1, rex.w?63:31); + if (c == 1) SRLIxw(s4, s1, rex.w ? 63 : 31); } SRLIxw(s3, s1, c); - SLLIxw(s1, s2, (rex.w?64:32)-c); + SLLIxw(s1, s2, (rex.w ? 64 : 32) - c); OR(s1, s1, s3); if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); @@ -1209,47 +1212,48 @@ void emit_shrd32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, uin if (!rex.w) { ZEROUP(s1); } - IFX(X_SF) { - SRLIxw(s3, s1, rex.w?63:31); + IFX (X_SF) { + SRLIxw(s3, s1, rex.w ? 63 : 31); SET_FLAGS_NEZ(s3, F_SF, s5); } - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s5); } - IFX(X_OF) { + IFX (X_OF) { // the OF flag is set if a sign change occurred - if(c==1) { - SRLI(s3, s1, rex.w?63:31); + if (c == 1) { + SRLI(s3, s1, rex.w ? 63 : 31); XOR(s3, s3, s4); SLLI(s3, s3, F_OF2); OR(xFlags, xFlags, s3); } } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } void emit_shrd16c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, uint32_t c, int s3, int s4, int s5) { - c&=0x1f; + c &= 0x1f; CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { if (c) { MOV64x(s3, c); SH(s3, xEmu, offsetof(x64emu_t, op2)); - } else SH(xZR, xEmu, offsetof(x64emu_t, op2)); + } else + SH(xZR, xEmu, offsetof(x64emu_t, op2)); SH(s1, xEmu, offsetof(x64emu_t, op1)); SET_DF(s4, d_shrd16); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - if(!c) { - IFX(X_PEND) { + if (!c) { + IFX (X_PEND) { SH(s1, xEmu, offsetof(x64emu_t, res)); } return; @@ -1259,9 +1263,9 @@ void emit_shrd16c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, uin SLLI(s5, s2, 16); OR(s1, s1, s5); - IFX(X_CF) { + IFX (X_CF) { if (c > 1) { - SRAI(s3, s1, c-1); + SRAI(s3, s1, c - 1); ANDI(s3, s3, 1); // LSB == F_CF } else { // no need to shift @@ -1269,7 +1273,7 @@ void emit_shrd16c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, uin } OR(xFlags, xFlags, s3); } - IFX(X_OF) { + IFX (X_OF) { // Store sign for later use. if (c == 1) SRLI(s4, s1, 15); } @@ -1284,15 +1288,15 @@ void emit_shrd16c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, uin ZEXTH(s1, s1); if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SH(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s5); } - IFX(X_OF) { + IFX (X_OF) { // the OF flag is set if a sign change occurred - if(c==1) { + if (c == 1) { SRLI(s3, s1, 15); XOR(s3, s3, s4); ANDI(s3, s3, 1); @@ -1304,49 +1308,50 @@ void emit_shrd16c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, uin SLLIW(s3, s1, 16); SET_FLAGS_LTZ(s3, F_SF, s4, s5); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } void emit_shld32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, uint32_t c, int s3, int s4, int s5) { - c&=(rex.w?0x3f:0x1f); + c &= (rex.w ? 0x3f : 0x1f); CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { if (c) { MOV64x(s3, c); SDxw(s3, xEmu, offsetof(x64emu_t, op2)); - } else SDxw(xZR, xEmu, offsetof(x64emu_t, op2)); + } else + SDxw(xZR, xEmu, offsetof(x64emu_t, op2)); SDxw(s1, xEmu, offsetof(x64emu_t, op1)); - SET_DF(s4, rex.w?d_shld64:d_shld32); + SET_DF(s4, rex.w ? d_shld64 : d_shld32); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - if(!c) { + if (!c) { if (!rex.w) { ZEROUP(s1); } - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, res)); } return; } - IFX(X_CF) { + IFX (X_CF) { if (c > 0) { - SRLI(s3, s1, (rex.w?64:32)-c); + SRLI(s3, s1, (rex.w ? 64 : 32) - c); ANDI(s4, s3, 1); // F_CF OR(xFlags, xFlags, s4); } } - IFX(X_OF) { + IFX (X_OF) { // Store sign for later use. - if (c == 1) SRLIxw(s4, s1, rex.w?63:31); + if (c == 1) SRLIxw(s4, s1, rex.w ? 63 : 31); } SLLIxw(s3, s1, c); - SRLIxw(s1, s2, (rex.w?64:32)-c); + SRLIxw(s1, s2, (rex.w ? 64 : 32) - c); OR(s1, s1, s3); if (!rex.w) { @@ -1354,16 +1359,16 @@ void emit_shld32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, uin } if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s5); } - IFX(X_OF) { + IFX (X_OF) { // the OF flag is set if a sign change occurred if (c == 1) { - SRLIxw(s3, s1, rex.w?63:31); + SRLIxw(s3, s1, rex.w ? 63 : 31); XOR(s3, s3, s4); SLLI(s3, s3, F_OF2); ORI(xFlags, xFlags, s3); @@ -1373,7 +1378,7 @@ void emit_shld32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, uin SRLIxw(s3, s1, rex.w ? 63 : 31); SET_FLAGS_NEZ(s3, F_SF, s4); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -1383,20 +1388,20 @@ void emit_shrd32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int { int64_t j64; CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, op1)); SDxw(s5, xEmu, offsetof(x64emu_t, op2)); SET_DF(s4, rex.w ? d_shrd64 : d_shrd32); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - IFX(X_CF) { + IFX (X_CF) { SUBI(s3, s5, 1); SRA(s3, s1, s3); ANDI(s3, s3, 1); // LSB == F_CF OR(xFlags, xFlags, s3); } - IFX(X_OF) { + IFX (X_OF) { // Store current sign for later use. SRLIxw(s6, s1, rex.w ? 63 : 31); } @@ -1408,16 +1413,16 @@ void emit_shrd32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, res)); } if (!rex.w) { ZEROUP(s1); } - IFX(X_OF) { + IFX (X_OF) { ADDI(s5, s5, -1); BNEZ_MARK(s5); - SRLIxw(s3, s1, rex.w?63:31); + SRLIxw(s3, s1, rex.w ? 63 : 31); XOR(s3, s3, s6); SLLI(s3, s3, F_OF2); OR(xFlags, xFlags, s3); @@ -1430,7 +1435,7 @@ void emit_shrd32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int SRLIxw(s3, s1, rex.w ? 63 : 31); SET_FLAGS_NEZ(s3, F_SF, s5); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } @@ -1439,22 +1444,22 @@ void emit_shld32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int { int64_t j64; CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, op1)); SDxw(s5, xEmu, offsetof(x64emu_t, op2)); - SET_DF(s4, rex.w?d_shld64:d_shld32); + SET_DF(s4, rex.w ? d_shld64 : d_shld32); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - MOV32w(s3, (rex.w?64:32)); + MOV32w(s3, (rex.w ? 64 : 32)); SUB(s3, s3, s5); - IFX(X_CF) { + IFX (X_CF) { SRL(s4, s1, s3); ANDI(s4, s4, 1); // LSB == F_CF OR(xFlags, xFlags, s4); } - IFX(X_OF) { + IFX (X_OF) { // Store current sign for later use. SRLIxw(s6, s1, rex.w ? 63 : 31); } @@ -1462,7 +1467,7 @@ void emit_shld32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int SRLxw(s3, s2, s3); OR(s1, s3, s4); - IFX(X_PEND) { + IFX (X_PEND) { SDxw(s1, xEmu, offsetof(x64emu_t, res)); } if (!rex.w) { @@ -1470,10 +1475,10 @@ void emit_shld32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int } if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_OF) { + IFX (X_OF) { ADDI(s5, s5, -1); BNEZ_MARK(s5); - SRLIxw(s3, s1, rex.w?63:31); + SRLIxw(s3, s1, rex.w ? 63 : 31); XOR(s3, s3, s6); SLLI(s3, s3, F_OF2); OR(xFlags, xFlags, s3); @@ -1486,28 +1491,29 @@ void emit_shld32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int SRLIxw(s3, s1, rex.w ? 63 : 31); SET_FLAGS_NEZ(s3, F_SF, s5); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } void emit_shld16c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, uint32_t c, int s3, int s4, int s5) { - c&=0x1f; + c &= 0x1f; CLEAR_FLAGS(); - IFX(X_PEND) { + IFX (X_PEND) { if (c) { MOV64x(s3, c); SH(s3, xEmu, offsetof(x64emu_t, op2)); - } else SH(xZR, xEmu, offsetof(x64emu_t, op2)); + } else + SH(xZR, xEmu, offsetof(x64emu_t, op2)); SH(s1, xEmu, offsetof(x64emu_t, op1)); SET_DF(s4, d_shld16); } else IFXORNAT (X_ALL) { SET_DFNONE(); } - if(!c) { - IFX(X_PEND) { + if (!c) { + IFX (X_PEND) { SH(s1, xEmu, offsetof(x64emu_t, res)); } return; @@ -1517,16 +1523,16 @@ void emit_shld16c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, uin SLLI(s5, s2, 16); OR(s1, s1, s5); - IFX(X_CF) { + IFX (X_CF) { if (c < 16) { - SRLI(s3, s1, 16-c); + SRLI(s3, s1, 16 - c); } else { - SRLI(s3, s2, 32-c); + SRLI(s3, s2, 32 - c); } ANDI(s5, s3, 1); // LSB == F_CF OR(xFlags, xFlags, s5); } - IFX(X_OF) { + IFX (X_OF) { // Store sign for later use. if (c == 1) SRLI(s5, s1, 15); } @@ -1541,12 +1547,12 @@ void emit_shld16c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, uin ZEXTH(s1, s1); if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s1, xZR); - IFX(X_PEND) { + IFX (X_PEND) { SH(s1, xEmu, offsetof(x64emu_t, res)); } - IFX(X_OF) { + IFX (X_OF) { // the OF flag is set if a sign change occurred - if(c==1) { + if (c == 1) { SRLI(s3, s1, 15); XOR(s3, s3, s5); ANDI(s3, s3, 1); @@ -1561,7 +1567,7 @@ void emit_shld16c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, uin IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s3); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } } diff --git a/src/dynarec/rv64/dynarec_rv64_emit_tests.c b/src/dynarec/rv64/dynarec_rv64_emit_tests.c index 4053c15d..7c276f7d 100644 --- a/src/dynarec/rv64/dynarec_rv64_emit_tests.c +++ b/src/dynarec/rv64/dynarec_rv64_emit_tests.c @@ -33,7 +33,7 @@ void emit_cmp8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, i SET_DFNONE(); } - IFX(X_AF | X_CF | X_OF) { + IFX (X_AF | X_CF | X_OF) { // for later flag calculation NOT(s5, s1); } @@ -46,16 +46,16 @@ void emit_cmp8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, i } IFX (X_ALL) ANDI(s6, s6, 0xff); - IFX(X_SF) { + IFX (X_SF) { SRLI(s3, s6, 7); SET_FLAGS_NEZ(s3, F_SF, s4); } CALC_SUB_FLAGS(s5, s2, s6, s3, s4, 8); - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s6, F_ZF, s4); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s6, s3, s4); } @@ -87,14 +87,14 @@ void emit_cmp8_0(dynarec_rv64_t* dyn, int ninst, int s1, int s3, int s4) SET_DFNONE(); } - IFX(X_SF) { + IFX (X_SF) { SRLI(s3, s1, 7); SET_FLAGS_NEZ(s3, F_SF, s4); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s4); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } NAT_FLAGS_ENABLE_CARRY(); @@ -122,7 +122,7 @@ void emit_cmp16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, SET_DFNONE(); } - IFX(X_AF | X_CF | X_OF) { + IFX (X_AF | X_CF | X_OF) { // for later flag calculation NOT(s5, s1); } @@ -135,16 +135,16 @@ void emit_cmp16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, } IFX (X_ALL) ZEXTH(s6, s6); - IFX(X_SF) { + IFX (X_SF) { SRLI(s3, s6, 15); SET_FLAGS_NEZ(s3, F_SF, s4); } CALC_SUB_FLAGS(s5, s2, s6, s3, s4, 16); - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s6, F_ZF, s4); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s6, s3, s4); } @@ -175,14 +175,14 @@ void emit_cmp16_0(dynarec_rv64_t* dyn, int ninst, int s1, int s3, int s4) } else { SET_DFNONE(); } - IFX(X_SF) { + IFX (X_SF) { SRLI(s3, s1, 15); SET_FLAGS_NEZ(s3, F_SF, s4); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s4); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } @@ -206,12 +206,12 @@ void emit_cmp32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s IFX_PENDOR0 { SDxw(s1, xEmu, offsetof(x64emu_t, op1)); SDxw(s2, xEmu, offsetof(x64emu_t, op2)); - SET_DF(s4, rex.w?d_cmp64:d_cmp32); + SET_DF(s4, rex.w ? d_cmp64 : d_cmp32); } else { SET_DFNONE(); } - IFX(X_AF | X_CF | X_OF) { + IFX (X_AF | X_CF | X_OF) { // for later flag calculation NOT(s5, s1); } @@ -223,17 +223,17 @@ void emit_cmp32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int s SUBxw(s6, s1, s2); } - IFX(X_SF) { + IFX (X_SF) { SET_FLAGS_LTZ(s6, F_SF, s3, s4); } IFX (X_AF | X_CF | X_OF | X_ZF | X_PF) { if (!rex.w) ZEROUP(s6); } - CALC_SUB_FLAGS(s5, s2, s6, s3, s4, rex.w?64:32); - IFX(X_ZF) { + CALC_SUB_FLAGS(s5, s2, s6, s3, s4, rex.w ? 64 : 32); + IFX (X_ZF) { SET_FLAGS_EQZ(s6, F_ZF, s4); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s6, s3, s4); } NAT_FLAGS_ENABLE_CARRY(); @@ -262,12 +262,12 @@ void emit_cmp32_0(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s3, int SD(s1, xEmu, offsetof(x64emu_t, op1)); SD(xZR, xEmu, offsetof(x64emu_t, op2)); SD(s1, xEmu, offsetof(x64emu_t, res)); - SET_DF(s4, rex.w?d_cmp64:d_cmp32); + SET_DF(s4, rex.w ? d_cmp64 : d_cmp32); } else { SET_DFNONE(); } - IFX(X_SF) { + IFX (X_SF) { if (rex.w) { SET_FLAGS_LTZ(s1, F_SF, s3, s4); } else { @@ -275,10 +275,10 @@ void emit_cmp32_0(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s3, int SET_FLAGS_NEZ(s3, F_SF, s4); } } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s1, F_ZF, s3); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s1, s3, s4); } NAT_FLAGS_ENABLE_CARRY(); @@ -315,14 +315,14 @@ void emit_test8(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s3, xZR); - IFX(X_SF) { + IFX (X_SF) { SRLI(s4, s3, 7); SET_FLAGS_NEZ(s4, F_SF, s5); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s3, F_ZF, s5); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s3, s4, s5); } @@ -351,14 +351,14 @@ void emit_test16(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int s4, if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s3, xZR); - IFX(X_SF) { + IFX (X_SF) { SRLI(s4, s3, 15); SET_FLAGS_NEZ(s4, F_SF, s5); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s3, F_ZF, s5); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s3, s4, s5); } @@ -374,7 +374,7 @@ void emit_test32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int { CLEAR_FLAGS(); IFX_PENDOR0 { - SET_DF(s3, rex.w?d_tst64:d_tst32); + SET_DF(s3, rex.w ? d_tst64 : d_tst32); } else { SET_DFNONE(); } @@ -393,14 +393,14 @@ void emit_test32(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int s2, int if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s3, xZR); - IFX(X_SF) { + IFX (X_SF) { SRLI(s4, s3, rex.w ? 63 : 31); SET_FLAGS_NEZ(s4, F_SF, s5); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s3, F_ZF, s5); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s3, s4, s5); } @@ -418,7 +418,7 @@ void emit_test32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int64_t c, { CLEAR_FLAGS(); IFX_PENDOR0 { - SET_DF(s3, rex.w?d_tst64:d_tst32); + SET_DF(s3, rex.w ? d_tst64 : d_tst32); } else { SET_DFNONE(); } @@ -439,14 +439,14 @@ void emit_test32c(dynarec_rv64_t* dyn, int ninst, rex_t rex, int s1, int64_t c, if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(s3, xZR); - IFX(X_SF) { + IFX (X_SF) { SRLI(s4, s3, rex.w ? 63 : 31); SET_FLAGS_NEZ(s4, F_SF, s5); } - IFX(X_ZF) { + IFX (X_ZF) { SET_FLAGS_EQZ(s3, F_ZF, s5); } - IFX(X_PF) { + IFX (X_PF) { emit_pf(dyn, ninst, s3, s4, s5); } diff --git a/src/dynarec/rv64/dynarec_rv64_f0.c b/src/dynarec/rv64/dynarec_rv64_f0.c index 6b54d9ce..26664a03 100644 --- a/src/dynarec/rv64/dynarec_rv64_f0.c +++ b/src/dynarec/rv64/dynarec_rv64_f0.c @@ -24,7 +24,9 @@ uintptr_t dynarec64_F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog) { - (void)ip; (void)rep; (void)need_epilog; + (void)ip; + (void)rep; + (void)need_epilog; uint8_t opcode = F8; uint8_t nextop; @@ -42,8 +44,8 @@ uintptr_t dynarec64_F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni MAYUSE(wb2); MAYUSE(j64); - while((opcode==0xF2) || (opcode==0xF3)) { - rep = opcode-0xF1; + while ((opcode == 0xF2) || (opcode == 0xF3)) { + rep = opcode - 0xF1; opcode = F8; } @@ -52,15 +54,15 @@ uintptr_t dynarec64_F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni // TODO: Add support for unaligned memory access for all the LOCK ones. // TODO: Add support for BOX4_DYNAREC_ALIGNED_ATOMICS. - switch(opcode) { + switch (opcode) { case 0x01: INST_NAME("LOCK ADD Ed, Gd"); SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); nextop = F8; GETGD; SMDMB(); - if((nextop&0xC0)==0xC0) { - ed = xRAX+(nextop&7)+(rex.b<<3); + if ((nextop & 0xC0) == 0xC0) { + ed = TO_NAT((nextop & 7) + (rex.b << 3)); emit_add32(dyn, ninst, rex, ed, gd, x3, x4, x5); } else { addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, LOCK_LOCK, 0, 0); @@ -78,7 +80,7 @@ uintptr_t dynarec64_F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni GETGD; SMDMB(); if (MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); emit_or32(dyn, ninst, rex, ed, gd, x3, x4); } else { addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, LOCK_LOCK, 0, 0); @@ -91,23 +93,23 @@ uintptr_t dynarec64_F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0x0F: nextop = F8; - switch(nextop) { + switch (nextop) { case 0xB0: - switch(rep) { + switch (rep) { case 0: INST_NAME("LOCK CMPXCHG Eb, Gb"); SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_NOFUSION); nextop = F8; ANDI(x6, xRAX, 0xff); // AL SMDMB(); - if(MODREG) { - if(rex.rex) { - wback = xRAX+(nextop&7)+(rex.b<<3); + if (MODREG) { + if (rex.rex) { + wback = TO_NAT((nextop & 7) + (rex.b << 3)); wb2 = 0; } else { - wback = (nextop&7); - wb2 = (wback>>2)*8; - wback = xRAX+(wback&3); + wback = (nextop & 7); + wb2 = (wback >> 2) * 8; + wback = TO_NAT(wback & 3); } if (wb2) { SRLI(x2, wback, wb2); @@ -134,17 +136,17 @@ uintptr_t dynarec64_F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni OR(xRAX, xRAX, x2); B_NEXT_nocond; } else { - if(rex.rex) { - gb1 = xRAX+((nextop&0x38)>>3)+(rex.r<<3); + if (rex.rex) { + gb1 = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)); gb2 = 0; } else { - gd = (nextop&0x38)>>3; - gb2 = ((gd&4)>>2); - gb1 = xRAX+(gd&3); + gd = (nextop & 0x38) >> 3; + gb2 = ((gd & 4) >> 2); + gb1 = TO_NAT(gd & 3); } addr = geted(dyn, addr, ninst, nextop, &wback, x3, x2, &fixedaddress, rex, LOCK_LOCK, 0, 0); ANDI(x5, wback, 0b11); - SLLI(x5, x5, 3); // shamt + SLLI(x5, x5, 3); // shamt MARKLOCK; ANDI(x2, wback, ~0b11); // align to 32bit LWU(x1, x2, 0); @@ -170,7 +172,7 @@ uintptr_t dynarec64_F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni BNEZ_MARKLOCK(x9); // done MARK; - UFLAG_IF {emit_cmp8(dyn, ninst, x6, x4, x1, x2, x3, x5);} + UFLAG_IF { emit_cmp8(dyn, ninst, x6, x4, x1, x2, x3, x5); } // load m8 into AL ANDI(xRAX, xRAX, ~0xff); OR(xRAX, xRAX, x4); @@ -189,9 +191,9 @@ uintptr_t dynarec64_F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; GETGD; if (MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); wback = 0; - UFLAG_IF {emit_cmp32(dyn, ninst, rex, xRAX, ed, x3, x4, x5, x6);} + UFLAG_IF { emit_cmp32(dyn, ninst, rex, xRAX, ed, x3, x4, x5, x6); } MV(x1, ed); // save value SUB(x2, x1, xRAX); BNE_MARK2(x2, xZR); @@ -225,7 +227,7 @@ uintptr_t dynarec64_F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni BNEZ_MARK2(x4); SDxw(gd, wback, 0); MARK; - UFLAG_IF {emit_cmp32(dyn, ninst, rex, xRAX, x1, x3, x4, x5, x6);} + UFLAG_IF { emit_cmp32(dyn, ninst, rex, xRAX, x1, x3, x4, x5, x6); } MVxw(xRAX, x1); SMDMB(); } @@ -235,15 +237,15 @@ uintptr_t dynarec64_F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni } break; case 0xC1: - switch(rep) { + switch (rep) { case 0: INST_NAME("LOCK XADD Gd, Ed"); SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); nextop = F8; GETGD; SMDMB(); - if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + if (MODREG) { + ed = TO_NAT((nextop & 7) + (rex.b << 3)); MVxw(x1, ed); MVxw(ed, gd); MVxw(gd, x1); @@ -265,7 +267,7 @@ uintptr_t dynarec64_F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni break; case 0xC7: - switch(rep) { + switch (rep) { case 0: if (rex.w) { INST_NAME("LOCK CMPXCHG16B Gq, Eq"); @@ -278,7 +280,7 @@ uintptr_t dynarec64_F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni SETFLAGS(X_ZF, SF_SUBSET, NAT_FLAGS_NOFUSION); nextop = F8; addr = geted(dyn, addr, ninst, nextop, &wback, x1, x2, &fixedaddress, rex, LOCK_LOCK, 0, 0); - ANDI(xFlags, xFlags, ~(1<<F_ZF)); + ANDI(xFlags, xFlags, ~(1 << F_ZF)); if (rex.w) { // there is no atomic move on 16bytes, so implement it with mutex LD(x9, xEmu, offsetof(x64emu_t, context)); @@ -298,7 +300,7 @@ uintptr_t dynarec64_F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni SC_D(x5, xRBX, wback, 1, 1); BNEZ_MARKLOCK(x5); SD(xRCX, wback, 8); - ORI(xFlags, xFlags, 1<<F_ZF); + ORI(xFlags, xFlags, 1 << F_ZF); B_MARK3_nocond; MARK; MV(xRAX, x2); @@ -321,7 +323,7 @@ uintptr_t dynarec64_F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni BNE_MARK(x2, x3); // EDX_EAX != Ed SC_D(x5, x4, wback, 1, 1); BNEZ_MARKLOCK(x5); - ORI(xFlags, xFlags, 1<<F_ZF); + ORI(xFlags, xFlags, 1 << F_ZF); B_MARK3_nocond; MARK; SLLI(xRDX, x2, 32); @@ -346,21 +348,21 @@ uintptr_t dynarec64_F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; GETGB(x2); SMDMB(); - if((nextop&0xC0)==0xC0) { - if(rex.rex) { - wback = xRAX + (nextop&7) + (rex.b<<3); + if ((nextop & 0xC0) == 0xC0) { + if (rex.rex) { + wback = TO_NAT((nextop & 7) + (rex.b << 3)); wb2 = 0; } else { - wback = (nextop&7); - wb2 = (wback>>2); - wback = xRAX+(wback&3); + wback = (nextop & 7); + wb2 = (wback >> 2); + wback = TO_NAT(wback & 3); } - SRLIW(x1, wback, wb2*8); + SRLIW(x1, wback, wb2 * 8); ANDI(x1, x1, 0xFF); emit_adc8(dyn, ninst, x1, x2, x3, x4, x5); SLLI(x5, x1, wb2 * 8); MOV_U12(x3, 0xFF); - SLLI(x3, x3, wb2*8); + SLLI(x3, x3, wb2 * 8); NOT(x3, x3); AND(wback, wback, x3); OR(wback, wback, x5); @@ -370,11 +372,11 @@ uintptr_t dynarec64_F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni BNEZ_MARK(x3); MARKLOCK; LR_W(x5, wback, 1, 1); - ANDI(x4, x5, 0xff); // x4 = Ed.b[0] + ANDI(x4, x5, 0xff); // x4 = Ed.b[0] ANDI(x5, x5, ~0xff); // x5 = clear Ed.b[0] ADDW(x6, x4, x2); ANDI(x9, xFlags, 1 << F_CF); - ADDW(x6, x6, x9); // x6 = adc + ADDW(x6, x6, x9); // x6 = adc ANDI(x6, x6, 0xff); OR(x5, x5, x6); SC_W(x9, x5, wback, 1, 1); @@ -388,19 +390,19 @@ uintptr_t dynarec64_F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni NOT(x5, x4); // x5 = ~mask SLL(x2, x2, x3); // x2 = extented Gb MARK2; - LR_W(x6, wback, 1, 1); // x6 = Ed - AND(x9, x6, x4); // x9 = extended Ed.b[dest] - AND(x6, x6, x5); // x6 = clear Ed.b[dest] + LR_W(x6, wback, 1, 1); // x6 = Ed + AND(x9, x6, x4); // x9 = extended Ed.b[dest] + AND(x6, x6, x5); // x6 = clear Ed.b[dest] ADDW(x5, x9, x2); ANDI(x4, xFlags, 1 << F_CF); - SLL(x4, x4, x3); // extented - ADDW(x5, x5, x4); // x5 = adc + SLL(x4, x4, x3); // extented + ADDW(x5, x5, x4); // x5 = adc OR(x5, x5, x6); SC_W(x4, x5, wback, 1, 1); BNEZ_MARK2(x4); IFXORNAT (X_ALL | X_PEND) { - SRLI(x2, x2, x3); // Gb - SRLI(x4, x9, x3); // Eb + SRLI(x2, x2, x3); // Gb + SRLI(x4, x9, x3); // Eb } MARK3; IFXORNAT (X_ALL | X_PEND) { @@ -416,8 +418,8 @@ uintptr_t dynarec64_F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; GETGD; SMDMB(); - if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + if (MODREG) { + ed = TO_NAT((nextop & 7) + (rex.b << 3)); emit_adc32(dyn, ninst, rex, ed, gd, x3, x4, x5, x6); } else { addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, LOCK_LOCK, 0, 0); @@ -440,8 +442,8 @@ uintptr_t dynarec64_F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; GETGD; SMDMB(); - if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + if (MODREG) { + ed = TO_NAT((nextop & 7) + (rex.b << 3)); emit_and32(dyn, ninst, rex, ed, gd, x3, x4); } else { addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, LOCK_LOCK, 0, 0); @@ -457,8 +459,8 @@ uintptr_t dynarec64_F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni nextop = F8; GETGD; SMDMB(); - if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + if (MODREG) { + ed = TO_NAT((nextop & 7) + (rex.b << 3)); emit_sub32(dyn, ninst, rex, ed, gd, x3, x4, x5); } else { addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, LOCK_LOCK, 0, 0); @@ -475,11 +477,11 @@ uintptr_t dynarec64_F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0x80: nextop = F8; SMDMB(); - switch((nextop>>3)&7) { + switch ((nextop >> 3) & 7) { case 1: // OR INST_NAME("LOCK OR Eb, Ib"); SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - if(MODREG) { + if (MODREG) { GETEB(x1, 1); u8 = F8; emit_or8c(dyn, ninst, x1, u8, x2, x4, x5); @@ -491,7 +493,7 @@ uintptr_t dynarec64_F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni SLLI(x2, x2, 3); // offset in bits ANDI(x3, wback, ~3); // aligned addr ADDI(x1, xZR, u8); - SLL(x1, x1, x2); // Ib << offset + SLL(x1, x1, x2); // Ib << offset AMOORxw(x4, x1, x3, 1, 1); IFXORNAT (X_ALL | X_PEND) { SRL(x1, x4, x2); @@ -509,21 +511,24 @@ uintptr_t dynarec64_F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni case 0x83: nextop = F8; SMDMB(); - switch((nextop>>3)&7) { + switch ((nextop >> 3) & 7) { case 0: // ADD - if(opcode==0x81) { + if (opcode == 0x81) { INST_NAME("LOCK ADD Ed, Id"); } else { INST_NAME("LOCK ADD Ed, Ib"); } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - if(MODREG) { - if(opcode==0x81) i64 = F32S; else i64 = F8S; - ed = xRAX+(nextop&7)+(rex.b<<3); + if (MODREG) { + if (opcode == 0x81) + i64 = F32S; + else + i64 = F8S; + ed = TO_NAT((nextop & 7) + (rex.b << 3)); emit_add32c(dyn, ninst, rex, ed, i64, x3, x4, x5, x6); } else { SMDMB(); - addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, LOCK_LOCK, 0, (opcode==0x81)?4:1); + addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, LOCK_LOCK, 0, (opcode == 0x81) ? 4 : 1); if (opcode == 0x81) i64 = F32S; else @@ -551,18 +556,21 @@ uintptr_t dynarec64_F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni } break; case 1: // OR - if(opcode==0x81) { + if (opcode == 0x81) { INST_NAME("LOCK OR Ed, Id"); } else { INST_NAME("LOCK OR Ed, Ib"); } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - if(MODREG) { - if(opcode==0x81) i64 = F32S; else i64 = F8S; - ed = xRAX+(nextop&7)+(rex.b<<3); + if (MODREG) { + if (opcode == 0x81) + i64 = F32S; + else + i64 = F8S; + ed = TO_NAT((nextop & 7) + (rex.b << 3)); emit_or32c(dyn, ninst, rex, ed, i64, x3, x4); } else { - addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, LOCK_LOCK, 0, (opcode==0x81)?4:1); + addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, LOCK_LOCK, 0, (opcode == 0x81) ? 4 : 1); if (opcode == 0x81) i64 = F32S; else @@ -574,18 +582,21 @@ uintptr_t dynarec64_F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni } break; case 4: // AND - if(opcode==0x81) { + if (opcode == 0x81) { INST_NAME("LOCK AND Ed, Id"); } else { INST_NAME("LOCK AND Ed, Ib"); } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - if(MODREG) { - if(opcode==0x81) i64 = F32S; else i64 = F8S; - ed = xRAX+(nextop&7)+(rex.b<<3); + if (MODREG) { + if (opcode == 0x81) + i64 = F32S; + else + i64 = F8S; + ed = TO_NAT((nextop & 7) + (rex.b << 3)); emit_and32c(dyn, ninst, rex, ed, i64, x3, x4); } else { - addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, LOCK_LOCK, 0, (opcode==0x81)?4:1); + addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, LOCK_LOCK, 0, (opcode == 0x81) ? 4 : 1); if (opcode == 0x81) i64 = F32S; else @@ -597,18 +608,21 @@ uintptr_t dynarec64_F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni } break; case 5: // SUB - if(opcode==0x81) { + if (opcode == 0x81) { INST_NAME("LOCK SUB Ed, Id"); } else { INST_NAME("LOCK SUB Ed, Ib"); } SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); - if(MODREG) { - if(opcode==0x81) i64 = F32S; else i64 = F8S; - ed = xRAX+(nextop&7)+(rex.b<<3); + if (MODREG) { + if (opcode == 0x81) + i64 = F32S; + else + i64 = F8S; + ed = TO_NAT((nextop & 7) + (rex.b << 3)); emit_sub32c(dyn, ninst, rex, ed, i64, x3, x4, x5, x6); } else { - addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, LOCK_LOCK, 0, (opcode==0x81)?4:1); + addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, LOCK_LOCK, 0, (opcode == 0x81) ? 4 : 1); if (opcode == 0x81) i64 = F32S; else @@ -648,7 +662,7 @@ uintptr_t dynarec64_F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni i64 = F32S; else i64 = F8S; - ed = xRAX + (nextop & 7) + (rex.b << 3); + ed = TO_NAT((nextop & 7) + (rex.b << 3)); emit_xor32c(dyn, ninst, rex, ed, i64, x3, x4); } else { addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, LOCK_LOCK, 0, (opcode == 0x81) ? 4 : 1); @@ -700,10 +714,10 @@ uintptr_t dynarec64_F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni break; case 0xF6: nextop = F8; - switch((nextop>>3)&7) { + switch ((nextop >> 3) & 7) { case 2: INST_NAME("LOCK NOT Eb"); - if(MODREG) { + if (MODREG) { GETEB(x1, 0); NOT(x1, x1); EBBACK(x5, 1); @@ -725,14 +739,13 @@ uintptr_t dynarec64_F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni break; case 0xFF: nextop = F8; - switch((nextop>>3)&7) - { + switch ((nextop >> 3) & 7) { case 0: // INC Ed INST_NAME("LOCK INC Ed"); SETFLAGS(X_ALL & ~X_CF, SF_SUBSET_PENDING, NAT_FLAGS_FUSION); SMDMB(); - if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + if (MODREG) { + ed = TO_NAT((nextop & 7) + (rex.b << 3)); emit_inc32(dyn, ninst, rex, ed, x3, x4, x5, x6); } else { addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, LOCK_LOCK, 0, 0); @@ -749,8 +762,8 @@ uintptr_t dynarec64_F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni INST_NAME("LOCK DEC Ed"); SETFLAGS(X_ALL & ~X_CF, SF_SUBSET_PENDING, NAT_FLAGS_FUSION); SMDMB(); - if(MODREG) { - ed = xRAX+(nextop&7)+(rex.b<<3); + if (MODREG) { + ed = TO_NAT((nextop & 7) + (rex.b << 3)); emit_dec32(dyn, ninst, rex, ed, x3, x4, x5, x6); } else { addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, LOCK_LOCK, 0, 0); diff --git a/src/dynarec/rv64/dynarec_rv64_f20f.c b/src/dynarec/rv64/dynarec_rv64_f20f.c index 6031d97d..3fbac305 100644 --- a/src/dynarec/rv64/dynarec_rv64_f20f.c +++ b/src/dynarec/rv64/dynarec_rv64_f20f.c @@ -23,7 +23,8 @@ uintptr_t dynarec64_F20F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int* ok, int* need_epilog) { - (void)ip; (void)need_epilog; + (void)ip; + (void)need_epilog; uint8_t opcode = F8; uint8_t nextop; @@ -44,14 +45,14 @@ uintptr_t dynarec64_F20F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int MAYUSE(v0); MAYUSE(v1); - switch(opcode) { + switch (opcode) { case 0x10: INST_NAME("MOVSD Gx, Ex"); nextop = F8; GETG; - if(MODREG) { - ed = (nextop&7)+ (rex.b<<3); + if (MODREG) { + ed = (nextop & 7) + (rex.b << 3); v0 = sse_get_reg(dyn, ninst, x1, gd, 0); d0 = sse_get_reg(dyn, ninst, x1, ed, 0); FMVD(v0, d0); @@ -61,7 +62,7 @@ uintptr_t dynarec64_F20F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int addr = geted(dyn, addr, ninst, nextop, &ed, x1, x2, &fixedaddress, rex, NULL, 8, 0); FLD(v0, ed, fixedaddress); // reset upper part - SD(xZR, xEmu, offsetof(x64emu_t, xmm[gd])+8); + SD(xZR, xEmu, offsetof(x64emu_t, xmm[gd]) + 8); } break; case 0x11: @@ -69,8 +70,8 @@ uintptr_t dynarec64_F20F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int nextop = F8; GETG; v0 = sse_get_reg(dyn, ninst, x1, gd, 0); - if(MODREG) { - ed = (nextop&7)+ (rex.b<<3); + if (MODREG) { + ed = (nextop & 7) + (rex.b << 3); d0 = sse_get_reg(dyn, ninst, x1, ed, 0); FMVD(d0, v0); } else { @@ -84,16 +85,16 @@ uintptr_t dynarec64_F20F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int nextop = F8; GETGX(); GETEX(x2, 0, 1); - LD(x3, wback, fixedaddress+0); - SD(x3, gback, gdoffset+0); - SD(x3, gback, gdoffset+8); + LD(x3, wback, fixedaddress + 0); + SD(x3, gback, gdoffset + 0); + SD(x3, gback, gdoffset + 8); break; case 0x2A: INST_NAME("CVTSI2SD Gx, Ed"); nextop = F8; GETGXSD(v0); GETED(0); - if(rex.w) { + if (rex.w) { FCVTDL(v0, ed, RD_RNE); } else { FCVTDW(v0, ed, RD_RNE); @@ -104,16 +105,16 @@ uintptr_t dynarec64_F20F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int nextop = F8; GETGD; GETEXSD(v0, 0); - if(!box64_dynarec_fastround) { + if (!box64_dynarec_fastround) { FSFLAGSI(0); // reset all bits } FCVTLDxw(gd, v0, RD_RTZ); if (!rex.w) ZEROUP(gd); - if(!box64_dynarec_fastround) { + if (!box64_dynarec_fastround) { FRFLAGS(x5); // get back FPSR to check the IOC bit ANDI(x5, x5, (1 << FR_NV) | (1 << FR_OF)); CBZ_NEXT(x5); - if(rex.w) { + if (rex.w) { MOV64x(gd, 0x8000000000000000LL); } else { MOV32w(gd, 0x80000000); @@ -125,29 +126,29 @@ uintptr_t dynarec64_F20F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int nextop = F8; GETGD; GETEXSD(v0, 0); - if(!box64_dynarec_fastround) { - FSFLAGSI(0); // // reset all bits + if (!box64_dynarec_fastround) { + FSFLAGSI(0); // // reset all bits } u8 = sse_setround(dyn, ninst, x2, x3); FCVTLDxw(gd, v0, RD_DYN); if (!rex.w) ZEROUP(gd); x87_restoreround(dyn, ninst, u8); - if(!box64_dynarec_fastround) { - FRFLAGS(x5); // get back FPSR to check the IOC bit + if (!box64_dynarec_fastround) { + FRFLAGS(x5); // get back FPSR to check the IOC bit ANDI(x5, x5, (1 << FR_NV) | (1 << FR_OF)); CBZ_NEXT(x5); - if(rex.w) { + if (rex.w) { MOV64x(gd, 0x8000000000000000LL); } else { MOV32w(gd, 0x80000000); } } break; - case 0x38: // these are some more SSSE4.2+ opcodes + case 0x38: // these are some more SSSE4.2+ opcodes opcode = F8; - switch(opcode) { + switch (opcode) { - case 0xF0: // CRC32 Gd, Eb + case 0xF0: // CRC32 Gd, Eb INST_NAME("CRC32 Gd, Eb"); nextop = F8; GETEB(x1, 0); @@ -155,27 +156,27 @@ uintptr_t dynarec64_F20F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int XOR(gd, gd, ed); MOV32w(x2, 0x82f63b78); for (int i = 0; i < 8; i++) { - SRLI((i&1)?gd:x4, (i&1)?x4:gd, 1); - ANDI(x6, (i&1)?x4:gd, 1); - BEQZ(x6, 4+4); - XOR((i&1)?gd:x4, (i&1)?gd:x4, x2); + SRLI((i & 1) ? gd : x4, (i & 1) ? x4 : gd, 1); + ANDI(x6, (i & 1) ? x4 : gd, 1); + BEQZ(x6, 4 + 4); + XOR((i & 1) ? gd : x4, (i & 1) ? gd : x4, x2); } break; - case 0xF1: // CRC32 Gd, Ed + case 0xF1: // CRC32 Gd, Ed INST_NAME("CRC32 Gd, Ed"); nextop = F8; GETGD; GETED(0); MOV32w(x2, 0x82f63b78); - for(int j=0; j<4*(rex.w+1); ++j) { - SRLI(x5, ed, 8*j); + for (int j = 0; j < 4 * (rex.w + 1); ++j) { + SRLI(x5, ed, 8 * j); ANDI(x3, x5, 0xFF); XOR(gd, gd, x3); for (int i = 0; i < 8; i++) { - SRLI((i&1)?gd:x4, (i&1)?x4:gd, 1); - ANDI(x6, (i&1)?x4:gd, 1); - BEQZ(x6, 4+4); - XOR((i&1)?gd:x4, (i&1)?gd:x4, x2); + SRLI((i & 1) ? gd : x4, (i & 1) ? x4 : gd, 1); + ANDI(x6, (i & 1) ? x4 : gd, 1); + BEQZ(x6, 4 + 4); + XOR((i & 1) ? gd : x4, (i & 1) ? gd : x4, x2); } } break; @@ -188,13 +189,13 @@ uintptr_t dynarec64_F20F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int nextop = F8; GETEXSD(d0, 0); GETGXSD_empty(d1); - if(!box64_dynarec_fastnan) { - v0 = fpu_get_scratch(dyn); // need a scratch in case d0 == d1 + if (!box64_dynarec_fastnan) { + v0 = fpu_get_scratch(dyn); // need a scratch in case d0 == d1 FMVDX(v0, xZR); FLTD(x3, d0, v0); } FSQRTD(d1, d0); - if(!box64_dynarec_fastnan) { + if (!box64_dynarec_fastnan) { BEQ(x3, xZR, 8); FNEGD(d1, d1); } @@ -204,12 +205,12 @@ uintptr_t dynarec64_F20F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int nextop = F8; GETGXSD(v0); GETEXSD(v1, 0); - if(!box64_dynarec_fastnan) { + if (!box64_dynarec_fastnan) { FEQD(x3, v0, v0); FEQD(x4, v1, v1); } FADDD(v0, v0, v1); - if(!box64_dynarec_fastnan) { + if (!box64_dynarec_fastnan) { AND(x3, x3, x4); BNEZ_MARK(x3); CBNZ_NEXT(x4); @@ -226,12 +227,12 @@ uintptr_t dynarec64_F20F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int nextop = F8; GETGXSD(v0); GETEXSD(v1, 0); - if(!box64_dynarec_fastnan) { + if (!box64_dynarec_fastnan) { FEQD(x3, v0, v0); FEQD(x4, v1, v1); } FMULD(v0, v0, v1); - if(!box64_dynarec_fastnan) { + if (!box64_dynarec_fastnan) { AND(x3, x3, x4); BNEZ_MARK(x3); CBNZ_NEXT(x4); @@ -261,12 +262,12 @@ uintptr_t dynarec64_F20F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int nextop = F8; GETGXSD(v0); GETEXSD(v1, 0); - if(!box64_dynarec_fastnan) { + if (!box64_dynarec_fastnan) { FEQD(x3, v0, v0); FEQD(x4, v1, v1); } FSUBD(v0, v0, v1); - if(!box64_dynarec_fastnan) { + if (!box64_dynarec_fastnan) { AND(x3, x3, x4); BNEZ_MARK(x3); CBNZ_NEXT(x4); @@ -298,12 +299,12 @@ uintptr_t dynarec64_F20F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int nextop = F8; GETGXSD(v0); GETEXSD(v1, 0); - if(!box64_dynarec_fastnan) { + if (!box64_dynarec_fastnan) { FEQD(x3, v0, v0); FEQD(x4, v1, v1); } FDIVD(v0, v0, v1); - if(!box64_dynarec_fastnan) { + if (!box64_dynarec_fastnan) { AND(x3, x3, x4); BNEZ_MARK(x3); CBNZ_NEXT(x4); @@ -338,23 +339,23 @@ uintptr_t dynarec64_F20F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int u8 = F8; int32_t idx; - idx = (u8>>(0*2))&3; - LHU(x3, wback, fixedaddress+idx*2); - idx = (u8>>(1*2))&3; - LHU(x4, wback, fixedaddress+idx*2); - idx = (u8>>(2*2))&3; - LHU(x5, wback, fixedaddress+idx*2); - idx = (u8>>(3*2))&3; - LHU(x6, wback, fixedaddress+idx*2); + idx = (u8 >> (0 * 2)) & 3; + LHU(x3, wback, fixedaddress + idx * 2); + idx = (u8 >> (1 * 2)) & 3; + LHU(x4, wback, fixedaddress + idx * 2); + idx = (u8 >> (2 * 2)) & 3; + LHU(x5, wback, fixedaddress + idx * 2); + idx = (u8 >> (3 * 2)) & 3; + LHU(x6, wback, fixedaddress + idx * 2); - SH(x3, gback, gdoffset+0*2); - SH(x4, gback, gdoffset+1*2); - SH(x5, gback, gdoffset+2*2); - SH(x6, gback, gdoffset+3*2); + SH(x3, gback, gdoffset + 0 * 2); + SH(x4, gback, gdoffset + 1 * 2); + SH(x5, gback, gdoffset + 2 * 2); + SH(x6, gback, gdoffset + 3 * 2); - if (!(MODREG && (gd==ed))) { - LD(x3, wback, fixedaddress+8); - SD(x3, gback, gdoffset+8); + if (!(MODREG && (gd == ed))) { + LD(x3, wback, fixedaddress + 8); + SD(x3, gback, gdoffset + 8); } break; case 0x7C: @@ -399,9 +400,9 @@ uintptr_t dynarec64_F20F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int GETGXSD(d0); GETEXSD(d1, 1); u8 = F8; - if ((u8&7) == 0) { // Equal + if ((u8 & 7) == 0) { // Equal FEQD(x2, d0, d1); - } else if ((u8&7) == 4) { // Not Equal or unordered + } else if ((u8 & 7) == 4) { // Not Equal or unordered FEQD(x2, d0, d1); XORI(x2, x2, 1); } else { @@ -410,27 +411,33 @@ uintptr_t dynarec64_F20F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int FEQD(x2, d1, d1); AND(x2, x2, x3); - switch(u8&7) { - case 1: BEQ_MARK(x2, xZR); FLTD(x2, d0, d1); break; // Less than - case 2: BEQ_MARK(x2, xZR); FLED(x2, d0, d1); break; // Less or equal - case 3: XORI(x2, x2, 1); break; // NaN - case 5: { // Greater or equal or unordered - BEQ_MARK2(x2, xZR); - FLED(x2, d1, d0); - B_MARK_nocond; - break; - } - case 6: { // Greater or unordered, test inverted, N!=V so unordered or less than (inverted) - BEQ_MARK2(x2, xZR); - FLTD(x2, d1, d0); - B_MARK_nocond; - break; - } - case 7: break; // Not NaN + switch (u8 & 7) { + case 1: + BEQ_MARK(x2, xZR); + FLTD(x2, d0, d1); + break; // Less than + case 2: + BEQ_MARK(x2, xZR); + FLED(x2, d0, d1); + break; // Less or equal + case 3: XORI(x2, x2, 1); break; // NaN + case 5: { // Greater or equal or unordered + BEQ_MARK2(x2, xZR); + FLED(x2, d1, d0); + B_MARK_nocond; + break; + } + case 6: { // Greater or unordered, test inverted, N!=V so unordered or less than (inverted) + BEQ_MARK2(x2, xZR); + FLTD(x2, d1, d0); + B_MARK_nocond; + break; + } + case 7: break; // Not NaN } MARK2; - if ((u8&7) == 5 || (u8&7) == 6) { + if ((u8 & 7) == 5 || (u8 & 7) == 6) { MOV32w(x2, 1); } MARK; @@ -476,16 +483,16 @@ uintptr_t dynarec64_F20F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int GETEX(x2, 0, 8); d0 = fpu_get_scratch(dyn); u8 = sse_setround(dyn, ninst, x6, x4); - for (int i=0; i<2 ; ++i) { - FLD(d0, wback, fixedaddress+8*i); + for (int i = 0; i < 2; ++i) { + FLD(d0, wback, fixedaddress + 8 * i); FCVTLD(x3, d0, RD_DYN); SEXT_W(x5, x3); BEQ(x5, x3, 8); LUI(x3, 0x80000); // INT32_MIN - SW(x3, gback, gdoffset+4*i); + SW(x3, gback, gdoffset + 4 * i); } x87_restoreround(dyn, ninst, u8); - SD(xZR, gback, gdoffset+8); + SD(xZR, gback, gdoffset + 8); break; case 0xF0: INST_NAME("LDDQU Gx,Ex"); diff --git a/src/dynarec/rv64/dynarec_rv64_functions.c b/src/dynarec/rv64/dynarec_rv64_functions.c index 863607b5..22dda2ef 100644 --- a/src/dynarec/rv64/dynarec_rv64_functions.c +++ b/src/dynarec/rv64/dynarec_rv64_functions.c @@ -28,14 +28,14 @@ #include "bridge.h" #include "rv64_lock.h" -#define XMM0 0 -#define X870 XMM0+16 -#define EMM0 XMM0+16 +#define XMM0 0 +#define X870 XMM0 + 16 +#define EMM0 XMM0 + 16 // Get a FPU scratch reg int fpu_get_scratch(dynarec_rv64_t* dyn) { - return SCRATCH0 + dyn->e.fpu_scratch++; // return an Sx + return SCRATCH0 + dyn->e.fpu_scratch++; // return an Sx } // Get a FPU scratch reg aligned to LMUL @@ -55,12 +55,13 @@ void fpu_reset_scratch(dynarec_rv64_t* dyn) // Get a x87 double reg int fpu_get_reg_x87(dynarec_rv64_t* dyn, int t, int n) { - int i=X870; - while (dyn->e.fpuused[i]) ++i; + int i = X870; + while (dyn->e.fpuused[i]) + ++i; dyn->e.fpuused[i] = 1; dyn->e.extcache[i].n = n; dyn->e.extcache[i].t = t; - dyn->e.news |= (1<<i); + dyn->e.news |= (1 << i); return EXTREG(i); // return a Dx } // Free a FPU reg @@ -153,9 +154,9 @@ int extcache_get_current_st(dynarec_rv64_t* dyn, int ninst, int a) int extcache_get_st_f(dynarec_rv64_t* dyn, int ninst, int a) { - for(int i=0; i<24; ++i) - if(dyn->insts[ninst].e.extcache[i].t==EXT_CACHE_ST_F - && dyn->insts[ninst].e.extcache[i].n==a) + for (int i = 0; i < 24; ++i) + if (dyn->insts[ninst].e.extcache[i].t == EXT_CACHE_ST_F + && dyn->insts[ninst].e.extcache[i].n == a) return i; return -1; } @@ -171,9 +172,9 @@ int extcache_get_st_f_i64(dynarec_rv64_t* dyn, int ninst, int a) int extcache_get_st_f_noback(dynarec_rv64_t* dyn, int ninst, int a) { - for(int i=0; i<24; ++i) - if(dyn->insts[ninst].e.extcache[i].t==EXT_CACHE_ST_F - && dyn->insts[ninst].e.extcache[i].n==a) + for (int i = 0; i < 24; ++i) + if (dyn->insts[ninst].e.extcache[i].t == EXT_CACHE_ST_F + && dyn->insts[ninst].e.extcache[i].n == a) return i; return -1; } @@ -189,9 +190,9 @@ int extcache_get_st_f_i64_noback(dynarec_rv64_t* dyn, int ninst, int a) int extcache_get_current_st_f(dynarec_rv64_t* dyn, int a) { - for(int i=0; i<24; ++i) - if(dyn->e.extcache[i].t==EXT_CACHE_ST_F - && dyn->e.extcache[i].n==a) + for (int i = 0; i < 24; ++i) + if (dyn->e.extcache[i].t == EXT_CACHE_ST_F + && dyn->e.extcache[i].n == a) return i; return -1; } @@ -209,118 +210,118 @@ static void extcache_promote_double_forward(dynarec_rv64_t* dyn, int ninst, int static void extcache_promote_double_internal(dynarec_rv64_t* dyn, int ninst, int maxinst, int a); static void extcache_promote_double_combined(dynarec_rv64_t* dyn, int ninst, int maxinst, int a) { - if(a == dyn->insts[ninst].e.combined1 || a == dyn->insts[ninst].e.combined2) { - if(a == dyn->insts[ninst].e.combined1) { + if (a == dyn->insts[ninst].e.combined1 || a == dyn->insts[ninst].e.combined2) { + if (a == dyn->insts[ninst].e.combined1) { a = dyn->insts[ninst].e.combined2; } else a = dyn->insts[ninst].e.combined1; int i = extcache_get_st_f_i64_noback(dyn, ninst, a); - //if(box64_dynarec_dump) dynarec_log(LOG_NONE, "extcache_promote_double_combined, ninst=%d combined%c %d i=%d (stack:%d/%d)\n", ninst, (a == dyn->insts[ninst].e.combined2)?'2':'1', a ,i, dyn->insts[ninst].e.stack_push, -dyn->insts[ninst].e.stack_pop); - if(i>=0) { + // if(box64_dynarec_dump) dynarec_log(LOG_NONE, "extcache_promote_double_combined, ninst=%d combined%c %d i=%d (stack:%d/%d)\n", ninst, (a == dyn->insts[ninst].e.combined2)?'2':'1', a ,i, dyn->insts[ninst].e.stack_push, -dyn->insts[ninst].e.stack_pop); + if (i >= 0) { dyn->insts[ninst].e.extcache[i].t = EXT_CACHE_ST_D; - if(!dyn->insts[ninst].e.barrier) - extcache_promote_double_internal(dyn, ninst-1, maxinst, a-dyn->insts[ninst].e.stack_push); + if (!dyn->insts[ninst].e.barrier) + extcache_promote_double_internal(dyn, ninst - 1, maxinst, a - dyn->insts[ninst].e.stack_push); // go forward is combined is not pop'd - if(a-dyn->insts[ninst].e.stack_pop>=0) - if(!dyn->insts[ninst+1].e.barrier) - extcache_promote_double_forward(dyn, ninst+1, maxinst, a-dyn->insts[ninst].e.stack_pop); + if (a - dyn->insts[ninst].e.stack_pop >= 0) + if (!dyn->insts[ninst + 1].e.barrier) + extcache_promote_double_forward(dyn, ninst + 1, maxinst, a - dyn->insts[ninst].e.stack_pop); } } } static void extcache_promote_double_internal(dynarec_rv64_t* dyn, int ninst, int maxinst, int a) { - if(dyn->insts[ninst+1].e.barrier) + if (dyn->insts[ninst + 1].e.barrier) return; - while(ninst>=0) { - a+=dyn->insts[ninst].e.stack_pop; // adjust Stack depth: add pop'd ST (going backward) + while (ninst >= 0) { + a += dyn->insts[ninst].e.stack_pop; // adjust Stack depth: add pop'd ST (going backward) int i = extcache_get_st_f_i64(dyn, ninst, a); - //if(box64_dynarec_dump) dynarec_log(LOG_NONE, "extcache_promote_double_internal, ninst=%d, a=%d st=%d:%d, i=%d\n", ninst, a, dyn->insts[ninst].e.stack, dyn->insts[ninst].e.stack_next, i); - if(i<0) return; + // if(box64_dynarec_dump) dynarec_log(LOG_NONE, "extcache_promote_double_internal, ninst=%d, a=%d st=%d:%d, i=%d\n", ninst, a, dyn->insts[ninst].e.stack, dyn->insts[ninst].e.stack_next, i); + if (i < 0) return; dyn->insts[ninst].e.extcache[i].t = EXT_CACHE_ST_D; // check combined propagation too - if(dyn->insts[ninst].e.combined1 || dyn->insts[ninst].e.combined2) { - if(dyn->insts[ninst].e.swapped) { - //if(box64_dynarec_dump) dynarec_log(LOG_NONE, "extcache_promote_double_internal, ninst=%d swapped %d/%d vs %d with st %d\n", ninst, dyn->insts[ninst].e.combined1 ,dyn->insts[ninst].e.combined2, a, dyn->insts[ninst].e.stack); - if (a==dyn->insts[ninst].e.combined1) + if (dyn->insts[ninst].e.combined1 || dyn->insts[ninst].e.combined2) { + if (dyn->insts[ninst].e.swapped) { + // if(box64_dynarec_dump) dynarec_log(LOG_NONE, "extcache_promote_double_internal, ninst=%d swapped %d/%d vs %d with st %d\n", ninst, dyn->insts[ninst].e.combined1 ,dyn->insts[ninst].e.combined2, a, dyn->insts[ninst].e.stack); + if (a == dyn->insts[ninst].e.combined1) a = dyn->insts[ninst].e.combined2; - else if (a==dyn->insts[ninst].e.combined2) + else if (a == dyn->insts[ninst].e.combined2) a = dyn->insts[ninst].e.combined1; } else { - //if(box64_dynarec_dump) dynarec_log(LOG_NONE, "extcache_promote_double_internal, ninst=%d combined %d/%d vs %d with st %d\n", ninst, dyn->insts[ninst].e.combined1 ,dyn->insts[ninst].e.combined2, a, dyn->insts[ninst].e.stack); + // if(box64_dynarec_dump) dynarec_log(LOG_NONE, "extcache_promote_double_internal, ninst=%d combined %d/%d vs %d with st %d\n", ninst, dyn->insts[ninst].e.combined1 ,dyn->insts[ninst].e.combined2, a, dyn->insts[ninst].e.stack); extcache_promote_double_combined(dyn, ninst, maxinst, a); } } - a-=dyn->insts[ninst].e.stack_push; // // adjust Stack depth: remove push'd ST (going backward) + a -= dyn->insts[ninst].e.stack_push; // // adjust Stack depth: remove push'd ST (going backward) --ninst; - if(ninst<0 || a<0 || dyn->insts[ninst].e.barrier) + if (ninst < 0 || a < 0 || dyn->insts[ninst].e.barrier) return; } } static void extcache_promote_double_forward(dynarec_rv64_t* dyn, int ninst, int maxinst, int a) { - while((ninst!=-1) && (ninst<maxinst) && (a>=0)) { - a+=dyn->insts[ninst].e.stack_push; // // adjust Stack depth: add push'd ST (going forward) - if((dyn->insts[ninst].e.combined1 || dyn->insts[ninst].e.combined2) && dyn->insts[ninst].e.swapped) { - //if(box64_dynarec_dump) dynarec_log(LOG_NONE, "extcache_promote_double_forward, ninst=%d swapped %d/%d vs %d with st %d\n", ninst, dyn->insts[ninst].e.combined1 ,dyn->insts[ninst].e.combined2, a, dyn->insts[ninst].e.stack); - if (a==dyn->insts[ninst].e.combined1) + while ((ninst != -1) && (ninst < maxinst) && (a >= 0)) { + a += dyn->insts[ninst].e.stack_push; // // adjust Stack depth: add push'd ST (going forward) + if ((dyn->insts[ninst].e.combined1 || dyn->insts[ninst].e.combined2) && dyn->insts[ninst].e.swapped) { + // if(box64_dynarec_dump) dynarec_log(LOG_NONE, "extcache_promote_double_forward, ninst=%d swapped %d/%d vs %d with st %d\n", ninst, dyn->insts[ninst].e.combined1 ,dyn->insts[ninst].e.combined2, a, dyn->insts[ninst].e.stack); + if (a == dyn->insts[ninst].e.combined1) a = dyn->insts[ninst].e.combined2; - else if (a==dyn->insts[ninst].e.combined2) + else if (a == dyn->insts[ninst].e.combined2) a = dyn->insts[ninst].e.combined1; } int i = extcache_get_st_f_i64_noback(dyn, ninst, a); - //if(box64_dynarec_dump) dynarec_log(LOG_NONE, "extcache_promote_double_forward, ninst=%d, a=%d st=%d:%d(%d/%d), i=%d\n", ninst, a, dyn->insts[ninst].e.stack, dyn->insts[ninst].e.stack_next, dyn->insts[ninst].e.stack_push, -dyn->insts[ninst].e.stack_pop, i); - if(i<0) return; + // if(box64_dynarec_dump) dynarec_log(LOG_NONE, "extcache_promote_double_forward, ninst=%d, a=%d st=%d:%d(%d/%d), i=%d\n", ninst, a, dyn->insts[ninst].e.stack, dyn->insts[ninst].e.stack_next, dyn->insts[ninst].e.stack_push, -dyn->insts[ninst].e.stack_pop, i); + if (i < 0) return; dyn->insts[ninst].e.extcache[i].t = EXT_CACHE_ST_D; // check combined propagation too - if((dyn->insts[ninst].e.combined1 || dyn->insts[ninst].e.combined2) && !dyn->insts[ninst].e.swapped) { - //if(box64_dynarec_dump) dynarec_log(LOG_NONE, "extcache_promote_double_forward, ninst=%d combined %d/%d vs %d with st %d\n", ninst, dyn->insts[ninst].e.combined1 ,dyn->insts[ninst].e.combined2, a, dyn->insts[ninst].e.stack); + if ((dyn->insts[ninst].e.combined1 || dyn->insts[ninst].e.combined2) && !dyn->insts[ninst].e.swapped) { + // if(box64_dynarec_dump) dynarec_log(LOG_NONE, "extcache_promote_double_forward, ninst=%d combined %d/%d vs %d with st %d\n", ninst, dyn->insts[ninst].e.combined1 ,dyn->insts[ninst].e.combined2, a, dyn->insts[ninst].e.stack); extcache_promote_double_combined(dyn, ninst, maxinst, a); } - a-=dyn->insts[ninst].e.stack_pop; // adjust Stack depth: remove pop'd ST (going forward) - if(dyn->insts[ninst].x64.has_next && !dyn->insts[ninst].e.barrier) + a -= dyn->insts[ninst].e.stack_pop; // adjust Stack depth: remove pop'd ST (going forward) + if (dyn->insts[ninst].x64.has_next && !dyn->insts[ninst].e.barrier) ++ninst; else - ninst=-1; + ninst = -1; } - if(ninst==maxinst) + if (ninst == maxinst) extcache_promote_double(dyn, ninst, a); } void extcache_promote_double(dynarec_rv64_t* dyn, int ninst, int a) { int i = extcache_get_current_st_f_i64(dyn, a); - //if(box64_dynarec_dump) dynarec_log(LOG_NONE, "extcache_promote_double, ninst=%d a=%d st=%d i=%d\n", ninst, a, dyn->e.stack, i); - if(i<0) return; + // if(box64_dynarec_dump) dynarec_log(LOG_NONE, "extcache_promote_double, ninst=%d a=%d st=%d i=%d\n", ninst, a, dyn->e.stack, i); + if (i < 0) return; dyn->e.extcache[i].t = EXT_CACHE_ST_D; dyn->insts[ninst].e.extcache[i].t = EXT_CACHE_ST_D; // check combined propagation too - if(dyn->e.combined1 || dyn->e.combined2) { - if(dyn->e.swapped) { - //if(box64_dynarec_dump) dynarec_log(LOG_NONE, "extcache_promote_double, ninst=%d swapped! %d/%d vs %d\n", ninst, dyn->e.combined1 ,dyn->e.combined2, a); - if(dyn->e.combined1 == a) + if (dyn->e.combined1 || dyn->e.combined2) { + if (dyn->e.swapped) { + // if(box64_dynarec_dump) dynarec_log(LOG_NONE, "extcache_promote_double, ninst=%d swapped! %d/%d vs %d\n", ninst, dyn->e.combined1 ,dyn->e.combined2, a); + if (dyn->e.combined1 == a) a = dyn->e.combined2; - else if(dyn->e.combined2 == a) + else if (dyn->e.combined2 == a) a = dyn->e.combined1; } else { - //if(box64_dynarec_dump) dynarec_log(LOG_NONE, "extcache_promote_double, ninst=%d combined! %d/%d vs %d\n", ninst, dyn->e.combined1 ,dyn->e.combined2, a); - if(dyn->e.combined1 == a) + // if(box64_dynarec_dump) dynarec_log(LOG_NONE, "extcache_promote_double, ninst=%d combined! %d/%d vs %d\n", ninst, dyn->e.combined1 ,dyn->e.combined2, a); + if (dyn->e.combined1 == a) extcache_promote_double(dyn, ninst, dyn->e.combined2); - else if(dyn->e.combined2 == a) + else if (dyn->e.combined2 == a) extcache_promote_double(dyn, ninst, dyn->e.combined1); } } - a-=dyn->insts[ninst].e.stack_push; // // adjust Stack depth: remove push'd ST (going backward) - if(!ninst || a<0) return; - extcache_promote_double_internal(dyn, ninst-1, ninst, a); + a -= dyn->insts[ninst].e.stack_push; // // adjust Stack depth: remove push'd ST (going backward) + if (!ninst || a < 0) return; + extcache_promote_double_internal(dyn, ninst - 1, ninst, a); } int extcache_combine_st(dynarec_rv64_t* dyn, int ninst, int a, int b) { - dyn->e.combined1=a; - dyn->e.combined2=b; - if( extcache_get_current_st(dyn, ninst, a)==EXT_CACHE_ST_F - && extcache_get_current_st(dyn, ninst, b)==EXT_CACHE_ST_F ) + dyn->e.combined1 = a; + dyn->e.combined2 = b; + if (extcache_get_current_st(dyn, ninst, a) == EXT_CACHE_ST_F + && extcache_get_current_st(dyn, ninst, b) == EXT_CACHE_ST_F) return EXT_CACHE_ST_F; return EXT_CACHE_ST_D; } @@ -342,20 +343,21 @@ static int isCacheEmpty(dynarec_native_t* dyn, int ninst) return 1; } -int fpuCacheNeedsTransform(dynarec_rv64_t* dyn, int ninst) { +int fpuCacheNeedsTransform(dynarec_rv64_t* dyn, int ninst) +{ int i2 = dyn->insts[ninst].x64.jmp_insts; - if(i2<0) + if (i2 < 0) return 1; - if((dyn->insts[i2].x64.barrier&BARRIER_FLOAT)) + if ((dyn->insts[i2].x64.barrier & BARRIER_FLOAT)) // if the barrier as already been apply, no transform needed - return ((dyn->insts[ninst].x64.barrier&BARRIER_FLOAT))?0:(isCacheEmpty(dyn, ninst)?0:1); + return ((dyn->insts[ninst].x64.barrier & BARRIER_FLOAT)) ? 0 : (isCacheEmpty(dyn, ninst) ? 0 : 1); int ret = 0; - if(!i2) { // just purge - if(dyn->insts[ninst].e.stack_next) { + if (!i2) { // just purge + if (dyn->insts[ninst].e.stack_next) { return 1; } - for(int i=0; i<24 && !ret; ++i) - if(dyn->insts[ninst].e.extcache[i].v) { // there is something at ninst for i + for (int i = 0; i < 24 && !ret; ++i) + if (dyn->insts[ninst].e.extcache[i].v) { // there is something at ninst for i if (!( (dyn->insts[ninst].e.extcache[i].t == EXT_CACHE_ST_F || dyn->insts[ninst].e.extcache[i].t == EXT_CACHE_ST_D @@ -366,24 +368,24 @@ int fpuCacheNeedsTransform(dynarec_rv64_t* dyn, int ninst) { return ret; } // Check if ninst can be compatible to i2 - if(dyn->insts[ninst].e.stack_next != dyn->insts[i2].e.stack-dyn->insts[i2].e.stack_push) { + if (dyn->insts[ninst].e.stack_next != dyn->insts[i2].e.stack - dyn->insts[i2].e.stack_push) { return 1; } extcache_t cache_i2 = dyn->insts[i2].e; extcacheUnwind(&cache_i2); - for(int i=0; i<24; ++i) { - if(dyn->insts[ninst].e.extcache[i].v) { // there is something at ninst for i - if(!cache_i2.extcache[i].v) { // but there is nothing at i2 for i + for (int i = 0; i < 24; ++i) { + if (dyn->insts[ninst].e.extcache[i].v) { // there is something at ninst for i + if (!cache_i2.extcache[i].v) { // but there is nothing at i2 for i ret = 1; - } else if(dyn->insts[ninst].e.extcache[i].v!=cache_i2.extcache[i].v) { // there is something different - if (dyn->insts[ninst].e.extcache[i].n != cache_i2.extcache[i].n) { // not the same x64 reg + } else if (dyn->insts[ninst].e.extcache[i].v != cache_i2.extcache[i].v) { // there is something different + if (dyn->insts[ninst].e.extcache[i].n != cache_i2.extcache[i].n) { // not the same x64 reg ret = 1; } else if (dyn->insts[ninst].e.extcache[i].t == EXT_CACHE_XMMR && cache_i2.extcache[i].t == EXT_CACHE_XMMW) { /* nothing */ } else ret = 1; } - } else if(cache_i2.extcache[i].v) + } else if (cache_i2.extcache[i].v) ret = 1; } return ret; @@ -405,20 +407,20 @@ int sewNeedsTransform(dynarec_rv64_t* dyn, int ninst) void extcacheUnwind(extcache_t* cache) { - if(cache->swapped) { + if (cache->swapped) { // unswap int a = -1; int b = -1; - for(int j=0; j<24 && ((a==-1) || (b==-1)); ++j) + for (int j = 0; j < 24 && ((a == -1) || (b == -1)); ++j) if ((cache->extcache[j].t == EXT_CACHE_ST_D || cache->extcache[j].t == EXT_CACHE_ST_F || cache->extcache[j].t == EXT_CACHE_ST_I64)) { - if(cache->extcache[j].n == cache->combined1) + if (cache->extcache[j].n == cache->combined1) a = j; - else if(cache->extcache[j].n == cache->combined2) + else if (cache->extcache[j].n == cache->combined2) b = j; } - if(a!=-1 && b!=-1) { + if (a != -1 && b != -1) { int tmp = cache->extcache[a].n; cache->extcache[a].n = cache->extcache[b].n; cache->extcache[b].n = tmp; @@ -426,10 +428,10 @@ void extcacheUnwind(extcache_t* cache) cache->swapped = 0; cache->combined1 = cache->combined2 = 0; } - if(cache->news) { + if (cache->news) { // remove the newly created extcache - for(int i=0; i<24; ++i) - if((cache->news&(1<<i)) && !cache->olds[i].changed) + for (int i = 0; i < 24; ++i) + if ((cache->news & (1 << i)) && !cache->olds[i].changed) cache->extcache[i].v = 0; cache->news = 0; } @@ -450,35 +452,35 @@ void extcacheUnwind(extcache_t* cache) } } - if(cache->stack_push) { + if (cache->stack_push) { // unpush - for(int j=0; j<24; ++j) { + for (int j = 0; j < 24; ++j) { if ((cache->extcache[j].t == EXT_CACHE_ST_D || cache->extcache[j].t == EXT_CACHE_ST_F || cache->extcache[j].t == EXT_CACHE_ST_I64)) { - if(cache->extcache[j].n<cache->stack_push) + if (cache->extcache[j].n < cache->stack_push) cache->extcache[j].v = 0; else - cache->extcache[j].n-=cache->stack_push; + cache->extcache[j].n -= cache->stack_push; } } - cache->x87stack-=cache->stack_push; - cache->tags>>=(cache->stack_push*2); - cache->stack-=cache->stack_push; - if(cache->pushed>=cache->stack_push) - cache->pushed-=cache->stack_push; + cache->x87stack -= cache->stack_push; + cache->tags >>= (cache->stack_push * 2); + cache->stack -= cache->stack_push; + if (cache->pushed >= cache->stack_push) + cache->pushed -= cache->stack_push; else cache->pushed = 0; cache->stack_push = 0; } - cache->x87stack+=cache->stack_pop; + cache->x87stack += cache->stack_pop; cache->stack_next = cache->stack; - if(cache->stack_pop) { - if(cache->poped>=cache->stack_pop) - cache->poped-=cache->stack_pop; + if (cache->stack_pop) { + if (cache->poped >= cache->stack_pop) + cache->poped -= cache->stack_pop; else cache->poped = 0; - cache->tags<<=(cache->stack_pop*2); + cache->tags <<= (cache->stack_pop * 2); } cache->stack_pop = 0; cache->barrier = 0; @@ -491,12 +493,12 @@ void extcacheUnwind(extcache_t* cache) cache->x87cache[i] = -1; cache->mmxcache[i].v = -1; cache->x87reg[i] = 0; - cache->ssecache[i*2].v = -1; - cache->ssecache[i*2+1].v = -1; + cache->ssecache[i * 2].v = -1; + cache->ssecache[i * 2 + 1].v = -1; } int x87reg = 0; for (int i = 0; i < 32; ++i) { - if(cache->extcache[i].v) { + if (cache->extcache[i].v) { cache->fpuused[i] = 1; switch (cache->extcache[i].t) { case EXT_CACHE_MM: @@ -549,51 +551,51 @@ void extcacheUnwind(extcache_t* cache) // will go badly if address is unaligned static uint8_t extract_byte(uint32_t val, void* address) { - int idx = (((uintptr_t)address)&3)*8; - return (val>>idx)&0xff; + int idx = (((uintptr_t)address) & 3) * 8; + return (val >> idx) & 0xff; } static uint32_t insert_byte(uint32_t val, uint8_t b, void* address) { - int idx = (((uintptr_t)address)&3)*8; - val&=~(0xff<<idx); - val|=(((uint32_t)b)<<idx); + int idx = (((uintptr_t)address) & 3) * 8; + val &= ~(0xff << idx); + val |= (((uint32_t)b) << idx); return val; } static uint16_t extract_half(uint32_t val, void* address) { - int idx = (((uintptr_t)address)&3)*8; - return (val>>idx)&0xffff; + int idx = (((uintptr_t)address) & 3) * 8; + return (val >> idx) & 0xffff; } static uint32_t insert_half(uint32_t val, uint16_t h, void* address) { - int idx = (((uintptr_t)address)&3)*8; - val&=~(0xffff<<idx); - val|=(((uint32_t)h)<<idx); + int idx = (((uintptr_t)address) & 3) * 8; + val &= ~(0xffff << idx); + val |= (((uint32_t)h) << idx); return val; } uint8_t rv64_lock_xchg_b(void* addr, uint8_t val) { uint32_t ret; - uint32_t* aligned = (uint32_t*)(((uintptr_t)addr)&~3); + uint32_t* aligned = (uint32_t*)(((uintptr_t)addr) & ~3); do { ret = *aligned; - } while(rv64_lock_cas_d(aligned, ret, insert_byte(ret, val, addr))); + } while (rv64_lock_cas_d(aligned, ret, insert_byte(ret, val, addr))); return extract_byte(ret, addr); } int rv64_lock_cas_b(void* addr, uint8_t ref, uint8_t val) { - uint32_t* aligned = (uint32_t*)(((uintptr_t)addr)&~3); + uint32_t* aligned = (uint32_t*)(((uintptr_t)addr) & ~3); uint32_t tmp = *aligned; return rv64_lock_cas_d(aligned, tmp, insert_byte(tmp, val, addr)); } int rv64_lock_cas_h(void* addr, uint16_t ref, uint16_t val) { - uint32_t* aligned = (uint32_t*)(((uintptr_t)addr)&~3); + uint32_t* aligned = (uint32_t*)(((uintptr_t)addr) & ~3); uint32_t tmp = *aligned; return rv64_lock_cas_d(aligned, tmp, insert_half(tmp, val, addr)); } @@ -602,7 +604,7 @@ int rv64_lock_cas_h(void* addr, uint16_t ref, uint16_t val) const char* getCacheName(int t, int n) { static char buff[20]; - switch(t) { + switch (t) { case EXT_CACHE_ST_D: sprintf(buff, "ST%d", n); break; case EXT_CACHE_ST_F: sprintf(buff, "st%d", n); break; case EXT_CACHE_ST_I64: sprintf(buff, "STi%d", n); break; @@ -615,7 +617,7 @@ const char* getCacheName(int t, int n) case EXT_CACHE_XMMR: sprintf(buff, "xmm%d", n); break; case EXT_CACHE_YMMW: sprintf(buff, "YMM%d", n); break; case EXT_CACHE_YMMR: sprintf(buff, "ymm%d", n); break; - case EXT_CACHE_NONE: buff[0]='\0'; break; + case EXT_CACHE_NONE: buff[0] = '\0'; break; } return buff; } @@ -630,13 +632,41 @@ void inst_name_pass3(dynarec_native_t* dyn, int ninst, const char* name, rex_t r "ft8", "ft9", "ft10", "ft11" }; static const char* vnames[] = { - "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", - "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", - "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", - "v24", "v25", "v26", "v27", "v8", "v9", "v30", "v31", + "v0", + "v1", + "v2", + "v3", + "v4", + "v5", + "v6", + "v7", + "v8", + "v9", + "v10", + "v11", + "v12", + "v13", + "v14", + "v15", + "v16", + "v17", + "v18", + "v19", + "v20", + "v21", + "v22", + "v23", + "v24", + "v25", + "v26", + "v27", + "v8", + "v9", + "v30", + "v31", }; - if(box64_dynarec_dump) { - printf_x64_instruction(rex.is32bits?my_context->dec32:my_context->dec, &dyn->insts[ninst].x64, name); + if (box64_dynarec_dump) { + printf_x64_instruction(rex.is32bits ? my_context->dec32 : my_context->dec, &dyn->insts[ninst].x64, name); dynarec_log(LOG_NONE, "%s%p: %d emitted opcodes, inst=%d, barrier=%d state=%d/%d(%d), %s=%X/%X, use=%X, need=%X/%X, fuse=%d, sm=%d(%d/%d), sew@entry=%d, sew@exit=%d", (box64_dynarec_dump > 1) ? "\e[32m" : "", (void*)(dyn->native_start + dyn->insts[ninst].address), @@ -655,19 +685,19 @@ void inst_name_pass3(dynarec_native_t* dyn, int ninst, const char* name, rex_t r dyn->insts[ninst].nat_flags_fusion, dyn->smwrite, dyn->insts[ninst].will_write, dyn->insts[ninst].last_write, dyn->insts[ninst].vector_sew_entry, dyn->insts[ninst].vector_sew_exit); - if(dyn->insts[ninst].pred_sz) { + if (dyn->insts[ninst].pred_sz) { dynarec_log(LOG_NONE, ", pred="); - for(int ii=0; ii<dyn->insts[ninst].pred_sz; ++ii) - dynarec_log(LOG_NONE, "%s%d", ii?"/":"", dyn->insts[ninst].pred[ii]); + for (int ii = 0; ii < dyn->insts[ninst].pred_sz; ++ii) + dynarec_log(LOG_NONE, "%s%d", ii ? "/" : "", dyn->insts[ninst].pred[ii]); } - if(dyn->insts[ninst].x64.jmp && dyn->insts[ninst].x64.jmp_insts>=0) + if (dyn->insts[ninst].x64.jmp && dyn->insts[ninst].x64.jmp_insts >= 0) dynarec_log(LOG_NONE, ", jmp=%d", dyn->insts[ninst].x64.jmp_insts); - if(dyn->insts[ninst].x64.jmp && dyn->insts[ninst].x64.jmp_insts==-1) + if (dyn->insts[ninst].x64.jmp && dyn->insts[ninst].x64.jmp_insts == -1) dynarec_log(LOG_NONE, ", jmp=out"); - if(dyn->last_ip) + if (dyn->last_ip) dynarec_log(LOG_NONE, ", last_ip=%p", (void*)dyn->last_ip); for (int ii = 0; ii < 32; ++ii) { - switch(dyn->insts[ninst].e.extcache[ii].t) { + switch (dyn->insts[ninst].e.extcache[ii].t) { case EXT_CACHE_ST_D: dynarec_log(LOG_NONE, " %s:%s", fnames[EXTREG(ii)], getCacheName(dyn->insts[ninst].e.extcache[ii].t, dyn->insts[ninst].e.extcache[ii].n)); break; case EXT_CACHE_ST_F: dynarec_log(LOG_NONE, " %s:%s", fnames[EXTREG(ii)], getCacheName(dyn->insts[ninst].e.extcache[ii].t, dyn->insts[ninst].e.extcache[ii].n)); break; case EXT_CACHE_ST_I64: dynarec_log(LOG_NONE, " %s:%s", fnames[EXTREG(ii)], getCacheName(dyn->insts[ninst].e.extcache[ii].t, dyn->insts[ninst].e.extcache[ii].n)); break; @@ -681,16 +711,16 @@ void inst_name_pass3(dynarec_native_t* dyn, int ninst, const char* name, rex_t r case EXT_CACHE_YMMR: dynarec_log(LOG_NONE, " %s:%s", vnames[EXTREG(ii)], getCacheName(dyn->insts[ninst].e.extcache[ii].t, dyn->insts[ninst].e.extcache[ii].n)); break; case EXT_CACHE_SCR: dynarec_log(LOG_NONE, " %s:%s", fnames[EXTREG(ii)], getCacheName(dyn->insts[ninst].e.extcache[ii].t, dyn->insts[ninst].e.extcache[ii].n)); break; case EXT_CACHE_NONE: - default: break; + default: break; } } if (dyn->ymm_zero) dynarec_log(LOG_NONE, " ymm0_mask = %04x", dyn->ymm_zero); - if(dyn->e.stack || dyn->insts[ninst].e.stack_next || dyn->insts[ninst].e.x87stack) + if (dyn->e.stack || dyn->insts[ninst].e.stack_next || dyn->insts[ninst].e.x87stack) dynarec_log(LOG_NONE, " X87:%d/%d(+%d/-%d)%d", dyn->e.stack, dyn->insts[ninst].e.stack_next, dyn->insts[ninst].e.stack_push, dyn->insts[ninst].e.stack_pop, dyn->insts[ninst].e.x87stack); - if(dyn->insts[ninst].e.combined1 || dyn->insts[ninst].e.combined2) - dynarec_log(LOG_NONE, " %s:%d/%d", dyn->insts[ninst].e.swapped?"SWP":"CMB", dyn->insts[ninst].e.combined1, dyn->insts[ninst].e.combined2); - dynarec_log(LOG_NONE, "%s\n", (box64_dynarec_dump>1)?"\e[m":""); + if (dyn->insts[ninst].e.combined1 || dyn->insts[ninst].e.combined2) + dynarec_log(LOG_NONE, " %s:%d/%d", dyn->insts[ninst].e.swapped ? "SWP" : "CMB", dyn->insts[ninst].e.combined1, dyn->insts[ninst].e.combined2); + dynarec_log(LOG_NONE, "%s\n", (box64_dynarec_dump > 1) ? "\e[m" : ""); } } @@ -702,16 +732,15 @@ void print_opcode(dynarec_native_t* dyn, int ninst, uint32_t opcode) void print_newinst(dynarec_native_t* dyn, int ninst) { dynarec_log(LOG_NONE, "%sNew instruction %d, native=%p (0x%x)%s\n", - (box64_dynarec_dump>1)?"\e[4;32m":"", + (box64_dynarec_dump > 1) ? "\e[4;32m" : "", ninst, dyn->block, dyn->native_size, - (box64_dynarec_dump>1)?"\e[m":"" - ); + (box64_dynarec_dump > 1) ? "\e[m" : ""); } // x87 stuffs static void x87_reset(extcache_t* e) { - for (int i=0; i<8; ++i) + for (int i = 0; i < 8; ++i) e->x87cache[i] = -1; e->x87stack = 0; e->stack = 0; @@ -724,7 +753,7 @@ static void x87_reset(extcache_t* e) e->pushed = 0; e->poped = 0; - for(int i=0; i<24; ++i) + for (int i = 0; i < 24; ++i) if (e->extcache[i].t == EXT_CACHE_ST_F || e->extcache[i].t == EXT_CACHE_ST_D || e->extcache[i].t == EXT_CACHE_ST_I64) @@ -740,7 +769,7 @@ static void mmx_reset(extcache_t* e) static void sse_reset(extcache_t* e) { - for (int i=0; i<16; ++i) + for (int i = 0; i < 16; ++i) e->ssecache[i].v = -1; } @@ -763,7 +792,7 @@ void fpu_reset_ninst(dynarec_rv64_t* dyn, int ninst) int fpu_is_st_freed(dynarec_rv64_t* dyn, int ninst, int st) { - return (dyn->e.tags&(0b11<<(st*2)))?1:0; + return (dyn->e.tags & (0b11 << (st * 2))) ? 1 : 0; } void updateNativeFlags(dynarec_rv64_t* dyn) diff --git a/src/dynarec/rv64/dynarec_rv64_functions.h b/src/dynarec/rv64/dynarec_rv64_functions.h index 244aca9d..b61b904a 100644 --- a/src/dynarec/rv64/dynarec_rv64_functions.h +++ b/src/dynarec/rv64/dynarec_rv64_functions.h @@ -42,7 +42,7 @@ int extcache_get_current_st_f_i64(dynarec_rv64_t* dyn, int a); // Back-propagate a change float->double void extcache_promote_double(dynarec_rv64_t* dyn, int ninst, int a); // Combine and propagate if needed (pass 1 only) -int extcache_combine_st(dynarec_rv64_t* dyn, int ninst, int a, int b); // with stack current dyn->n_stack* +int extcache_combine_st(dynarec_rv64_t* dyn, int ninst, int a, int b); // with stack current dyn->n_stack* // Do not allow i64 type int extcache_no_i64(dynarec_rv64_t* dyn, int ninst, int st, int a); diff --git a/src/dynarec/rv64/dynarec_rv64_helper.c b/src/dynarec/rv64/dynarec_rv64_helper.c index 18ff8680..4b53e81f 100644 --- a/src/dynarec/rv64/dynarec_rv64_helper.c +++ b/src/dynarec/rv64/dynarec_rv64_helper.c @@ -27,137 +27,143 @@ #include "dynarec_rv64_functions.h" #include "../dynarec_helper.h" -static uintptr_t geted_32(dynarec_rv64_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, uint8_t* ed, uint8_t hint, uint8_t scratch, int64_t* fixaddress, int *l, int i12); +static uintptr_t geted_32(dynarec_rv64_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, uint8_t* ed, uint8_t hint, uint8_t scratch, int64_t* fixaddress, int* l, int i12); /* setup r2 to address pointed by ED, also fixaddress is an optionnal delta in the range [-absmax, +absmax], with delta&mask==0 to be added to ed for LDR/STR */ -uintptr_t geted(dynarec_rv64_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, uint8_t* ed, uint8_t hint, uint8_t scratch, int64_t* fixaddress, rex_t rex, int *l, int i12, int delta) +uintptr_t geted(dynarec_rv64_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, uint8_t* ed, uint8_t hint, uint8_t scratch, int64_t* fixaddress, rex_t rex, int* l, int i12, int delta) { - MAYUSE(dyn); MAYUSE(ninst); MAYUSE(delta); + MAYUSE(dyn); + MAYUSE(ninst); + MAYUSE(delta); - if(rex.is32bits) + if (rex.is32bits) return geted_32(dyn, addr, ninst, nextop, ed, hint, scratch, fixaddress, l, i12); - int lock = l?((l==LOCK_LOCK)?1:2):0; - if(lock==2) + int lock = l ? ((l == LOCK_LOCK) ? 1 : 2) : 0; + if (lock == 2) *l = 0; uint8_t ret = x2; *fixaddress = 0; - if(hint>0) ret = hint; + if (hint > 0) ret = hint; int maxval = 2047; - if(i12>1) + if (i12 > 1) maxval -= i12; MAYUSE(scratch); - if(!(nextop&0xC0)) { - if((nextop&7)==4) { + if (!(nextop & 0xC0)) { + if ((nextop & 7) == 4) { uint8_t sib = F8; - int sib_reg = ((sib>>3)&7)+(rex.x<<3); - int sib_reg2 = (sib&0x7)+(rex.b<<3); - if((sib&0x7)==5) { + int sib_reg = ((sib >> 3) & 7) + (rex.x << 3); + int sib_reg2 = (sib & 0x7) + (rex.b << 3); + if ((sib & 0x7) == 5) { int64_t tmp = F32S; - if (sib_reg!=4) { - if(tmp && ((tmp<-2048) || (tmp>maxval) || !i12)) { + if (sib_reg != 4) { + if (tmp && ((tmp < -2048) || (tmp > maxval) || !i12)) { MOV64x(scratch, tmp); - ADDSL(ret, scratch, xRAX+sib_reg, sib>>6, ret); + ADDSL(ret, scratch, TO_NAT(sib_reg), sib >> 6, ret); } else { - if(sib>>6) { - SLLI(ret, xRAX+sib_reg, (sib>>6)); + if (sib >> 6) { + SLLI(ret, TO_NAT(sib_reg), (sib >> 6)); } else - ret = xRAX+sib_reg; + ret = TO_NAT(sib_reg); *fixaddress = tmp; } } else { - switch(lock) { + switch (lock) { case 1: addLockAddress(tmp); break; - case 2: if(isLockAddress(tmp)) *l=1; break; + case 2: + if (isLockAddress(tmp)) *l = 1; + break; } MOV64x(ret, tmp); } } else { - if (sib_reg!=4) { - ADDSL(ret, xRAX+sib_reg2, xRAX+sib_reg, sib>>6, scratch); + if (sib_reg != 4) { + ADDSL(ret, TO_NAT(sib_reg2), TO_NAT(sib_reg), sib >> 6, scratch); } else { - ret = xRAX+sib_reg2; + ret = TO_NAT(sib_reg2); } } - } else if((nextop&7)==5) { + } else if ((nextop & 7) == 5) { int64_t tmp = F32S64; - int64_t adj = dyn->last_ip?((addr+delta)-dyn->last_ip):0; - if(i12 && adj && (tmp+adj>=-2048) && (tmp+adj<=maxval)) { + int64_t adj = dyn->last_ip ? ((addr + delta) - dyn->last_ip) : 0; + if (i12 && adj && (tmp + adj >= -2048) && (tmp + adj <= maxval)) { ret = xRIP; - *fixaddress = tmp+adj; - } else if(i12 && (tmp>=-2048) && (tmp<=maxval)) { - GETIP(addr+delta); + *fixaddress = tmp + adj; + } else if (i12 && (tmp >= -2048) && (tmp <= maxval)) { + GETIP(addr + delta); ret = xRIP; *fixaddress = tmp; - } else if(adj && (tmp+adj>=-2048) && (tmp+adj<=maxval)) { - ADDI(ret, xRIP, tmp+adj); - } else if((tmp>=-2048) && (tmp<=maxval)) { - GETIP(addr+delta); + } else if (adj && (tmp + adj >= -2048) && (tmp + adj <= maxval)) { + ADDI(ret, xRIP, tmp + adj); + } else if ((tmp >= -2048) && (tmp <= maxval)) { + GETIP(addr + delta); ADDI(ret, xRIP, tmp); - } else if(tmp+addr+delta<0x100000000LL) { - MOV64x(ret, tmp+addr+delta); + } else if (tmp + addr + delta < 0x100000000LL) { + MOV64x(ret, tmp + addr + delta); } else { - if(adj) { - MOV64x(ret, tmp+adj); + if (adj) { + MOV64x(ret, tmp + adj); } else { MOV64x(ret, tmp); - GETIP(addr+delta); + GETIP(addr + delta); } ADD(ret, ret, xRIP); } - switch(lock) { - case 1: addLockAddress(addr+delta+tmp); break; - case 2: if(isLockAddress(addr+delta+tmp)) *l=1; break; + switch (lock) { + case 1: addLockAddress(addr + delta + tmp); break; + case 2: + if (isLockAddress(addr + delta + tmp)) *l = 1; + break; } } else { - ret = xRAX+(nextop&7)+(rex.b<<3); + ret = TO_NAT((nextop & 7) + (rex.b << 3)); } } else { int64_t i64; uint8_t sib = 0; int sib_reg = 0; - if((nextop&7)==4) { + if ((nextop & 7) == 4) { sib = F8; - sib_reg = ((sib>>3)&7)+(rex.x<<3); + sib_reg = ((sib >> 3) & 7) + (rex.x << 3); } - int sib_reg2 = (sib&0x07)+(rex.b<<3); - if(nextop&0x80) + int sib_reg2 = (sib & 0x07) + (rex.b << 3); + if (nextop & 0x80) i64 = F32S; else i64 = F8S; - if(i64==0 || ((i64>=-2048) && (i64<=maxval) && i12)) { + if (i64 == 0 || ((i64 >= -2048) && (i64 <= maxval) && i12)) { *fixaddress = i64; - if((nextop&7)==4) { - if (sib_reg!=4) { - ADDSL(ret, xRAX+sib_reg2, xRAX+sib_reg, sib>>6, scratch); + if ((nextop & 7) == 4) { + if (sib_reg != 4) { + ADDSL(ret, TO_NAT(sib_reg2), TO_NAT(sib_reg), sib >> 6, scratch); } else { - ret = xRAX+sib_reg2; + ret = TO_NAT(sib_reg2); } } else - ret = xRAX+(nextop&0x07)+(rex.b<<3); + ret = TO_NAT((nextop & 0x07) + (rex.b << 3)); } else { - if(i64>=-2048 && i64<=2047) { - if((nextop&7)==4) { - if (sib_reg!=4) { - ADDSL(scratch, xRAX+sib_reg2, xRAX+sib_reg, sib>>6, scratch); + if (i64 >= -2048 && i64 <= 2047) { + if ((nextop & 7) == 4) { + if (sib_reg != 4) { + ADDSL(scratch, TO_NAT(sib_reg2), TO_NAT(sib_reg), sib >> 6, scratch); } else { - scratch = xRAX+sib_reg2; + scratch = TO_NAT(sib_reg2); } } else - scratch = xRAX+(nextop&0x07)+(rex.b<<3); + scratch = TO_NAT((nextop & 0x07) + (rex.b << 3)); ADDI(ret, scratch, i64); } else { MOV64x(scratch, i64); - if((nextop&7)==4) { - if (sib_reg!=4) { - ADD(scratch, scratch, xRAX+sib_reg2); - ADDSL(ret, scratch, xRAX+sib_reg, sib>>6, ret); + if ((nextop & 7) == 4) { + if (sib_reg != 4) { + ADD(scratch, scratch, TO_NAT(sib_reg2)); + ADDSL(ret, scratch, TO_NAT(sib_reg), sib >> 6, ret); } else { - PASS3(int tmp = xRAX+sib_reg2); + PASS3(int tmp = TO_NAT(sib_reg2)); ADD(ret, tmp, scratch); } } else { - PASS3(int tmp = xRAX+(nextop&0x07)+(rex.b<<3)); + PASS3(int tmp = TO_NAT((nextop & 0x07) + (rex.b << 3))); ADD(ret, tmp, scratch); } } @@ -167,141 +173,146 @@ uintptr_t geted(dynarec_rv64_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, return addr; } -static uintptr_t geted_32(dynarec_rv64_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, uint8_t* ed, uint8_t hint, uint8_t scratch, int64_t* fixaddress, int *l, int i12) +static uintptr_t geted_32(dynarec_rv64_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, uint8_t* ed, uint8_t hint, uint8_t scratch, int64_t* fixaddress, int* l, int i12) { - MAYUSE(dyn); MAYUSE(ninst); + MAYUSE(dyn); + MAYUSE(ninst); - int lock = l?((l==LOCK_LOCK)?1:2):0; - if(lock==2) + int lock = l ? ((l == LOCK_LOCK) ? 1 : 2) : 0; + if (lock == 2) *l = 0; uint8_t ret = x2; *fixaddress = 0; - if(hint>0) ret = hint; + if (hint > 0) ret = hint; int maxval = 2047; - if(i12>1) + if (i12 > 1) maxval -= i12; MAYUSE(scratch); - if(!(nextop&0xC0)) { - if((nextop&7)==4) { + if (!(nextop & 0xC0)) { + if ((nextop & 7) == 4) { uint8_t sib = F8; - int sib_reg = (sib>>3)&0x7; - int sib_reg2 = sib&0x7; - if(sib_reg2==5) { + int sib_reg = (sib >> 3) & 0x7; + int sib_reg2 = sib & 0x7; + if (sib_reg2 == 5) { int64_t tmp = F32S; - if (sib_reg!=4) { - if(tmp && ((tmp<-2048) || (tmp>maxval) || !i12)) { + if (sib_reg != 4) { + if (tmp && ((tmp < -2048) || (tmp > maxval) || !i12)) { // no need to zero up, as we did it below rv64_move32(dyn, ninst, scratch, tmp, 0); - if((sib>>6)) { - SLLI(ret, xRAX + sib_reg, sib >> 6); + if ((sib >> 6)) { + SLLI(ret, TO_NAT(sib_reg), sib >> 6); ADDW(ret, ret, scratch); } else { - ADDW(ret, xRAX+sib_reg, scratch); + ADDW(ret, TO_NAT(sib_reg), scratch); } ZEROUP(ret); } else { - if(sib>>6) - SLLI(ret, xRAX+sib_reg, (sib>>6)); + if (sib >> 6) + SLLI(ret, TO_NAT(sib_reg), (sib >> 6)); else - ret = xRAX+sib_reg; + ret = TO_NAT(sib_reg); *fixaddress = tmp; } } else { - switch(lock) { + switch (lock) { case 1: addLockAddress((int32_t)tmp); break; - case 2: if(isLockAddress((int32_t)tmp)) *l=1; break; + case 2: + if (isLockAddress((int32_t)tmp)) *l = 1; + break; } MOV32w(ret, tmp); } } else { - if (sib_reg!=4) { - if((sib>>6)) { - SLLI(ret, xRAX + sib_reg, (sib >> 6)); - ADDW(ret, ret, xRAX + sib_reg2); + if (sib_reg != 4) { + if ((sib >> 6)) { + SLLI(ret, TO_NAT(sib_reg), (sib >> 6)); + ADDW(ret, ret, TO_NAT(sib_reg2)); } else { - ADDW(ret, xRAX+sib_reg2, xRAX+sib_reg); + ADDW(ret, TO_NAT(sib_reg2), TO_NAT(sib_reg)); } ZEROUP(ret); } else { - ret = xRAX+sib_reg2; + ret = TO_NAT(sib_reg2); } } - } else if((nextop&7)==5) { + } else if ((nextop & 7) == 5) { uint32_t tmp = F32; MOV32w(ret, tmp); - switch(lock) { + switch (lock) { case 1: addLockAddress(tmp); break; - case 2: if(isLockAddress(tmp)) *l=1; break; + case 2: + if (isLockAddress(tmp)) *l = 1; + break; } } else { - ret = xRAX+(nextop&7); - if(ret==hint) { - AND(hint, ret, xMASK); //to clear upper part + ret = TO_NAT(nextop & 7); + if (ret == hint) { + AND(hint, ret, xMASK); // to clear upper part } } } else { int64_t i32; uint8_t sib = 0; int sib_reg = 0; - if((nextop&7)==4) { + if ((nextop & 7) == 4) { sib = F8; - sib_reg = (sib>>3)&7; + sib_reg = (sib >> 3) & 7; } - int sib_reg2 = sib&0x07; - if(nextop&0x80) + int sib_reg2 = sib & 0x07; + if (nextop & 0x80) i32 = F32S; else i32 = F8S; - if(i32==0 || ((i32>=-2048) && (i32<=maxval) && i12)) { + if (i32 == 0 || ((i32 >= -2048) && (i32 <= maxval) && i12)) { *fixaddress = i32; - if((nextop&7)==4) { - if (sib_reg!=4) { - if(sib>>6) { - SLLI(ret, xRAX + sib_reg, (sib >> 6)); - ADDW(ret, ret, xRAX + sib_reg2); + if ((nextop & 7) == 4) { + if (sib_reg != 4) { + if (sib >> 6) { + SLLI(ret, TO_NAT(sib_reg), (sib >> 6)); + ADDW(ret, ret, TO_NAT(sib_reg2)); } else { - ADDW(ret, xRAX+sib_reg2, xRAX+sib_reg); + ADDW(ret, TO_NAT(sib_reg2), TO_NAT(sib_reg)); } ZEROUP(ret); } else { - ret = xRAX+sib_reg2; + ret = TO_NAT(sib_reg2); } } else { - ret = xRAX+(nextop&0x07); + ret = TO_NAT(nextop & 0x07); } } else { - if(i32>=-2048 && i32<=2047) { - if((nextop&7)==4) { - if (sib_reg!=4) { - if(sib>>6) { - SLLI(scratch, xRAX + sib_reg, sib >> 6); - ADDW(scratch, scratch, xRAX + sib_reg2); + if (i32 >= -2048 && i32 <= 2047) { + if ((nextop & 7) == 4) { + if (sib_reg != 4) { + if (sib >> 6) { + SLLI(scratch, TO_NAT(sib_reg), sib >> 6); + ADDW(scratch, scratch, TO_NAT(sib_reg2)); } else - ADDW(scratch, xRAX+sib_reg2, xRAX+sib_reg); + ADDW(scratch, TO_NAT(sib_reg2), TO_NAT(sib_reg)); } else { - scratch = xRAX+sib_reg2; + scratch = TO_NAT(sib_reg2); } } else - scratch = xRAX+(nextop&0x07); + scratch = TO_NAT(nextop & 0x07); ADDIW(ret, scratch, i32); ZEROUP(ret); } else { // no need to zero up, as we did it below rv64_move32(dyn, ninst, scratch, i32, 0); - if((nextop&7)==4) { - if (sib_reg!=4) { - ADDW(scratch, scratch, xRAX+sib_reg2); - if(sib>>6) { - SLLI(ret, xRAX + sib_reg, (sib >> 6)); + if ((nextop & 7) == 4) { + if (sib_reg != 4) { + ADDW(scratch, scratch, TO_NAT(sib_reg2)); + if (sib >> 6) { + SLLI(ret, TO_NAT(sib_reg), (sib >> 6)); ADDW(ret, ret, scratch); } else - ADDW(ret, scratch, xRAX + sib_reg); + ADDW(ret, scratch, TO_NAT(sib_reg)); } else { - PASS3(int tmp = xRAX+sib_reg2); + PASS3(int tmp = TO_NAT(sib_reg2)); ADDW(ret, tmp, scratch); } } else { - PASS3(int tmp = xRAX+(nextop&0x07)); + PASS3(int tmp = TO_NAT(nextop & 0x07)); ADDW(ret, tmp, scratch); } ZEROUP(ret); @@ -313,144 +324,150 @@ static uintptr_t geted_32(dynarec_rv64_t* dyn, uintptr_t addr, int ninst, uint8_ } /* setup r2 to address pointed by ED, also fixaddress is an optionnal delta in the range [-absmax, +absmax], with delta&mask==0 to be added to ed for LDR/STR */ -uintptr_t geted32(dynarec_rv64_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, uint8_t* ed, uint8_t hint, uint8_t scratch, int64_t* fixaddress, rex_t rex, int *l, int i12, int delta) +uintptr_t geted32(dynarec_rv64_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, uint8_t* ed, uint8_t hint, uint8_t scratch, int64_t* fixaddress, rex_t rex, int* l, int i12, int delta) { - MAYUSE(dyn); MAYUSE(ninst); MAYUSE(delta); + MAYUSE(dyn); + MAYUSE(ninst); + MAYUSE(delta); - int lock = l?((l==LOCK_LOCK)?1:2):0; - if(lock==2) + int lock = l ? ((l == LOCK_LOCK) ? 1 : 2) : 0; + if (lock == 2) *l = 0; uint8_t ret = x2; *fixaddress = 0; - if(hint>0) ret = hint; + if (hint > 0) ret = hint; int maxval = 2047; - if(i12>1) + if (i12 > 1) maxval -= i12; MAYUSE(scratch); - if(!(nextop&0xC0)) { - if((nextop&7)==4) { + if (!(nextop & 0xC0)) { + if ((nextop & 7) == 4) { uint8_t sib = F8; - int sib_reg = ((sib>>3)&0x7)+(rex.x<<3); - int sib_reg2 = (sib&0x7)+(rex.b<<3); - if((sib&0x7)==5) { + int sib_reg = ((sib >> 3) & 0x7) + (rex.x << 3); + int sib_reg2 = (sib & 0x7) + (rex.b << 3); + if ((sib & 0x7) == 5) { int64_t tmp = F32S; - if (sib_reg!=4) { - if(tmp && ((tmp<-2048) || (tmp>maxval) || !i12)) { + if (sib_reg != 4) { + if (tmp && ((tmp < -2048) || (tmp > maxval) || !i12)) { MOV64x(scratch, tmp); - if((sib>>6)) { - SLLI(ret, xRAX + sib_reg, sib >> 6); + if ((sib >> 6)) { + SLLI(ret, TO_NAT(sib_reg), sib >> 6); ADDW(ret, ret, scratch); } else { - ADDW(ret, xRAX+sib_reg, scratch); + ADDW(ret, TO_NAT(sib_reg), scratch); } ZEROUP(ret); } else { - if(sib>>6) - SLLI(ret, xRAX+sib_reg, (sib>>6)); + if (sib >> 6) + SLLI(ret, TO_NAT(sib_reg), (sib >> 6)); else - ret = xRAX+sib_reg; + ret = TO_NAT(sib_reg); *fixaddress = tmp; } } else { - switch(lock) { + switch (lock) { case 1: addLockAddress(tmp); break; - case 2: if(isLockAddress(tmp)) *l=1; break; + case 2: + if (isLockAddress(tmp)) *l = 1; + break; } MOV64x(ret, tmp); } } else { - if (sib_reg!=4) { - if((sib>>6)) { - SLLI(ret, xRAX + sib_reg, (sib >> 6)); - ADDW(ret, ret, xRAX + sib_reg2); + if (sib_reg != 4) { + if ((sib >> 6)) { + SLLI(ret, TO_NAT(sib_reg), (sib >> 6)); + ADDW(ret, ret, TO_NAT(sib_reg2)); } else { - ADDW(ret, xRAX+sib_reg2, xRAX+sib_reg); + ADDW(ret, TO_NAT(sib_reg2), TO_NAT(sib_reg)); } ZEROUP(ret); } else { - ret = xRAX+sib_reg2; + ret = TO_NAT(sib_reg2); } } - } else if((nextop&7)==5) { + } else if ((nextop & 7) == 5) { uint32_t tmp = F32; // no need to zero up, as we did it below rv64_move32(dyn, ninst, ret, tmp, 0); - GETIP(addr+delta); + GETIP(addr + delta); ADDW(ret, ret, xRIP); ZEROUP(ret); - switch(lock) { - case 1: addLockAddress(addr+delta+tmp); break; - case 2: if(isLockAddress(addr+delta+tmp)) *l=1; break; + switch (lock) { + case 1: addLockAddress(addr + delta + tmp); break; + case 2: + if (isLockAddress(addr + delta + tmp)) *l = 1; + break; } } else { - ret = xRAX+(nextop&7)+(rex.b<<3); - if(ret==hint) { - AND(hint, ret, xMASK); //to clear upper part + ret = TO_NAT((nextop & 7) + (rex.b << 3)); + if (ret == hint) { + AND(hint, ret, xMASK); // to clear upper part } } } else { int64_t i64; uint8_t sib = 0; int sib_reg = 0; - if((nextop&7)==4) { + if ((nextop & 7) == 4) { sib = F8; - sib_reg = ((sib>>3)&7)+(rex.x<<3); + sib_reg = ((sib >> 3) & 7) + (rex.x << 3); } - int sib_reg2 = (sib&0x07)+(rex.b<<3); - if(nextop&0x80) + int sib_reg2 = (sib & 0x07) + (rex.b << 3); + if (nextop & 0x80) i64 = F32S; else i64 = F8S; - if(i64==0 || ((i64>=-2048) && (i64<=maxval) && i12)) { + if (i64 == 0 || ((i64 >= -2048) && (i64 <= maxval) && i12)) { *fixaddress = i64; - if((nextop&7)==4) { - if (sib_reg!=4) { - if(sib>>6) { - SLLI(ret, xRAX + sib_reg, (sib >> 6)); - ADDW(ret, ret, xRAX + sib_reg2); + if ((nextop & 7) == 4) { + if (sib_reg != 4) { + if (sib >> 6) { + SLLI(ret, TO_NAT(sib_reg), (sib >> 6)); + ADDW(ret, ret, TO_NAT(sib_reg2)); } else { - ADDW(ret, xRAX+sib_reg2, xRAX+sib_reg); + ADDW(ret, TO_NAT(sib_reg2), TO_NAT(sib_reg)); } ZEROUP(ret); } else { - ret = xRAX+sib_reg2; + ret = TO_NAT(sib_reg2); } } else { - ret = xRAX+(nextop&0x07)+(rex.b<<3); + ret = TO_NAT((nextop & 0x07) + (rex.b << 3)); } } else { - if(i64>=-2048 && i64<=2047) { - if((nextop&7)==4) { - if (sib_reg!=4) { - if(sib>>6) { - SLLI(scratch, xRAX + sib_reg, sib >> 6); - ADDW(scratch, scratch, xRAX + sib_reg2); + if (i64 >= -2048 && i64 <= 2047) { + if ((nextop & 7) == 4) { + if (sib_reg != 4) { + if (sib >> 6) { + SLLI(scratch, TO_NAT(sib_reg), sib >> 6); + ADDW(scratch, scratch, TO_NAT(sib_reg2)); } else - ADDW(scratch, xRAX+sib_reg2, xRAX+sib_reg); + ADDW(scratch, TO_NAT(sib_reg2), TO_NAT(sib_reg)); } else { - scratch = xRAX+sib_reg2; + scratch = TO_NAT(sib_reg2); } } else - scratch = xRAX+(nextop&0x07)+(rex.b<<3); + scratch = TO_NAT((nextop & 0x07) + (rex.b << 3)); ADDIW(ret, scratch, i64); ZEROUP(ret); } else { // no need to zero up, as we did it below rv64_move32(dyn, ninst, scratch, i64, 0); - if((nextop&7)==4) { - if (sib_reg!=4) { - ADDW(scratch, scratch, xRAX+sib_reg2); - if(sib>>6) { - SLLI(ret, xRAX + sib_reg, (sib >> 6)); + if ((nextop & 7) == 4) { + if (sib_reg != 4) { + ADDW(scratch, scratch, TO_NAT(sib_reg2)); + if (sib >> 6) { + SLLI(ret, TO_NAT(sib_reg), (sib >> 6)); ADDW(ret, ret, scratch); } else - ADDW(ret, scratch, xRAX + sib_reg); + ADDW(ret, scratch, TO_NAT(sib_reg)); } else { - PASS3(int tmp = xRAX+sib_reg2); + PASS3(int tmp = TO_NAT(sib_reg2)); ADDW(ret, tmp, scratch); } } else { - PASS3(int tmp = xRAX+(nextop&0x07)+(rex.b<<3)); + PASS3(int tmp = TO_NAT((nextop & 0x07) + (rex.b << 3))); ADDW(ret, tmp, scratch); } ZEROUP(ret); @@ -463,11 +480,13 @@ uintptr_t geted32(dynarec_rv64_t* dyn, uintptr_t addr, int ninst, uint8_t nextop void jump_to_epilog(dynarec_rv64_t* dyn, uintptr_t ip, int reg, int ninst) { - MAYUSE(dyn); MAYUSE(ip); MAYUSE(ninst); + MAYUSE(dyn); + MAYUSE(ip); + MAYUSE(ninst); MESSAGE(LOG_DUMP, "Jump to epilog\n"); - if(reg) { - if(reg!=xRIP) { + if (reg) { + if (reg != xRIP) { MV(xRIP, reg); } } else { @@ -480,11 +499,13 @@ void jump_to_epilog(dynarec_rv64_t* dyn, uintptr_t ip, int reg, int ninst) void jump_to_epilog_fast(dynarec_rv64_t* dyn, uintptr_t ip, int reg, int ninst) { - MAYUSE(dyn); MAYUSE(ip); MAYUSE(ninst); + MAYUSE(dyn); + MAYUSE(ip); + MAYUSE(ninst); MESSAGE(LOG_DUMP, "Jump to epilog_fast\n"); - if(reg) { - if(reg!=xRIP) { + if (reg) { + if (reg != xRIP) { MV(xRIP, reg); } } else { @@ -499,18 +520,19 @@ void jump_to_epilog_fast(dynarec_rv64_t* dyn, uintptr_t ip, int reg, int ninst) #endif void jump_to_next(dynarec_rv64_t* dyn, uintptr_t ip, int reg, int ninst, int is32bits) { - MAYUSE(dyn); MAYUSE(ninst); + MAYUSE(dyn); + MAYUSE(ninst); MESSAGE(LOG_DUMP, "Jump to next\n"); - if(is32bits) + if (is32bits) ip &= 0xffffffffLL; - if(reg) { - if(reg!=xRIP) { + if (reg) { + if (reg != xRIP) { MV(xRIP, reg); } NOTEST(x2); - uintptr_t tbl = is32bits?getJumpTable32():getJumpTable64(); + uintptr_t tbl = is32bits ? getJumpTable32() : getJumpTable64(); MAYUSE(tbl); TABLE64(x3, tbl); if (rv64_xtheadbb) { @@ -570,66 +592,77 @@ void jump_to_next(dynarec_rv64_t* dyn, uintptr_t ip, int reg, int ninst, int is3 MAYUSE(p); TABLE64(x3, p); GETIP_(ip); - LD(x2, x3, 0); //LR_D(x2, x3, 1, 1); + LD(x2, x3, 0); // LR_D(x2, x3, 1, 1); } - if(reg!=A1) { + if (reg != A1) { MV(A1, xRIP); } CLEARIP(); - #ifdef HAVE_TRACE - //MOVx(x3, 15); no access to PC reg - #endif +#ifdef HAVE_TRACE +// MOVx(x3, 15); no access to PC reg +#endif SMEND(); JALR((dyn->insts[ninst].x64.has_callret ? xRA : xZR), x2); } void ret_to_epilog(dynarec_rv64_t* dyn, int ninst, rex_t rex) { - MAYUSE(dyn); MAYUSE(ninst); + MAYUSE(dyn); + MAYUSE(ninst); MESSAGE(LOG_DUMP, "Ret to epilog\n"); POP1z(xRIP); MVz(x1, xRIP); SMEND(); if (box64_dynarec_callret) { // pop the actual return address from RV64 stack - LD(xRA, xSP, 0); // native addr - LD(x6, xSP, 8); // x86 addr - ADDI(xSP, xSP, 16); // pop - BNE(x6, xRIP, 2*4); // is it the right address? + LD(xRA, xSP, 0); // native addr + LD(x6, xSP, 8); // x86 addr + ADDI(xSP, xSP, 16); // pop + BNE(x6, xRIP, 2 * 4); // is it the right address? BR(xRA); // not the correct return address, regular jump, but purge the stack first, it's unsync now... LD(xSP, xEmu, offsetof(x64emu_t, xSPSave)); ADDI(xSP, xSP, -16); } - uintptr_t tbl = rex.is32bits?getJumpTable32():getJumpTable64(); + uintptr_t tbl = rex.is32bits ? getJumpTable32() : getJumpTable64(); MOV64x(x3, tbl); - if(!rex.is32bits) { + if (!rex.is32bits) { SRLI(x2, xRIP, JMPTABL_START3); - if(rv64_zba) SH3ADD(x3, x2, x3); else {SLLI(x2, x2, 3); ADD(x3, x3, x2);} + if (rv64_zba) + SH3ADD(x3, x2, x3); + else { + SLLI(x2, x2, 3); + ADD(x3, x3, x2); + } LD(x3, x3, 0); } - MOV64x(x4, JMPTABLE_MASK2<<3); // x4 = mask - SRLI(x2, xRIP, JMPTABL_START2-3); + MOV64x(x4, JMPTABLE_MASK2 << 3); // x4 = mask + SRLI(x2, xRIP, JMPTABL_START2 - 3); AND(x2, x2, x4); ADD(x3, x3, x2); LD(x3, x3, 0); - if(JMPTABLE_MASK2!=JMPTABLE_MASK1) { - MOV64x(x4, JMPTABLE_MASK1<<3); // x4 = mask + if (JMPTABLE_MASK2 != JMPTABLE_MASK1) { + MOV64x(x4, JMPTABLE_MASK1 << 3); // x4 = mask } - SRLI(x2, xRIP, JMPTABL_START1-3); + SRLI(x2, xRIP, JMPTABL_START1 - 3); AND(x2, x2, x4); ADD(x3, x3, x2); LD(x3, x3, 0); - if(JMPTABLE_MASK0<2048) { + if (JMPTABLE_MASK0 < 2048) { ANDI(x2, xRIP, JMPTABLE_MASK0); } else { - if(JMPTABLE_MASK1!=JMPTABLE_MASK0) { - MOV64x(x4, JMPTABLE_MASK0); // x4 = mask + if (JMPTABLE_MASK1 != JMPTABLE_MASK0) { + MOV64x(x4, JMPTABLE_MASK0); // x4 = mask } AND(x2, xRIP, x4); } - if(rv64_zba) SH3ADD(x3, x2, x3); else {SLLI(x2, x2, 3); ADD(x3, x3, x2);} + if (rv64_zba) + SH3ADD(x3, x2, x3); + else { + SLLI(x2, x2, 3); + ADD(x3, x3, x2); + } LD(x2, x3, 0); BR(x2); CLEARIP(); @@ -637,11 +670,12 @@ void ret_to_epilog(dynarec_rv64_t* dyn, int ninst, rex_t rex) void retn_to_epilog(dynarec_rv64_t* dyn, int ninst, rex_t rex, int n) { - MAYUSE(dyn); MAYUSE(ninst); + MAYUSE(dyn); + MAYUSE(ninst); MESSAGE(LOG_DUMP, "Retn to epilog\n"); POP1z(xRIP); - if(n>0x7ff) { - MOV64x(w1, n); + if (n > 0x7ff) { + MOV64x(x1, n); ADDz(xRSP, xRSP, x1); } else { ADDIz(xRSP, xRSP, n); @@ -650,43 +684,53 @@ void retn_to_epilog(dynarec_rv64_t* dyn, int ninst, rex_t rex, int n) SMEND(); if (box64_dynarec_callret) { // pop the actual return address from RV64 stack - LD(xRA, xSP, 0); // native addr - LD(x6, xSP, 8); // x86 addr - ADDI(xSP, xSP, 16); // pop - BNE(x6, xRIP, 2*4); // is it the right address? + LD(xRA, xSP, 0); // native addr + LD(x6, xSP, 8); // x86 addr + ADDI(xSP, xSP, 16); // pop + BNE(x6, xRIP, 2 * 4); // is it the right address? BR(xRA); // not the correct return address, regular jump, but purge the stack first, it's unsync now... LD(xSP, xEmu, offsetof(x64emu_t, xSPSave)); ADDI(xSP, xSP, -16); } - uintptr_t tbl = rex.is32bits?getJumpTable32():getJumpTable64(); + uintptr_t tbl = rex.is32bits ? getJumpTable32() : getJumpTable64(); MOV64x(x3, tbl); - if(!rex.is32bits) { + if (!rex.is32bits) { SRLI(x2, xRIP, JMPTABL_START3); - if(rv64_zba) SH3ADD(x3, x2, x3); else {SLLI(x2, x2, 3); ADD(x3, x3, x2);} + if (rv64_zba) + SH3ADD(x3, x2, x3); + else { + SLLI(x2, x2, 3); + ADD(x3, x3, x2); + } LD(x3, x3, 0); } - MOV64x(x4, JMPTABLE_MASK2<<3); // x4 = mask - SRLI(x2, xRIP, JMPTABL_START2-3); + MOV64x(x4, JMPTABLE_MASK2 << 3); // x4 = mask + SRLI(x2, xRIP, JMPTABL_START2 - 3); AND(x2, x2, x4); ADD(x3, x3, x2); LD(x3, x3, 0); - if(JMPTABLE_MASK2!=JMPTABLE_MASK1) { - MOV64x(x4, JMPTABLE_MASK1<<3); // x4 = mask + if (JMPTABLE_MASK2 != JMPTABLE_MASK1) { + MOV64x(x4, JMPTABLE_MASK1 << 3); // x4 = mask } - SRLI(x2, xRIP, JMPTABL_START1-3); + SRLI(x2, xRIP, JMPTABL_START1 - 3); AND(x2, x2, x4); ADD(x3, x3, x2); LD(x3, x3, 0); - if(JMPTABLE_MASK0<2048) { + if (JMPTABLE_MASK0 < 2048) { ANDI(x2, xRIP, JMPTABLE_MASK0); } else { - if(JMPTABLE_MASK1!=JMPTABLE_MASK0) { - MOV64x(x4, JMPTABLE_MASK0); // x4 = mask + if (JMPTABLE_MASK1 != JMPTABLE_MASK0) { + MOV64x(x4, JMPTABLE_MASK0); // x4 = mask } AND(x2, xRIP, x4); } - if(rv64_zba) SH3ADD(x3, x2, x3); else {SLLI(x2, x2, 3); ADD(x3, x3, x2);} + if (rv64_zba) + SH3ADD(x3, x2, x3); + else { + SLLI(x2, x2, 3); + ADD(x3, x3, x2); + } LD(x2, x3, 0); BR(x2); CLEARIP(); @@ -694,11 +738,11 @@ void retn_to_epilog(dynarec_rv64_t* dyn, int ninst, rex_t rex, int n) void iret_to_epilog(dynarec_rv64_t* dyn, int ninst, int is64bits) { - //#warning TODO: is64bits + // #warning TODO: is64bits MAYUSE(ninst); MESSAGE(LOG_DUMP, "IRet to epilog\n"); NOTEST(x2); - if(is64bits) { + if (is64bits) { POP1(xRIP); POP1(x2); POP1(xFlags); @@ -717,11 +761,11 @@ void iret_to_epilog(dynarec_rv64_t* dyn, int ninst, int is64bits) SET_DFNONE(); // POP RSP if (is64bits) { - POP1(x3); //rsp - POP1(x2); //ss + POP1(x3); // rsp + POP1(x2); // ss } else { - POP1_32(x3); //rsp - POP1_32(x2); //ss + POP1_32(x3); // rsp + POP1_32(x2); // ss } // POP SS SH(x2, xEmu, offsetof(x64emu_t, segs[_SS])); @@ -729,7 +773,7 @@ void iret_to_epilog(dynarec_rv64_t* dyn, int ninst, int is64bits) // set new RSP MV(xRSP, x3); // Ret.... - MOV64x(x2, (uintptr_t)rv64_epilog); // epilog on purpose, CS might have changed! + MOV64x(x2, (uintptr_t)rv64_epilog); // epilog on purpose, CS might have changed! SMEND(); BR(x2); CLEARIP(); @@ -738,15 +782,15 @@ void iret_to_epilog(dynarec_rv64_t* dyn, int ninst, int is64bits) void call_c(dynarec_rv64_t* dyn, int ninst, void* fnc, int reg, int ret, int saveflags, int savereg) { MAYUSE(fnc); - if(savereg==0) + if (savereg == 0) savereg = x6; - if(saveflags) { + if (saveflags) { FLAGS_ADJUST_TO11(xFlags, xFlags, reg); SD(xFlags, xEmu, offsetof(x64emu_t, eflags)); } fpu_pushcache(dyn, ninst, reg, 0); - if(ret!=-2) { - SUBI(xSP, xSP, 16); // RV64 stack needs to be 16byte aligned + if (ret != -2) { + SUBI(xSP, xSP, 16); // RV64 stack needs to be 16byte aligned SD(xEmu, xSP, 0); SD(savereg, xSP, 8); // x5..x8, x10..x17, x28..x31 those needs to be saved by caller @@ -761,14 +805,15 @@ void call_c(dynarec_rv64_t* dyn, int ninst, void* fnc, int reg, int ret, int sav } TABLE64(reg, (uintptr_t)fnc); JALR(xRA, reg); - if(ret>=0) { + if (ret >= 0) { MV(ret, xEmu); } - if(ret!=-2) { + if (ret != -2) { LD(xEmu, xSP, 0); LD(savereg, xSP, 8); ADDI(xSP, xSP, 16); - #define GO(A) if(ret!=x##A) {LOAD_REG(A);} +#define GO(A) \ + if (ret != x##A) { LOAD_REG(A); } GO(RAX); GO(RCX); GO(RDX); @@ -776,9 +821,9 @@ void call_c(dynarec_rv64_t* dyn, int ninst, void* fnc, int reg, int ret, int sav GO(R13); GO(R14); GO(R15); - if(ret!=xRIP) + if (ret != xRIP) LD(xRIP, xEmu, offsetof(x64emu_t, ip)); - #undef GO +#undef GO } // regenerate mask XORI(xMASK, xZR, -1); @@ -789,11 +834,11 @@ void call_c(dynarec_rv64_t* dyn, int ninst, void* fnc, int reg, int ret, int sav vector_vsetvli(dyn, ninst, x3, dyn->vector_sew, VECTOR_LMUL1, 1); fpu_popcache(dyn, ninst, reg, 0); - if(saveflags) { + if (saveflags) { LD(xFlags, xEmu, offsetof(x64emu_t, eflags)); FLAGS_ADJUST_FROM11(xFlags, xFlags, reg); } - //SET_NODF(); + // SET_NODF(); CLEARIP(); } @@ -833,10 +878,10 @@ void call_n(dynarec_rv64_t* dyn, int ninst, void* fnc, int w) MV(A4, xR8); MV(A5, xR9); // native call - TABLE64(xRAX, (uintptr_t)fnc); // using xRAX as scratch regs for call address + TABLE64(xRAX, (uintptr_t)fnc); // using xRAX as scratch regs for call address JALR(xRA, xRAX); // put return value in x64 regs - if(w>0) { + if (w > 0) { MV(xRAX, A0); MV(xRDX, A1); } @@ -859,7 +904,7 @@ void call_n(dynarec_rv64_t* dyn, int ninst, void* fnc, int w) fpu_popcache(dyn, ninst, x3, 1); LD(xFlags, xEmu, offsetof(x64emu_t, eflags)); FLAGS_ADJUST_FROM11(xFlags, xFlags, x3); - //SET_NODF(); + // SET_NODF(); } void grab_segdata(dynarec_rv64_t* dyn, uintptr_t addr, int ninst, int reg, int segment) @@ -867,14 +912,14 @@ void grab_segdata(dynarec_rv64_t* dyn, uintptr_t addr, int ninst, int reg, int s (void)addr; int64_t j64; MAYUSE(j64); - MESSAGE(LOG_DUMP, "Get %s Offset\n", (segment==_FS)?"FS":"GS"); + MESSAGE(LOG_DUMP, "Get %s Offset\n", (segment == _FS) ? "FS" : "GS"); int t1 = x1, t2 = x4; - if(reg==t1) ++t1; - if(reg==t2) ++t2; + if (reg == t1) ++t1; + if (reg == t2) ++t2; LWU(t2, xEmu, offsetof(x64emu_t, segs_serial[segment])); LD(reg, xEmu, offsetof(x64emu_t, segs_offs[segment])); - if(segment==_GS) { - CBNZ_MARKSEG(t2); // fast check + if (segment == _GS) { + CBNZ_MARKSEG(t2); // fast check } else { LD(t1, xEmu, offsetof(x64emu_t, context)); LWU(t1, t1, offsetof(box64context_t, sel_serial)); @@ -884,15 +929,15 @@ void grab_segdata(dynarec_rv64_t* dyn, uintptr_t addr, int ninst, int reg, int s MOV64x(x1, segment); call_c(dyn, ninst, GetSegmentBaseEmu, t2, reg, 0, xFlags); MARKSEG; - MESSAGE(LOG_DUMP, "----%s Offset\n", (segment==_FS)?"FS":"GS"); + MESSAGE(LOG_DUMP, "----%s Offset\n", (segment == _FS) ? "FS" : "GS"); } int x87_stackcount(dynarec_rv64_t* dyn, int ninst, int scratch) { MAYUSE(scratch); - if(!dyn->e.x87stack) + if (!dyn->e.x87stack) return 0; - if(dyn->e.mmxcount) + if (dyn->e.mmxcount) mmx_purgecache(dyn, ninst, 0, scratch); MESSAGE(LOG_DUMP, "\tSynch x87 Stackcount (%d)\n", dyn->e.x87stack); int a = dyn->e.x87stack; @@ -916,9 +961,9 @@ int x87_stackcount(dynarec_rv64_t* dyn, int ninst, int scratch) void x87_unstackcount(dynarec_rv64_t* dyn, int ninst, int scratch, int count) { MAYUSE(scratch); - if(!count) + if (!count) return; - if(dyn->e.mmxcount) + if (dyn->e.mmxcount) mmx_purgecache(dyn, ninst, 0, scratch); MESSAGE(LOG_DUMP, "\tSynch x87 Unstackcount (%d)\n", count); int a = -count; @@ -941,7 +986,7 @@ int extcache_st_coherency(dynarec_rv64_t* dyn, int ninst, int a, int b) { int i1 = extcache_get_st(dyn, ninst, a); int i2 = extcache_get_st(dyn, ninst, b); - if(i1!=i2) { + if (i1 != i2) { MESSAGE(LOG_DUMP, "Warning, ST cache incoherent between ST%d(%d) and ST%d(%d)\n", a, i1, b, i2); } @@ -953,32 +998,32 @@ int extcache_st_coherency(dynarec_rv64_t* dyn, int ninst, int a, int b) // the reg returned is *2 for FLOAT int x87_do_push(dynarec_rv64_t* dyn, int ninst, int s1, int t) { - if(dyn->e.mmxcount) + if (dyn->e.mmxcount) mmx_purgecache(dyn, ninst, 0, s1); - dyn->e.x87stack+=1; - dyn->e.stack+=1; - dyn->e.stack_next+=1; - dyn->e.stack_push+=1; + dyn->e.x87stack += 1; + dyn->e.stack += 1; + dyn->e.stack_next += 1; + dyn->e.stack_push += 1; ++dyn->e.pushed; - if(dyn->e.poped) + if (dyn->e.poped) --dyn->e.poped; // move all regs in cache, and find a free one - for(int j=0; j<24; ++j) + for (int j = 0; j < 24; ++j) if ((dyn->e.extcache[j].t == EXT_CACHE_ST_D) || (dyn->e.extcache[j].t == EXT_CACHE_ST_F) || (dyn->e.extcache[j].t == EXT_CACHE_ST_I64)) ++dyn->e.extcache[j].n; int ret = -1; - dyn->e.tags<<=2; - for(int i=0; i<8; ++i) - if(dyn->e.x87cache[i]!=-1) + dyn->e.tags <<= 2; + for (int i = 0; i < 8; ++i) + if (dyn->e.x87cache[i] != -1) ++dyn->e.x87cache[i]; - else if(ret==-1) { + else if (ret == -1) { dyn->e.x87cache[i] = 0; - ret=dyn->e.x87reg[i]=fpu_get_reg_x87(dyn, t, 0); + ret = dyn->e.x87reg[i] = fpu_get_reg_x87(dyn, t, 0); dyn->e.extcache[EXTIDX(ret)].t = X87_ST0; } - if(ret==-1) { + if (ret == -1) { MESSAGE(LOG_DUMP, "Incoherent x87 stack cache, aborting\n"); dyn->abort = 1; } @@ -986,41 +1031,41 @@ int x87_do_push(dynarec_rv64_t* dyn, int ninst, int s1, int t) } void x87_do_push_empty(dynarec_rv64_t* dyn, int ninst, int s1) { - if(dyn->e.mmxcount) + if (dyn->e.mmxcount) mmx_purgecache(dyn, ninst, 0, s1); - dyn->e.x87stack+=1; - dyn->e.stack+=1; - dyn->e.stack_next+=1; - dyn->e.stack_push+=1; + dyn->e.x87stack += 1; + dyn->e.stack += 1; + dyn->e.stack_next += 1; + dyn->e.stack_push += 1; ++dyn->e.pushed; - if(dyn->e.poped) + if (dyn->e.poped) --dyn->e.poped; // move all regs in cache - for(int j=0; j<24; ++j) + for (int j = 0; j < 24; ++j) if ((dyn->e.extcache[j].t == EXT_CACHE_ST_D) || (dyn->e.extcache[j].t == EXT_CACHE_ST_F) || (dyn->e.extcache[j].t == EXT_CACHE_ST_I64)) ++dyn->e.extcache[j].n; int ret = -1; - dyn->e.tags<<=2; - for(int i=0; i<8; ++i) - if(dyn->e.x87cache[i]!=-1) + dyn->e.tags <<= 2; + for (int i = 0; i < 8; ++i) + if (dyn->e.x87cache[i] != -1) ++dyn->e.x87cache[i]; - else if(ret==-1) + else if (ret == -1) ret = i; - if(ret==-1) { + if (ret == -1) { MESSAGE(LOG_DUMP, "Incoherent x87 stack cache, aborting\n"); dyn->abort = 1; } - if(s1) + if (s1) x87_stackcount(dyn, ninst, s1); } static void internal_x87_dopop(dynarec_rv64_t* dyn) { - for(int i=0; i<8; ++i) - if(dyn->e.x87cache[i]!=-1) { + for (int i = 0; i < 8; ++i) + if (dyn->e.x87cache[i] != -1) { --dyn->e.x87cache[i]; - if(dyn->e.x87cache[i]==-1) { + if (dyn->e.x87cache[i] == -1) { fpu_free_reg(dyn, dyn->e.x87reg[i]); dyn->e.x87reg[i] = -1; } @@ -1028,7 +1073,7 @@ static void internal_x87_dopop(dynarec_rv64_t* dyn) } static int internal_x87_dofree(dynarec_rv64_t* dyn) { - if(dyn->e.tags&0b11) { + if (dyn->e.tags & 0b11) { MESSAGE(LOG_DUMP, "\t--------x87 FREED ST0, poping 1 more\n"); return 1; } @@ -1036,34 +1081,34 @@ static int internal_x87_dofree(dynarec_rv64_t* dyn) } void x87_do_pop(dynarec_rv64_t* dyn, int ninst, int s1) { - if(dyn->e.mmxcount) + if (dyn->e.mmxcount) mmx_purgecache(dyn, ninst, 0, s1); do { - dyn->e.x87stack-=1; - dyn->e.stack_next-=1; - dyn->e.stack_pop+=1; - dyn->e.tags>>=2; + dyn->e.x87stack -= 1; + dyn->e.stack_next -= 1; + dyn->e.stack_pop += 1; + dyn->e.tags >>= 2; ++dyn->e.poped; - if(dyn->e.pushed) + if (dyn->e.pushed) --dyn->e.pushed; // move all regs in cache, poping ST0 internal_x87_dopop(dyn); - } while(internal_x87_dofree(dyn)); + } while (internal_x87_dofree(dyn)); } void x87_purgecache(dynarec_rv64_t* dyn, int ninst, int next, int s1, int s2, int s3) { int ret = 0; - for (int i=0; i<8 && !ret; ++i) - if(dyn->e.x87cache[i] != -1) + for (int i = 0; i < 8 && !ret; ++i) + if (dyn->e.x87cache[i] != -1) ret = 1; - if(!ret && !dyn->e.x87stack) // nothing to do + if (!ret && !dyn->e.x87stack) // nothing to do return; - MESSAGE(LOG_DUMP, "\tPurge %sx87 Cache and Synch Stackcount (%+d)---\n", next?"locally ":"", dyn->e.x87stack); + MESSAGE(LOG_DUMP, "\tPurge %sx87 Cache and Synch Stackcount (%+d)---\n", next ? "locally " : "", dyn->e.x87stack); int a = dyn->e.x87stack; - if(a!=0) { + if (a != 0) { // reset x87stack - if(!next) + if (!next) dyn->e.x87stack = 0; // Add x87stack to emu fpu_stack LW(s2, xEmu, offsetof(x64emu_t, fpu_stack)); @@ -1072,7 +1117,7 @@ void x87_purgecache(dynarec_rv64_t* dyn, int ninst, int next, int s1, int s2, in // Sub x87stack to top, with and 7 LW(s2, xEmu, offsetof(x64emu_t, top)); // update tags (and top at the same time) - if(a>0) { + if (a > 0) { SUBI(s2, s2, a); } else { ADDI(s2, s2, -a); @@ -1081,86 +1126,91 @@ void x87_purgecache(dynarec_rv64_t* dyn, int ninst, int next, int s1, int s2, in SW(s2, xEmu, offsetof(x64emu_t, top)); // update tags (and top at the same time) LHU(s1, xEmu, offsetof(x64emu_t, fpu_tags)); - if(a>0) { - SLLI(s1, s1, a*2); + if (a > 0) { + SLLI(s1, s1, a * 2); } else { - SLLI(s3, xMASK, 16); // 0xffff0000 (plus some unused hipart) + SLLI(s3, xMASK, 16); // 0xffff0000 (plus some unused hipart) OR(s1, s1, s3); - SRLI(s1, s1, -a*2); + SRLI(s1, s1, -a * 2); } SH(s1, xEmu, offsetof(x64emu_t, fpu_tags)); } else { LW(s2, xEmu, offsetof(x64emu_t, top)); } // check if free is used - if(dyn->e.tags) { + if (dyn->e.tags) { LH(s1, xEmu, offsetof(x64emu_t, fpu_tags)); MOV32w(s3, dyn->e.tags); OR(s1, s1, s3); SH(s1, xEmu, offsetof(x64emu_t, fpu_tags)); } - if(ret!=0) { + if (ret != 0) { // --- set values // Get top // loop all cache entries - for (int i=0; i<8; ++i) - if(dyn->e.x87cache[i]!=-1) { - int st = dyn->e.x87cache[i]+dyn->e.stack_pop; - #if STEP == 1 - if(!next) { // don't force promotion here + for (int i = 0; i < 8; ++i) + if (dyn->e.x87cache[i] != -1) { + int st = dyn->e.x87cache[i] + dyn->e.stack_pop; +#if STEP == 1 + if (!next) { // don't force promotion here // pre-apply pop, because purge happens in-between extcache_promote_double(dyn, ninst, st); } - #endif - #if STEP == 3 - if(!next && extcache_get_current_st(dyn, ninst, st) != EXT_CACHE_ST_D) { +#endif +#if STEP == 3 + if (!next && extcache_get_current_st(dyn, ninst, st) != EXT_CACHE_ST_D) { MESSAGE(LOG_DUMP, "Warning, incoherency with purged ST%d cache\n", st); } - #endif +#endif ADDI(s3, s2, dyn->e.x87cache[i]); // unadjusted count, as it's relative to real top - ANDI(s3, s3, 7); // (emu->top + st)&7 - if(rv64_zba) SH3ADD(s1, s3, xEmu); else {SLLI(s1, s3, 3); ADD(s1, xEmu, s1);} - switch(extcache_get_current_st(dyn, ninst, st)) { + ANDI(s3, s3, 7); // (emu->top + st)&7 + if (rv64_zba) + SH3ADD(s1, s3, xEmu); + else { + SLLI(s1, s3, 3); + ADD(s1, xEmu, s1); + } + switch (extcache_get_current_st(dyn, ninst, st)) { case EXT_CACHE_ST_D: - FSD(dyn->e.x87reg[i], s1, offsetof(x64emu_t, x87)); // save the value + FSD(dyn->e.x87reg[i], s1, offsetof(x64emu_t, x87)); // save the value break; case EXT_CACHE_ST_F: FCVTDS(SCRATCH0, dyn->e.x87reg[i]); - FSD(SCRATCH0, s1, offsetof(x64emu_t, x87)); // save the value + FSD(SCRATCH0, s1, offsetof(x64emu_t, x87)); // save the value break; case EXT_CACHE_ST_I64: FMVXD(s2, dyn->e.x87reg[i]); FCVTDL(SCRATCH0, s2, RD_RTZ); - FSD(SCRATCH0, s1, offsetof(x64emu_t, x87)); // save the value + FSD(SCRATCH0, s1, offsetof(x64emu_t, x87)); // save the value break; } - if(!next) { + if (!next) { fpu_free_reg(dyn, dyn->e.x87reg[i]); dyn->e.x87reg[i] = -1; dyn->e.x87cache[i] = -1; - //dyn->e.stack_pop+=1; //no pop, but the purge because of barrier will have the n.barrier flags set + // dyn->e.stack_pop+=1; //no pop, but the purge because of barrier will have the n.barrier flags set } } } - if(!next) { + if (!next) { dyn->e.stack_next = 0; dyn->e.tags = 0; - #if STEP < 2 +#if STEP < 2 // refresh the cached valued, in case it's a purge outside a instruction dyn->insts[ninst].e.barrier = 1; dyn->e.pushed = 0; dyn->e.poped = 0; - #endif +#endif } MESSAGE(LOG_DUMP, "\t---Purge x87 Cache and Synch Stackcount\n"); } static void x87_reflectcache(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3) { - //Sync top and stack count + // Sync top and stack count int a = dyn->e.x87stack; - if(a) { + if (a) { // Add x87stack to emu fpu_stack LW(s2, xEmu, offsetof(x64emu_t, fpu_stack)); ADDI(s2, s2, a); @@ -1172,33 +1222,38 @@ static void x87_reflectcache(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int SW(s2, xEmu, offsetof(x64emu_t, top)); // update tags (and top at the same time) LH(s1, xEmu, offsetof(x64emu_t, fpu_tags)); - if(a>0) { - SLLI(s1, s1, a*2); + if (a > 0) { + SLLI(s1, s1, a * 2); } else { - SLLI(s3, xMASK, 16); // 0xffff0000 + SLLI(s3, xMASK, 16); // 0xffff0000 OR(s1, s1, s3); - SRLI(s1, s1, -a*2); + SRLI(s1, s1, -a * 2); } SH(s1, xEmu, offsetof(x64emu_t, fpu_tags)); } int ret = 0; - for (int i=0; (i<8) && (!ret); ++i) - if(dyn->e.x87cache[i] != -1) + for (int i = 0; (i < 8) && (!ret); ++i) + if (dyn->e.x87cache[i] != -1) ret = 1; - if(!ret) // nothing to do + if (!ret) // nothing to do return; // prepare offset to fpu => s1 // Get top - if(!a) { + if (!a) { LW(s2, xEmu, offsetof(x64emu_t, top)); } // loop all cache entries - for (int i=0; i<8; ++i) - if(dyn->e.x87cache[i]!=-1) { + for (int i = 0; i < 8; ++i) + if (dyn->e.x87cache[i] != -1) { ADDI(s3, s2, dyn->e.x87cache[i]); - ANDI(s3, s3, 7); // (emu->top + i)&7 - if(rv64_zba) SH3ADD(s1, s3, xEmu); else {SLLI(s1, s3, 3); ADD(s1, xEmu, s1);} - if(extcache_get_st_f(dyn, ninst, dyn->e.x87cache[i])>=0) { + ANDI(s3, s3, 7); // (emu->top + i)&7 + if (rv64_zba) + SH3ADD(s1, s3, xEmu); + else { + SLLI(s1, s3, 3); + ADD(s1, xEmu, s1); + } + if (extcache_get_st_f(dyn, ninst, dyn->e.x87cache[i]) >= 0) { FCVTDS(SCRATCH0, dyn->e.x87reg[i]); FSD(SCRATCH0, s1, offsetof(x64emu_t, x87)); } else @@ -1210,7 +1265,7 @@ static void x87_unreflectcache(dynarec_rv64_t* dyn, int ninst, int s1, int s2, i { // revert top and stack count int a = dyn->e.x87stack; - if(a) { + if (a) { // Sub x87stack to emu fpu_stack LW(s2, xEmu, offsetof(x64emu_t, fpu_stack)); SUBI(s2, s2, a); @@ -1222,12 +1277,12 @@ static void x87_unreflectcache(dynarec_rv64_t* dyn, int ninst, int s1, int s2, i SW(s2, xEmu, offsetof(x64emu_t, top)); // update tags LH(s1, xEmu, offsetof(x64emu_t, fpu_tags)); - if(a>0) { - SLLI(s3, xMASK, 16); // 0xffff0000 + if (a > 0) { + SLLI(s3, xMASK, 16); // 0xffff0000 OR(s1, s1, s3); - SRLI(s1, s1, a*2); + SRLI(s1, s1, a * 2); } else { - SLLI(s1, s1, -a*2); + SLLI(s1, s1, -a * 2); } SH(s1, xEmu, offsetof(x64emu_t, fpu_tags)); } @@ -1236,9 +1291,9 @@ static void x87_unreflectcache(dynarec_rv64_t* dyn, int ninst, int s1, int s2, i int x87_get_current_cache(dynarec_rv64_t* dyn, int ninst, int st, int t) { // search in cache first - for (int i=0; i<8; ++i) { - if(dyn->e.x87cache[i]==st) { - #if STEP == 1 + for (int i = 0; i < 8; ++i) { + if (dyn->e.x87cache[i] == st) { +#if STEP == 1 if (t == EXT_CACHE_ST_D && (dyn->e.extcache[EXTIDX(dyn->e.x87reg[i])].t == EXT_CACHE_ST_F || dyn->e.extcache[EXTIDX(dyn->e.x87reg[i])].t == EXT_CACHE_ST_I64)) extcache_promote_double(dyn, ninst, st); else if (t == EXT_CACHE_ST_I64 && (dyn->e.extcache[EXTIDX(dyn->e.x87reg[i])].t == EXT_CACHE_ST_F)) @@ -1248,34 +1303,39 @@ int x87_get_current_cache(dynarec_rv64_t* dyn, int ninst, int st, int t) #endif return i; } - assert(dyn->e.x87cache[i]<8); + assert(dyn->e.x87cache[i] < 8); } return -1; } int x87_get_cache(dynarec_rv64_t* dyn, int ninst, int populate, int s1, int s2, int st, int t) { - if(dyn->e.mmxcount) + if (dyn->e.mmxcount) mmx_purgecache(dyn, ninst, 0, s1); int ret = x87_get_current_cache(dyn, ninst, st, t); - if(ret!=-1) + if (ret != -1) return ret; - MESSAGE(LOG_DUMP, "\tCreate %sx87 Cache for ST%d\n", populate?"and populate ":"", st); + MESSAGE(LOG_DUMP, "\tCreate %sx87 Cache for ST%d\n", populate ? "and populate " : "", st); // get a free spot - for (int i=0; (i<8) && (ret==-1); ++i) - if(dyn->e.x87cache[i]==-1) + for (int i = 0; (i < 8) && (ret == -1); ++i) + if (dyn->e.x87cache[i] == -1) ret = i; // found, setup and grab the value dyn->e.x87cache[ret] = st; dyn->e.x87reg[ret] = fpu_get_reg_x87(dyn, EXT_CACHE_ST_D, st); - if(populate) { + if (populate) { LW(s2, xEmu, offsetof(x64emu_t, top)); int a = st - dyn->e.x87stack; - if(a) { + if (a) { ADDI(s2, s2, a); ANDI(s2, s2, 7); } - if(rv64_zba) SH3ADD(s1, s2, xEmu); else {SLLI(s2, s2, 3); ADD(s1, xEmu, s2);} + if (rv64_zba) + SH3ADD(s1, s2, xEmu); + else { + SLLI(s2, s2, 3); + ADD(s1, xEmu, s2); + } FLD(dyn->e.x87reg[ret], s1, offsetof(x64emu_t, x87)); } MESSAGE(LOG_DUMP, "\t-------x87 Cache for ST%d\n", st); @@ -1284,7 +1344,7 @@ int x87_get_cache(dynarec_rv64_t* dyn, int ninst, int populate, int s1, int s2, } int x87_get_extcache(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int st) { - for(int ii=0; ii<24; ++ii) + for (int ii = 0; ii < 24; ++ii) if ((dyn->e.extcache[ii].t == EXT_CACHE_ST_F || dyn->e.extcache[ii].t == EXT_CACHE_ST_D || dyn->e.extcache[ii].t == EXT_CACHE_ST_I64) @@ -1306,10 +1366,10 @@ int x87_get_st_empty(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int a, int void x87_refresh(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int st) { int ret = -1; - for (int i=0; (i<8) && (ret==-1); ++i) - if(dyn->e.x87cache[i] == st) + for (int i = 0; (i < 8) && (ret == -1); ++i) + if (dyn->e.x87cache[i] == st) ret = i; - if(ret==-1) // nothing to do + if (ret == -1) // nothing to do return; MESSAGE(LOG_DUMP, "\tRefresh x87 Cache for ST%d\n", st); const int reg = dyn->e.x87reg[ret]; @@ -1318,11 +1378,16 @@ void x87_refresh(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int st) LW(s2, xEmu, offsetof(x64emu_t, top)); // Update int a = st - dyn->e.x87stack; - if(a) { + if (a) { ADDI(s2, s2, a); - ANDI(s2, s2, 7); // (emu->top + i)&7 + ANDI(s2, s2, 7); // (emu->top + i)&7 + } + if (rv64_zba) + SH3ADD(s1, s2, xEmu); + else { + SLLI(s2, s2, 3); + ADD(s1, xEmu, s2); } - if(rv64_zba) SH3ADD(s1, s2, xEmu); else {SLLI(s2, s2, 3); ADD(s1, xEmu, s2);} if (dyn->e.extcache[EXTIDX(reg)].t == EXT_CACHE_ST_F) { FCVTDS(SCRATCH0, reg); FSD(SCRATCH0, s1, offsetof(x64emu_t, x87)); @@ -1339,28 +1404,33 @@ void x87_refresh(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int st) void x87_forget(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int st) { int ret = -1; - for (int i=0; (i<8) && (ret==-1); ++i) - if(dyn->e.x87cache[i] == st) + for (int i = 0; (i < 8) && (ret == -1); ++i) + if (dyn->e.x87cache[i] == st) ret = i; - if(ret==-1) // nothing to do + if (ret == -1) // nothing to do return; MESSAGE(LOG_DUMP, "\tForget x87 Cache for ST%d\n", st); const int reg = dyn->e.x87reg[ret]; - #if STEP == 1 +#if STEP == 1 if (dyn->e.extcache[EXTIDX(dyn->e.x87reg[ret])].t == EXT_CACHE_ST_F || dyn->e.extcache[EXTIDX(dyn->e.x87reg[ret])].t == EXT_CACHE_ST_I64) extcache_promote_double(dyn, ninst, st); - #endif +#endif // prepare offset to fpu => s1 // Get top LW(s2, xEmu, offsetof(x64emu_t, top)); // Update int a = st - dyn->e.x87stack; - if(a) { + if (a) { ADDI(s2, s2, a); - ANDI(s2, s2, 7); // (emu->top + i)&7 + ANDI(s2, s2, 7); // (emu->top + i)&7 + } + if (rv64_zba) + SH3ADD(s1, s2, xEmu); + else { + SLLI(s2, s2, 3); + ADD(s1, xEmu, s2); } - if(rv64_zba) SH3ADD(s1, s2, xEmu); else {SLLI(s2, s2, 3); ADD(s1, xEmu, s2);} if (dyn->e.extcache[EXTIDX(reg)].t == EXT_CACHE_ST_F) { FCVTDS(SCRATCH0, reg); FSD(SCRATCH0, s1, offsetof(x64emu_t, x87)); @@ -1381,25 +1451,30 @@ void x87_forget(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int st) void x87_reget_st(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int st) { - if(dyn->e.mmxcount) + if (dyn->e.mmxcount) mmx_purgecache(dyn, ninst, 0, s1); // search in cache first - for (int i=0; i<8; ++i) - if(dyn->e.x87cache[i]==st) { + for (int i = 0; i < 8; ++i) + if (dyn->e.x87cache[i] == st) { // refresh the value MESSAGE(LOG_DUMP, "\tRefresh x87 Cache for ST%d\n", st); - #if STEP == 1 +#if STEP == 1 if (dyn->e.extcache[EXTIDX(dyn->e.x87reg[i])].t == EXT_CACHE_ST_F || dyn->e.extcache[EXTIDX(dyn->e.x87reg[i])].t == EXT_CACHE_ST_I64) extcache_promote_double(dyn, ninst, st); - #endif +#endif LW(s2, xEmu, offsetof(x64emu_t, top)); int a = st - dyn->e.x87stack; - if(a) { + if (a) { ADDI(s2, s2, a); AND(s2, s2, 7); } - if(rv64_zba) SH3ADD(s1, s2, xEmu); else {SLLI(s2, s2, 3); ADD(s1, xEmu, s2);} + if (rv64_zba) + SH3ADD(s1, s2, xEmu); + else { + SLLI(s2, s2, 3); + ADD(s1, xEmu, s2); + } FLD(dyn->e.x87reg[i], s1, offsetof(x64emu_t, x87)); MESSAGE(LOG_DUMP, "\t-------x87 Cache for ST%d\n", st); // ok @@ -1409,8 +1484,8 @@ void x87_reget_st(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int st) MESSAGE(LOG_DUMP, "\tCreate x87 Cache for ST%d\n", st); // get a free spot int ret = -1; - for (int i=0; (i<8) && (ret==-1); ++i) - if(dyn->e.x87cache[i]==-1) + for (int i = 0; (i < 8) && (ret == -1); ++i) + if (dyn->e.x87cache[i] == -1) ret = i; // found, setup and grab the value dyn->e.x87cache[ret] = st; @@ -1418,8 +1493,13 @@ void x87_reget_st(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int st) LW(s2, xEmu, offsetof(x64emu_t, top)); int a = st - dyn->e.x87stack; ADDI(s2, s2, a); - ANDI(s2, s2, 7); // (emu->top + i)&7 - if(rv64_zba) SH3ADD(s1, s2, xEmu); else {SLLI(s2, s2, 3); ADD(s1, xEmu, s2);} + ANDI(s2, s2, 7); // (emu->top + i)&7 + if (rv64_zba) + SH3ADD(s1, s2, xEmu); + else { + SLLI(s2, s2, 3); + ADD(s1, xEmu, s2); + } FLD(dyn->e.x87reg[ret], s1, offsetof(x64emu_t, x87)); MESSAGE(LOG_DUMP, "\t-------x87 Cache for ST%d\n", st); } @@ -1427,29 +1507,34 @@ void x87_reget_st(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int st) void x87_free(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int st) { int ret = -1; - for (int i=0; (i<8) && (ret==-1); ++i) - if(dyn->e.x87cache[i] == st) + for (int i = 0; (i < 8) && (ret == -1); ++i) + if (dyn->e.x87cache[i] == st) ret = i; - MESSAGE(LOG_DUMP, "\tFFREE%s x87 Cache for ST%d\n", (ret!=-1)?" (and Forget)":"", st); - if(ret!=-1) { + MESSAGE(LOG_DUMP, "\tFFREE%s x87 Cache for ST%d\n", (ret != -1) ? " (and Forget)" : "", st); + if (ret != -1) { const int reg = dyn->e.x87reg[ret]; - #if STEP == 1 - if(dyn->e.extcache[reg].t==EXT_CACHE_ST_F || dyn->e.extcache[reg].t==EXT_CACHE_ST_I64) +#if STEP == 1 + if (dyn->e.extcache[reg].t == EXT_CACHE_ST_F || dyn->e.extcache[reg].t == EXT_CACHE_ST_I64) extcache_promote_double(dyn, ninst, st); - #endif +#endif // Get top LW(s2, xEmu, offsetof(x64emu_t, top)); // Update int ast = st - dyn->e.x87stack; - if(ast) { - if(ast>0) { + if (ast) { + if (ast > 0) { ADDI(s2, s2, ast); } else { SUBI(s2, s2, -ast); } ANDI(s2, s2, 7); // (emu->top + i)&7 } - if(rv64_zba) SH3ADD(s1, s2, xEmu); else {SLLI(s2, s2, 3); ADD(s1, xEmu, s2);} + if (rv64_zba) + SH3ADD(s1, s2, xEmu); + else { + SLLI(s2, s2, 3); + ADD(s1, xEmu, s2); + } if (dyn->e.extcache[EXTIDX(reg)].t == EXT_CACHE_ST_F) { FCVTDS(SCRATCH0, reg); FSD(SCRATCH0, s1, offsetof(x64emu_t, x87)); @@ -1470,17 +1555,17 @@ void x87_free(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int st) LW(s2, xEmu, offsetof(x64emu_t, top)); // Update int ast = st - dyn->e.x87stack; - if(ast) { - if(ast>0) { + if (ast) { + if (ast > 0) { ADDI(s2, s2, ast); } else { SUBI(s2, s2, -ast); } - ANDI(s2, s2, 7); // (emu->top + i)&7 + ANDI(s2, s2, 7); // (emu->top + i)&7 } } // add mark in the freed array - dyn->e.tags |= 0b11<<(st*2); + dyn->e.tags |= 0b11 << (st * 2); MESSAGE(LOG_DUMP, "\t--------x87 FFREE for ST%d\n", st); } @@ -1501,14 +1586,17 @@ void x87_swapreg(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int a, int b) dyn->e.extcache[j2].n = j3; // mark as swapped dyn->e.swapped = 1; - dyn->e.combined1= a; dyn->e.combined2=b; + dyn->e.combined1 = a; + dyn->e.combined2 = b; } // Set rounding according to cw flags, return reg to restore flags int x87_setround(dynarec_rv64_t* dyn, int ninst, int s1, int s2) { - MAYUSE(dyn); MAYUSE(ninst); - MAYUSE(s1); MAYUSE(s2); + MAYUSE(dyn); + MAYUSE(ninst); + MAYUSE(s1); + MAYUSE(s2); LW(s1, xEmu, offsetof(x64emu_t, cw)); SRLI(s1, s1, 10); ANDI(s1, s1, 0b11); @@ -1522,15 +1610,17 @@ int x87_setround(dynarec_rv64_t* dyn, int ninst, int s1, int s2) J(8); ADDI(s1, xZR, 1); // transform done (is there a faster way?) - FSRM(s1, s1); // exange RM with current + FSRM(s1, s1); // exange RM with current return s1; } // Set rounding according to mxcsr flags, return reg to restore flags int sse_setround(dynarec_rv64_t* dyn, int ninst, int s1, int s2) { - MAYUSE(dyn); MAYUSE(ninst); - MAYUSE(s1); MAYUSE(s2); + MAYUSE(dyn); + MAYUSE(ninst); + MAYUSE(s1); + MAYUSE(s2); LW(s1, xEmu, offsetof(x64emu_t, mxcsr)); SRLI(s1, s1, 13); ANDI(s1, s1, 0b11); @@ -1544,23 +1634,24 @@ int sse_setround(dynarec_rv64_t* dyn, int ninst, int s1, int s2) J(8); ADDI(s1, xZR, 1); // transform done (is there a faster way?) - FSRM(s1, s1); // exange RM with current + FSRM(s1, s1); // exange RM with current return s1; } // Restore round flag, destroy s1 doing so void x87_restoreround(dynarec_rv64_t* dyn, int ninst, int s1) { - MAYUSE(dyn); MAYUSE(ninst); + MAYUSE(dyn); + MAYUSE(ninst); MAYUSE(s1); - FSRM(s1, s1); // put back fpscr + FSRM(s1, s1); // put back fpscr } // MMX helpers static int isx87Empty(dynarec_rv64_t* dyn) { - for (int i=0; i<8; ++i) - if(dyn->e.x87cache[i] != -1) + for (int i = 0; i < 8; ++i) + if (dyn->e.x87cache[i] != -1) return 0; return 1; } @@ -1599,7 +1690,7 @@ static void mmx_transfer_reg(dynarec_rv64_t* dyn, int ninst, int s1, int a) // get float register for a MMX reg, create the entry if needed int mmx_get_reg(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int a) { - if(!dyn->e.x87stack && isx87Empty(dyn)) + if (!dyn->e.x87stack && isx87Empty(dyn)) x87_purgecache(dyn, ninst, 0, s1, s2, s3); if (dyn->e.mmxcache[a].v != -1) { if (dyn->e.mmxcache[a].vector) { @@ -1655,7 +1746,7 @@ int mmx_get_reg_empty(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, in // get vector register for a MMX reg, but don't try to synch it if it needed to be created int mmx_get_reg_empty_vector(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3, int a) { - if(!dyn->e.x87stack && isx87Empty(dyn)) + if (!dyn->e.x87stack && isx87Empty(dyn)) x87_purgecache(dyn, ninst, 0, s1, s2, s3); if (dyn->e.mmxcache[a].v != -1) { dyn->e.mmxcache[a].vector = 1; @@ -1671,9 +1762,9 @@ int mmx_get_reg_empty_vector(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int // purge the MMX cache only(needs 3 scratch registers) void mmx_purgecache(dynarec_rv64_t* dyn, int ninst, int next, int s1) { - if(!dyn->e.mmxcount) + if (!dyn->e.mmxcount) return; - if(!next) + if (!next) dyn->e.mmxcount = 0; int old = -1; for (int i = 0; i < 8; ++i) { @@ -1725,7 +1816,7 @@ int sse_get_reg(dynarec_rv64_t* dyn, int ninst, int s1, int a, int single) return sse_get_reg(dyn, ninst, s1, a, single); } // forget / reload if change of size - if(dyn->e.ssecache[a].single!=single) { + if (dyn->e.ssecache[a].single != single) { sse_forget_reg(dyn, ninst, s1, a); // update olds after the forget... dyn->e.olds[a].changed = 1; @@ -1735,11 +1826,11 @@ int sse_get_reg(dynarec_rv64_t* dyn, int ninst, int s1, int a, int single) } return dyn->e.ssecache[a].reg; } - dyn->e.ssecache[a].reg = fpu_get_reg_xmm(dyn, single?EXT_CACHE_SS:EXT_CACHE_SD, a); - int ret = dyn->e.ssecache[a].reg; + dyn->e.ssecache[a].reg = fpu_get_reg_xmm(dyn, single ? EXT_CACHE_SS : EXT_CACHE_SD, a); + int ret = dyn->e.ssecache[a].reg; dyn->e.ssecache[a].single = single; dyn->e.ssecache[a].vector = 0; - if(dyn->e.ssecache[a].single) + if (dyn->e.ssecache[a].single) FLW(dyn->e.ssecache[a].reg, xEmu, offsetof(x64emu_t, xmm[a])); else FLD(dyn->e.ssecache[a].reg, xEmu, offsetof(x64emu_t, xmm[a])); @@ -1771,11 +1862,11 @@ int sse_get_reg_empty(dynarec_rv64_t* dyn, int ninst, int s1, int a, int single) dyn->e.olds[a].type = 1 - single; dyn->e.ssecache[a].single = single; dyn->e.ssecache[a].vector = 0; - dyn->e.extcache[EXTIDX(dyn->e.ssecache[a].reg)].t = single?EXT_CACHE_SS:EXT_CACHE_SD; + dyn->e.extcache[EXTIDX(dyn->e.ssecache[a].reg)].t = single ? EXT_CACHE_SS : EXT_CACHE_SD; } return dyn->e.ssecache[a].reg; } - dyn->e.ssecache[a].reg = fpu_get_reg_xmm(dyn, single?EXT_CACHE_SS:EXT_CACHE_SD, a); + dyn->e.ssecache[a].reg = fpu_get_reg_xmm(dyn, single ? EXT_CACHE_SS : EXT_CACHE_SD, a); dyn->e.ssecache[a].single = single; dyn->e.ssecache[a].vector = 0; return dyn->e.ssecache[a].reg; @@ -1825,7 +1916,7 @@ void sse_forget_reg(dynarec_rv64_t* dyn, int ninst, int s1, int a) return; if (dyn->e.ssecache[a].vector == 1) return sse_forget_reg_vector(dyn, ninst, s1, a); - if(dyn->e.ssecache[a].single) + if (dyn->e.ssecache[a].single) FSW(dyn->e.ssecache[a].reg, xEmu, offsetof(x64emu_t, xmm[a])); else FSD(dyn->e.ssecache[a].reg, xEmu, offsetof(x64emu_t, xmm[a])); @@ -1856,7 +1947,7 @@ int sse_get_reg_vector(dynarec_rv64_t* dyn, int ninst, int s1, int a, int forwri dyn->e.olds[a].purged = 0; dyn->e.olds[a].reg = EXTIDX(dyn->e.ssecache[a].reg); dyn->e.olds[a].type = EXT_CACHE_OLD_XMMW; - dyn->e.ssecache[a].write = 1; // update only if forwrite + dyn->e.ssecache[a].write = 1; // update only if forwrite dyn->e.ssecache[a].single = 0; // just to be clean dyn->e.extcache[EXTIDX(dyn->e.ssecache[a].reg)].t = EXT_CACHE_XMMW; } @@ -1952,10 +2043,10 @@ void sse_purge07cache(dynarec_rv64_t* dyn, int ninst, int s1) static void sse_purgecache(dynarec_rv64_t* dyn, int ninst, int next, int s1) { int old = -1; - for (int i=0; i<16; ++i) - if(dyn->e.ssecache[i].v!=-1) { - if (old==-1) { - MESSAGE(LOG_DUMP, "\tPurge %sSSE Cache ------\n", next?"locally ":""); + for (int i = 0; i < 16; ++i) + if (dyn->e.ssecache[i].v != -1) { + if (old == -1) { + MESSAGE(LOG_DUMP, "\tPurge %sSSE Cache ------\n", next ? "locally " : ""); ++old; } if (dyn->e.ssecache[i].vector) { @@ -1997,7 +2088,7 @@ static void sse_purgecache(dynarec_rv64_t* dyn, int ninst, int next, int s1) if (!next) avx_mark_zero_reset(dyn, ninst); } - if(old!=-1) { + if (old != -1) { MESSAGE(LOG_DUMP, "\t------ Purge SSE Cache\n"); } } @@ -2069,7 +2160,7 @@ void fpu_pushcache(dynarec_rv64_t* dyn, int ninst, int s1, int not07) int n = 0; for (int i = start; i < 8; i++) if (dyn->e.ssecache[i].v != -1 && !dyn->e.ssecache[i].vector) ++n; - if(n) { + if (n) { MESSAGE(LOG_DUMP, "\tPush (float) XMM Cache (%d)------\n", n); for (int i = start; i < 8; ++i) if (dyn->e.ssecache[i].v != -1) { @@ -2209,7 +2300,7 @@ void fpu_purgecache(dynarec_rv64_t* dyn, int ninst, int next, int s1, int s2, in x87_purgecache(dyn, ninst, next, s1, s2, s3); mmx_purgecache(dyn, ninst, next, s1); sse_purgecache(dyn, ninst, next, s1); - if(!next) + if (!next) fpu_reset_reg(dyn); } @@ -2280,7 +2371,7 @@ static int findCacheSlot(dynarec_rv64_t* dyn, int ninst, int t, int n, extcache_ return -1; } -static void swapCache(dynarec_rv64_t* dyn, int ninst, int i, int j, extcache_t *cache) +static void swapCache(dynarec_rv64_t* dyn, int ninst, int i, int j, extcache_t* cache) { if (i == j) return; @@ -2315,10 +2406,10 @@ static void swapCache(dynarec_rv64_t* dyn, int ninst, int i, int j, extcache_t * int i_single = cache->extcache[i].t == EXT_CACHE_SS || cache->extcache[i].t == EXT_CACHE_ST_F; int j_single = cache->extcache[j].t == EXT_CACHE_SS || cache->extcache[j].t == EXT_CACHE_ST_F; - if(!cache->extcache[i].v) { + if (!cache->extcache[i].v) { // a mov is enough, no need to swap MESSAGE(LOG_DUMP, "\t - Moving %d <- %d\n", i, j); - if(j_single) { + if (j_single) { FMVS(reg_i, reg_j); } else { FMVD(reg_i, reg_j); @@ -2330,22 +2421,22 @@ static void swapCache(dynarec_rv64_t* dyn, int ninst, int i, int j, extcache_t * // SWAP ext_cache_t tmp; MESSAGE(LOG_DUMP, "\t - Swapping %d <-> %d\n", i, j); - // There is no swap instruction in RV64 to swap 2 float registers! - // so use a scratch... - #define SCRATCH 2 - if(i_single) +// There is no swap instruction in RV64 to swap 2 float registers! +// so use a scratch... +#define SCRATCH 2 + if (i_single) FMVS(SCRATCH, reg_i); else FMVD(SCRATCH, reg_i); - if(j_single) + if (j_single) FMVS(reg_i, reg_j); else FMVD(reg_i, reg_j); - if(i_single) + if (i_single) FMVS(reg_j, SCRATCH); else FMVD(reg_j, SCRATCH); - #undef SCRATCH +#undef SCRATCH tmp.v = cache->extcache[i].v; cache->extcache[i].v = cache->extcache[j].v; cache->extcache[j].v = tmp.v; @@ -2356,7 +2447,8 @@ static void loadCache(dynarec_rv64_t* dyn, int ninst, int stack_cnt, int s1, int int reg = EXTREG(i); if (cache->extcache[i].v && (cache->extcache[i].t == EXT_CACHE_XMMR || cache->extcache[i].t == EXT_CACHE_XMMW || cache->extcache[i].t == EXT_CACHE_YMMR || cache->extcache[i].t == EXT_CACHE_YMMW)) { int j = i + 1; - while (cache->extcache[j].v) ++j; + while (cache->extcache[j].v) + ++j; MESSAGE(LOG_DUMP, "\t - Moving away %d\n", i); VMV_V_V(EXTREG(j), reg); cache->extcache[j].v = cache->extcache[i].v; @@ -2367,7 +2459,8 @@ static void loadCache(dynarec_rv64_t* dyn, int ninst, int stack_cnt, int s1, int if (cache->extcache[i].t == EXT_CACHE_SS || cache->extcache[i].t == EXT_CACHE_ST_F) single = 1; int j = i + 1; - while (cache->extcache[j].v) ++j; + while (cache->extcache[j].v) + ++j; MESSAGE(LOG_DUMP, "\t - Moving away %d\n", i); if (single) { FMVS(EXTREG(j), reg); @@ -2376,7 +2469,7 @@ static void loadCache(dynarec_rv64_t* dyn, int ninst, int stack_cnt, int s1, int } cache->extcache[j].v = cache->extcache[i].v; } - switch(t) { + switch (t) { case EXT_CACHE_XMMR: case EXT_CACHE_XMMW: MESSAGE(LOG_DUMP, "\t - Loading %s\n", getCacheName(t, n)); @@ -2412,20 +2505,25 @@ static void loadCache(dynarec_rv64_t* dyn, int ninst, int stack_cnt, int s1, int case EXT_CACHE_ST_F: case EXT_CACHE_ST_I64: MESSAGE(LOG_DUMP, "\t - Loading %s\n", getCacheName(t, n)); - if((*s3_top) == 0xffff) { + if ((*s3_top) == 0xffff) { LW(s3, xEmu, offsetof(x64emu_t, top)); *s3_top = 0; } - int a = n - (*s3_top) - stack_cnt; - if(a) { + int a = n - (*s3_top) - stack_cnt; + if (a) { ADDI(s3, s3, a); - ANDI(s3, s3, 7); // (emu->top + i)&7 + ANDI(s3, s3, 7); // (emu->top + i)&7 } *s3_top += a; *s2_val = 0; - if(rv64_zba) SH3ADD(s2, s3, xEmu); else {SLLI(s2, s3, 3); ADD(s2, xEmu, s2);} + if (rv64_zba) + SH3ADD(s2, s3, xEmu); + else { + SLLI(s2, s3, 3); + ADD(s2, xEmu, s2); + } FLD(reg, s2, offsetof(x64emu_t, x87)); - if(t==EXT_CACHE_ST_F) { + if (t == EXT_CACHE_ST_F) { FCVTSD(reg, reg); } if (t == EXT_CACHE_ST_I64) { @@ -2435,7 +2533,7 @@ static void loadCache(dynarec_rv64_t* dyn, int ninst, int stack_cnt, int s1, int break; case EXT_CACHE_NONE: case EXT_CACHE_SCR: - default: /* nothing done */ + default: /* nothing done */ MESSAGE(LOG_DUMP, "\t - ignoring %s\n", getCacheName(t, n)); break; } @@ -2443,10 +2541,10 @@ static void loadCache(dynarec_rv64_t* dyn, int ninst, int stack_cnt, int s1, int cache->extcache[i].t = t; } -static void unloadCache(dynarec_rv64_t* dyn, int ninst, int stack_cnt, int s1, int s2, int s3, int* s1_val, int* s2_val, int* s3_top, extcache_t *cache, int i, int t, int n) +static void unloadCache(dynarec_rv64_t* dyn, int ninst, int stack_cnt, int s1, int s2, int s3, int* s1_val, int* s2_val, int* s3_top, extcache_t* cache, int i, int t, int n) { int reg = EXTREG(i); - switch(t) { + switch (t) { case EXT_CACHE_XMMR: case EXT_CACHE_YMMR: MESSAGE(LOG_DUMP, "\t - ignoring %s\n", getCacheName(t, n)); @@ -2484,17 +2582,22 @@ static void unloadCache(dynarec_rv64_t* dyn, int ninst, int stack_cnt, int s1, i case EXT_CACHE_ST_F: case EXT_CACHE_ST_I64: MESSAGE(LOG_DUMP, "\t - Unloading %s\n", getCacheName(t, n)); - if((*s3_top)==0xffff) { + if ((*s3_top) == 0xffff) { LW(s3, xEmu, offsetof(x64emu_t, top)); *s3_top = 0; } int a = n - (*s3_top) - stack_cnt; - if(a) { + if (a) { ADDI(s3, s3, a); ANDI(s3, s3, 7); } *s3_top += a; - if(rv64_zba) SH3ADD(s2, s3, xEmu); else {SLLI(s2, s3, 3); ADD(s2, xEmu, s2);} + if (rv64_zba) + SH3ADD(s2, s3, xEmu); + else { + SLLI(s2, s3, 3); + ADD(s2, xEmu, s2); + } *s2_val = 0; if (t == EXT_CACHE_ST_F) { FCVTDS(reg, reg); @@ -2507,7 +2610,7 @@ static void unloadCache(dynarec_rv64_t* dyn, int ninst, int stack_cnt, int s1, i break; case EXT_CACHE_NONE: case EXT_CACHE_SCR: - default: /* nothing done */ + default: /* nothing done */ MESSAGE(LOG_DUMP, "\t - ignoring %s\n", getCacheName(t, n)); break; } @@ -2517,17 +2620,17 @@ static void unloadCache(dynarec_rv64_t* dyn, int ninst, int stack_cnt, int s1, i static void fpuCacheTransform(dynarec_rv64_t* dyn, int ninst, int s1, int s2, int s3) { int i2 = dyn->insts[ninst].x64.jmp_insts; - if(i2<0) + if (i2 < 0) return; MESSAGE(LOG_DUMP, "\tCache Transform ---- ninst=%d -> %d\n", ninst, i2); - if((!i2) || (dyn->insts[i2].x64.barrier&BARRIER_FLOAT)) { - if(dyn->e.stack_next) { + if ((!i2) || (dyn->insts[i2].x64.barrier & BARRIER_FLOAT)) { + if (dyn->e.stack_next) { fpu_purgecache(dyn, ninst, 1, s1, s2, s3); MESSAGE(LOG_DUMP, "\t---- Cache Transform\n"); return; } - for(int i=0; i<24; ++i) - if(dyn->e.extcache[i].v) { // there is something at ninst for i + for (int i = 0; i < 24; ++i) + if (dyn->e.extcache[i].v) { // there is something at ninst for i fpu_purgecache(dyn, ninst, 1, s1, s2, s3); MESSAGE(LOG_DUMP, "\t---- Cache Transform\n"); return; @@ -2538,12 +2641,12 @@ static void fpuCacheTransform(dynarec_rv64_t* dyn, int ninst, int s1, int s2, in extcache_t cache_i2 = dyn->insts[i2].e; extcacheUnwind(&cache_i2); - if(!cache_i2.stack) { + if (!cache_i2.stack) { int purge = 1; - for (int i=0; i<24 && purge; ++i) - if(cache_i2.extcache[i].v) + for (int i = 0; i < 24 && purge; ++i) + if (cache_i2.extcache[i].v) purge = 0; - if(purge) { + if (purge) { fpu_purgecache(dyn, ninst, 1, s1, s2, s3); MESSAGE(LOG_DUMP, "\t---- Cache Transform\n"); return; @@ -2576,7 +2679,7 @@ static void fpuCacheTransform(dynarec_rv64_t* dyn, int ninst, int s1, int s2, in unloadCache(dyn, ninst, stack_cnt, s1, s2, s3, &s1_val, &s2_val, &s3_top, &cache, j, cache.extcache[j].t, cache.extcache[j].n); } for (int i = 0; i < 24; ++i) { - if(cache.extcache[i].v) + if (cache.extcache[i].v) if (findCacheSlot(dyn, ninst, cache.extcache[i].t, cache.extcache[i].n, &cache_i2) == -1) unloadCache(dyn, ninst, stack_cnt, s1, s2, s3, &s1_val, &s2_val, &s3_top, &cache, i, cache.extcache[i].t, cache.extcache[i].n); } @@ -2644,7 +2747,7 @@ static void fpuCacheTransform(dynarec_rv64_t* dyn, int ninst, int s1, int s2, in } } } - if(stack_cnt != cache_i2.stack) { + if (stack_cnt != cache_i2.stack) { MESSAGE(LOG_DUMP, "\t - adjust stack count %d -> %d -\n", stack_cnt, cache_i2.stack); int a = stack_cnt - cache_i2.stack; // Add x87stack to emu fpu_stack @@ -2658,12 +2761,12 @@ static void fpuCacheTransform(dynarec_rv64_t* dyn, int ninst, int s1, int s2, in SW(s3, xEmu, offsetof(x64emu_t, top)); // update tags LH(s2, xEmu, offsetof(x64emu_t, fpu_tags)); - if(a>0) { - SLLI(s2, s2, a*2); + if (a > 0) { + SLLI(s2, s2, a * 2); } else { - SLLI(s3, xMASK, 16); // 0xffff0000 + SLLI(s3, xMASK, 16); // 0xffff0000 OR(s2, s2, s3); - SRLI(s2, s2, -a*2); + SRLI(s2, s2, -a * 2); } SH(s2, xEmu, offsetof(x64emu_t, fpu_tags)); s3_top = 0; @@ -2675,39 +2778,39 @@ static void flagsCacheTransform(dynarec_rv64_t* dyn, int ninst, int s1) { int j64; int jmp = dyn->insts[ninst].x64.jmp_insts; - if(jmp<0) + if (jmp < 0) return; - if(dyn->f.dfnone) // flags are fully known, nothing we can do more + if (dyn->f.dfnone) // flags are fully known, nothing we can do more return; MESSAGE(LOG_DUMP, "\tFlags fetch ---- ninst=%d -> %d\n", ninst, jmp); int go = 0; switch (dyn->insts[jmp].f_entry.pending) { case SF_UNKNOWN: break; case SF_SET: - if(dyn->f.pending!=SF_SET && dyn->f.pending!=SF_SET_PENDING) + if (dyn->f.pending != SF_SET && dyn->f.pending != SF_SET_PENDING) go = 1; break; case SF_SET_PENDING: - if(dyn->f.pending!=SF_SET - && dyn->f.pending!=SF_SET_PENDING - && dyn->f.pending!=SF_PENDING) + if (dyn->f.pending != SF_SET + && dyn->f.pending != SF_SET_PENDING + && dyn->f.pending != SF_PENDING) go = 1; break; case SF_PENDING: - if(dyn->f.pending!=SF_SET - && dyn->f.pending!=SF_SET_PENDING - && dyn->f.pending!=SF_PENDING) + if (dyn->f.pending != SF_SET + && dyn->f.pending != SF_SET_PENDING + && dyn->f.pending != SF_PENDING) go = 1; else - go = (dyn->insts[jmp].f_entry.dfnone == dyn->f.dfnone)?0:1; + go = (dyn->insts[jmp].f_entry.dfnone == dyn->f.dfnone) ? 0 : 1; break; } - if(dyn->insts[jmp].f_entry.dfnone && !dyn->f.dfnone) + if (dyn->insts[jmp].f_entry.dfnone && !dyn->f.dfnone) go = 1; - if(go) { - if(dyn->f.pending!=SF_PENDING) { + if (go) { + if (dyn->f.pending != SF_PENDING) { LW(s1, xEmu, offsetof(x64emu_t, df)); - j64 = (GETMARKF2)-(dyn->native_size); + j64 = (GETMARKF2) - (dyn->native_size); BEQZ(s1, j64); } CALL_(UpdateFlags, -1, 0); @@ -2743,8 +2846,8 @@ void rv64_move32(dynarec_rv64_t* dyn, int ninst, int reg, int32_t val, int zerou // lo12 != 0 && hi20 == 0 -> ADDI // lo12 == 0 && hi20 != 0 -> LUI // else -> LUI+ADDI - int32_t hi20 = (val+0x800)>>12 & 0xfffff; - int32_t lo12 = val&0xfff; + int32_t hi20 = (val + 0x800) >> 12 & 0xfffff; + int32_t lo12 = val & 0xfff; int src = xZR; if (hi20) { @@ -2759,16 +2862,16 @@ void rv64_move32(dynarec_rv64_t* dyn, int ninst, int reg, int32_t val, int zerou void rv64_move64(dynarec_rv64_t* dyn, int ninst, int reg, int64_t val) { - if(((val<<32)>>32)==val) { + if (((val << 32) >> 32) == val) { // 32bits value rv64_move32(dyn, ninst, reg, val, 0); return; } - int64_t lo12 = (val<<52)>>52; - int64_t hi52 = (val+0x800)>>12; - int shift = 12+TrailingZeros64((uint64_t)hi52); - hi52 = ((hi52>>(shift-12))<<shift)>>shift; + int64_t lo12 = (val << 52) >> 52; + int64_t hi52 = (val + 0x800) >> 12; + int shift = 12 + TrailingZeros64((uint64_t)hi52); + hi52 = ((hi52 >> (shift - 12)) << shift) >> shift; rv64_move64(dyn, ninst, reg, hi52); SLLI(reg, reg, shift); @@ -2812,45 +2915,45 @@ void emit_pf(dynarec_rv64_t* dyn, int ninst, int s1, int s3, int s4) void fpu_reset_cache(dynarec_rv64_t* dyn, int ninst, int reset_n) { - MESSAGE(LOG_DEBUG, "Reset Caches with %d\n",reset_n); - #if STEP > 1 + MESSAGE(LOG_DEBUG, "Reset Caches with %d\n", reset_n); +#if STEP > 1 // for STEP 2 & 3, just need to refresh with current, and undo the changes (push & swap) dyn->e = dyn->insts[ninst].e; dyn->vector_sew = dyn->insts[ninst].vector_sew_entry; - #else +#else dyn->e = dyn->insts[reset_n].e; dyn->vector_sew = dyn->insts[reset_n].vector_sew_exit; - #endif +#endif extcacheUnwind(&dyn->e); - #if STEP == 0 - if(box64_dynarec_dump) dynarec_log(LOG_NONE, "New x87stack=%d\n", dyn->e.x87stack); - #endif - #if defined(HAVE_TRACE) && (STEP > 2) - if(box64_dynarec_dump) - if(memcmp(&dyn->e, &dyn->insts[reset_n].e, sizeof(ext_cache_t))) { +#if STEP == 0 + if (box64_dynarec_dump) dynarec_log(LOG_NONE, "New x87stack=%d\n", dyn->e.x87stack); +#endif +#if defined(HAVE_TRACE) && (STEP > 2) + if (box64_dynarec_dump) + if (memcmp(&dyn->e, &dyn->insts[reset_n].e, sizeof(ext_cache_t))) { MESSAGE(LOG_DEBUG, "Warning, difference in extcache: reset="); - for(int i=0; i<24; ++i) - if(dyn->insts[reset_n].e.extcache[i].v) + for (int i = 0; i < 24; ++i) + if (dyn->insts[reset_n].e.extcache[i].v) MESSAGE(LOG_DEBUG, " %02d:%s", i, getCacheName(dyn->insts[reset_n].e.extcache[i].t, dyn->insts[reset_n].e.extcache[i].n)); - if(dyn->insts[reset_n].e.combined1 || dyn->insts[reset_n].e.combined2) - MESSAGE(LOG_DEBUG, " %s:%02d/%02d", dyn->insts[reset_n].e.swapped?"SWP":"CMB", dyn->insts[reset_n].e.combined1, dyn->insts[reset_n].e.combined2); - if(dyn->insts[reset_n].e.stack_push || dyn->insts[reset_n].e.stack_pop) + if (dyn->insts[reset_n].e.combined1 || dyn->insts[reset_n].e.combined2) + MESSAGE(LOG_DEBUG, " %s:%02d/%02d", dyn->insts[reset_n].e.swapped ? "SWP" : "CMB", dyn->insts[reset_n].e.combined1, dyn->insts[reset_n].e.combined2); + if (dyn->insts[reset_n].e.stack_push || dyn->insts[reset_n].e.stack_pop) MESSAGE(LOG_DEBUG, " (%d:%d)", dyn->insts[reset_n].e.stack_push, -dyn->insts[reset_n].e.stack_pop); MESSAGE(LOG_DEBUG, " ==> "); - for(int i=0; i<24; ++i) - if(dyn->insts[ninst].e.extcache[i].v) + for (int i = 0; i < 24; ++i) + if (dyn->insts[ninst].e.extcache[i].v) MESSAGE(LOG_DEBUG, " %02d:%s", i, getCacheName(dyn->insts[ninst].e.extcache[i].t, dyn->insts[ninst].e.extcache[i].n)); - if(dyn->insts[ninst].e.combined1 || dyn->insts[ninst].e.combined2) - MESSAGE(LOG_DEBUG, " %s:%02d/%02d", dyn->insts[ninst].e.swapped?"SWP":"CMB", dyn->insts[ninst].e.combined1, dyn->insts[ninst].e.combined2); - if(dyn->insts[ninst].e.stack_push || dyn->insts[ninst].e.stack_pop) + if (dyn->insts[ninst].e.combined1 || dyn->insts[ninst].e.combined2) + MESSAGE(LOG_DEBUG, " %s:%02d/%02d", dyn->insts[ninst].e.swapped ? "SWP" : "CMB", dyn->insts[ninst].e.combined1, dyn->insts[ninst].e.combined2); + if (dyn->insts[ninst].e.stack_push || dyn->insts[ninst].e.stack_pop) MESSAGE(LOG_DEBUG, " (%d:%d)", dyn->insts[ninst].e.stack_push, -dyn->insts[ninst].e.stack_pop); MESSAGE(LOG_DEBUG, " -> "); - for(int i=0; i<24; ++i) - if(dyn->e.extcache[i].v) + for (int i = 0; i < 24; ++i) + if (dyn->e.extcache[i].v) MESSAGE(LOG_DEBUG, " %02d:%s", i, getCacheName(dyn->e.extcache[i].t, dyn->e.extcache[i].n)); - if(dyn->e.combined1 || dyn->e.combined2) - MESSAGE(LOG_DEBUG, " %s:%02d/%02d", dyn->e.swapped?"SWP":"CMB", dyn->e.combined1, dyn->e.combined2); - if(dyn->e.stack_push || dyn->e.stack_pop) + if (dyn->e.combined1 || dyn->e.combined2) + MESSAGE(LOG_DEBUG, " %s:%02d/%02d", dyn->e.swapped ? "SWP" : "CMB", dyn->e.combined1, dyn->e.combined2); + if (dyn->e.stack_push || dyn->e.stack_pop) MESSAGE(LOG_DEBUG, " (%d:%d)", dyn->e.stack_push, -dyn->e.stack_pop); MESSAGE(LOG_DEBUG, "\n"); } @@ -2860,15 +2963,15 @@ void fpu_reset_cache(dynarec_rv64_t* dyn, int ninst, int reset_n) // propagate ST stack state, especial stack pop that are deferred void fpu_propagate_stack(dynarec_rv64_t* dyn, int ninst) { - if(dyn->e.stack_pop) { - for(int j=0; j<24; ++j) + if (dyn->e.stack_pop) { + for (int j = 0; j < 24; ++j) if ((dyn->e.extcache[j].t == EXT_CACHE_ST_D || dyn->e.extcache[j].t == EXT_CACHE_ST_F || dyn->e.extcache[j].t == EXT_CACHE_ST_I64)) { - if(dyn->e.extcache[j].n<dyn->e.stack_pop) + if (dyn->e.extcache[j].n < dyn->e.stack_pop) dyn->e.extcache[j].v = 0; else - dyn->e.extcache[j].n-=dyn->e.stack_pop; + dyn->e.extcache[j].n -= dyn->e.stack_pop; } dyn->e.stack_pop = 0; } diff --git a/src/dynarec/rv64/dynarec_rv64_helper.h b/src/dynarec/rv64/dynarec_rv64_helper.h index c896f284..2127dfec 100644 --- a/src/dynarec/rv64/dynarec_rv64_helper.h +++ b/src/dynarec/rv64/dynarec_rv64_helper.h @@ -2,7 +2,7 @@ #define __DYNAREC_RV64_HELPER_H__ // undef to get Close to SSE Float->int conversions -//#define PRECISE_CVT +// #define PRECISE_CVT #if STEP == 0 #include "dynarec_rv64_pass0.h" @@ -36,11 +36,11 @@ #define LOCK_LOCK (int*)1 // GETGD get x64 register in gd -#define GETGD gd = xRAX + ((nextop & 0x38) >> 3) + (rex.r << 3) +#define GETGD gd = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)) // GETED can use r1 for ed, and r2 for wback. wback is 0 if ed is xEAX..xEDI #define GETED(D) \ if (MODREG) { \ - ed = xRAX + (nextop & 7) + (rex.b << 3); \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ wback = 0; \ } else { \ SMREAD(); \ @@ -51,7 +51,7 @@ // GETSED can use r1 for ed, and r2 for wback. ed will be sign extended! #define GETSED(D) \ if (MODREG) { \ - ed = xRAX + (nextop & 7) + (rex.b << 3); \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ wback = 0; \ if (!rex.w) { \ ADDW(x1, ed, xZR); \ @@ -69,7 +69,7 @@ // GETEDx can use r1 for ed, and r2 for wback. wback is 0 if ed is xEAX..xEDI #define GETEDx(D) \ if (MODREG) { \ - ed = xRAX + (nextop & 7) + (rex.b << 3); \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ wback = 0; \ } else { \ SMREAD(); \ @@ -79,7 +79,7 @@ } #define GETEDz(D) \ if (MODREG) { \ - ed = xRAX + (nextop & 7) + (rex.b << 3); \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ wback = 0; \ } else { \ SMREAD(); \ @@ -90,7 +90,7 @@ // GETED32 can use r1 for ed, and r2 for wback. wback is 0 if ed is xEAX..xEDI #define GETED32(D) \ if (MODREG) { \ - ed = xRAX + (nextop & 7) + (rex.b << 3); \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ wback = 0; \ } else { \ SMREAD(); \ @@ -101,7 +101,7 @@ // GETEDH can use hint for ed, and x1 or x2 for wback (depending on hint), might also use x3. wback is 0 if ed is xEAX..xEDI #define GETEDH(hint, D) \ if (MODREG) { \ - ed = xRAX + (nextop & 7) + (rex.b << 3); \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ wback = 0; \ } else { \ SMREAD(); \ @@ -112,7 +112,7 @@ // GETEDW can use hint for wback and ret for ed. wback is 0 if ed is xEAX..xEDI #define GETEDW(hint, ret, D) \ if (MODREG) { \ - ed = xRAX + (nextop & 7) + (rex.b << 3); \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ MV(ret, ed); \ wback = 0; \ } else { \ @@ -122,14 +122,14 @@ LDxw(ed, wback, fixedaddress); \ } // GETGW extract x64 register in gd, that is i -#define GETGW(i) \ - gd = xRAX + ((nextop & 0x38) >> 3) + (rex.r << 3); \ - ZEXTH(i, gd); \ +#define GETGW(i) \ + gd = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)); \ + ZEXTH(i, gd); \ gd = i; // GETEWW will use i for ed, and can use w for wback. #define GETEWW(w, i, D) \ if (MODREG) { \ - wback = xRAX + (nextop & 7) + (rex.b << 3); \ + wback = TO_NAT((nextop & 7) + (rex.b << 3)); \ ZEXTH(i, wback); \ ed = i; \ wb1 = 0; \ @@ -145,7 +145,7 @@ // GETSEW will use i for ed, and *may* use x3 for wback. This is the Signed version #define GETSEW(i, D) \ if (MODREG) { \ - wback = xRAX + (nextop & 7) + (rex.b << 3); \ + wback = TO_NAT((nextop & 7) + (rex.b << 3)); \ SEXTH(i, wback); \ ed = i; \ wb1 = 0; \ @@ -169,18 +169,18 @@ OR(wback, wback, w); \ } // Write back gd in correct register (gd needs to be 16bits only!) -#define GWBACK \ - do { \ - int g = xRAX + ((nextop & 0x38) >> 3) + (rex.r << 3); \ - SRLI(g, g, 16); \ - SLLI(g, g, 16); \ - OR(g, g, gd); \ +#define GWBACK \ + do { \ + int g = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)); \ + SRLI(g, g, 16); \ + SLLI(g, g, 16); \ + OR(g, g, gd); \ } while (0) // GETEDO can use r1 for ed, and r2 for wback. wback is 0 if ed is xEAX..xEDI #define GETEDO(O, D, S) \ if (MODREG) { \ - ed = xRAX + (nextop & 7) + (rex.b << 3); \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ wback = 0; \ } else { \ SMREAD(); \ @@ -192,7 +192,7 @@ // GETEDOz can use r1 for ed, and r2 for wback. wback is 0 if ed is xEAX..xEDI #define GETEDOz(O, D, S) \ if (MODREG) { \ - ed = xRAX + (nextop & 7) + (rex.b << 3); \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ wback = 0; \ } else { \ SMREAD(); \ @@ -215,10 +215,10 @@ } // GETGW extract x64 register in gd, that is i, Signed extented -#define GETSGW(i) \ - gd = xRAX + ((nextop & 0x38) >> 3) + (rex.r << 3); \ - SLLIW(i, gd, 16); \ - SRAIW(i, i, 16); \ +#define GETSGW(i) \ + gd = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)); \ + SLLIW(i, gd, 16); \ + SRAIW(i, i, 16); \ gd = i; // Write back ed in wback (if wback not 0) @@ -232,12 +232,12 @@ #define GETEB(i, D) \ if (MODREG) { \ if (rex.rex) { \ - wback = xRAX + (nextop & 7) + (rex.b << 3); \ + wback = TO_NAT((nextop & 7) + (rex.b << 3)); \ wb2 = 0; \ } else { \ wback = (nextop & 7); \ wb2 = (wback >> 2) * 8; \ - wback = xRAX + (wback & 3); \ + wback = TO_NAT(wback & 3); \ } \ if (wb2) { \ if (rv64_xtheadbb) { \ @@ -261,12 +261,12 @@ #define GETEBO(i, D) \ if (MODREG) { \ if (rex.rex) { \ - wback = xRAX + (nextop & 7) + (rex.b << 3); \ + wback = TO_NAT((nextop & 7) + (rex.b << 3)); \ wb2 = 0; \ } else { \ wback = (nextop & 7); \ wb2 = (wback >> 2) * 8; \ - wback = xRAX + (wback & 3); \ + wback = TO_NAT(wback & 3); \ } \ if (wb2) { \ if (rv64_xtheadbb) { \ @@ -292,12 +292,12 @@ #define GETSEB(i, D) \ if (MODREG) { \ if (rex.rex) { \ - wback = xRAX + (nextop & 7) + (rex.b << 3); \ + wback = TO_NAT((nextop & 7) + (rex.b << 3)); \ wb2 = 0; \ } else { \ wback = (nextop & 7); \ wb2 = (wback >> 2) * 8; \ - wback = xRAX + (wback & 3); \ + wback = TO_NAT(wback & 3); \ } \ MV(i, wback); \ SLLIW(i, i, 24 - wb2); \ @@ -315,12 +315,12 @@ #define GETEB32(i, D) \ if (MODREG) { \ if (rex.rex) { \ - wback = xRAX + (nextop & 7) + (rex.b << 3); \ + wback = TO_NAT((nextop & 7) + (rex.b << 3)); \ wb2 = 0; \ } else { \ wback = (nextop & 7); \ wb2 = (wback >> 2) * 8; \ - wback = xRAX + (wback & 3); \ + wback = TO_NAT(wback & 3); \ } \ if (wb2) { \ if (rv64_xtheadbb) { \ @@ -343,37 +343,39 @@ } // GETGB will use i for gd -#define GETGB(i) \ - if (rex.rex) { \ - gb1 = xRAX + ((nextop & 0x38) >> 3) + (rex.r << 3); \ - gb2 = 0; \ - } else { \ - gd = (nextop & 0x38) >> 3; \ - gb2 = ((gd & 4) >> 2); \ - gb1 = xRAX + (gd & 3); \ - } \ - gd = i; \ - if (gb2) { \ - if (rv64_xtheadbb) { \ - TH_EXTU(gd, gb1, 15, 8); \ - } else { \ - SRLI(gd, gb1, 8); \ - ANDI(gd, gd, 0xff); \ - } \ - } else \ +#define GETGB(i) \ + if (rex.rex) { \ + gb1 = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)); \ + gb2 = 0; \ + } else { \ + gd = (nextop & 0x38) >> 3; \ + gb2 = ((gd & 4) >> 2); \ + gb1 = TO_NAT(gd & 3); \ + } \ + gd = i; \ + if (gb2) { \ + if (rv64_xtheadbb) { \ + TH_EXTU(gd, gb1, 15, 8); \ + } else { \ + SRLI(gd, gb1, 8); \ + ANDI(gd, gd, 0xff); \ + } \ + } else \ ANDI(gd, gb1, 0xff); // Write gb (gd) back to original register / memory, using s1 as scratch -#define GBBACK(s1) do { \ - if (gb2) { \ - MOV64x(s1, 0xffffffffffff00ffLL); \ - AND(gb1, gb1, s1); \ - SLLI(s1, gd, 8); \ - OR(gb1, gb1, s1); \ - } else { \ - ANDI(gb1, gb1, ~0xff); \ - OR(gb1, gb1, gd); \ - } } while (0) +#define GBBACK(s1) \ + do { \ + if (gb2) { \ + MOV64x(s1, 0xffffffffffff00ffLL); \ + AND(gb1, gb1, s1); \ + SLLI(s1, gd, 8); \ + OR(gb1, gb1, s1); \ + } else { \ + ANDI(gb1, gb1, ~0xff); \ + OR(gb1, gb1, gd); \ + } \ + } while (0) // Write eb (ed) back to original register / memory, using s1 as scratch #define EBBACK(s1, c) \ @@ -522,23 +524,23 @@ } // Get EM as vector, might use x1, x2 and x3; requires SEW64 -#define GETEM_vector(a, D) \ - if (MODREG) { \ - a = mmx_get_reg_vector(dyn, ninst, x1, x2, x3, (nextop & 7)); \ - } else { \ - SMREAD(); \ - addr = geted(dyn, addr, ninst, nextop, &ed, a, x3, &fixedaddress, rex, NULL, 1, D); \ - a = fpu_get_scratch(dyn); \ - FLD(a, ed, fixedaddress); \ - VFMV_S_F(a, a); \ +#define GETEM_vector(a, D) \ + if (MODREG) { \ + a = mmx_get_reg_vector(dyn, ninst, x1, x2, x3, (nextop & 7)); \ + } else { \ + SMREAD(); \ + addr = geted(dyn, addr, ninst, nextop, &ed, a, x3, &fixedaddress, rex, NULL, 1, D); \ + a = fpu_get_scratch(dyn); \ + FLD(a, ed, fixedaddress); \ + VFMV_S_F(a, a); \ } // Put Back EM if it was a memory and not an mm register; requires SEW64 -#define PUTEM_vector(a) \ - if (!MODREG) { \ - VFMV_F_S(a, a); \ - FSD(a, ed, fixedaddress); \ - SMWRITE2(); \ +#define PUTEM_vector(a) \ + if (!MODREG) { \ + VFMV_F_S(a, a); \ + FSD(a, ed, fixedaddress); \ + SMWRITE2(); \ } #define GETGX_empty_vector(a) \ @@ -580,12 +582,12 @@ SW(GX1, gback, gdoffset + i * 4); \ } -#define MMX_LOOP_DS(GX1, EX1, F) \ - for (int i = 0; i < 2; ++i) { \ - LW(GX1, gback, gdoffset + i * 4); \ - LW(EX1, wback, fixedaddress + i * 4); \ - F; \ - SW(GX1, gback, gdoffset + i * 4); \ +#define MMX_LOOP_DS(GX1, EX1, F) \ + for (int i = 0; i < 2; ++i) { \ + LW(GX1, gback, gdoffset + i * 4); \ + LW(EX1, wback, fixedaddress + i * 4); \ + F; \ + SW(GX1, gback, gdoffset + i * 4); \ } #define MMX_LOOP_W(GX1, EX1, F) \ @@ -853,31 +855,34 @@ } -#define SET_DFNONE() \ - do { \ - dyn->f.dfnone_here=1; \ - if (!dyn->f.dfnone) { \ - SW(xZR, xEmu, offsetof(x64emu_t, df)); \ - dyn->f.dfnone = 1; \ - } } while(0); - -#define SET_DF(S, N) \ - if ((N) != d_none) { \ - MOV_U12(S, (N)); \ - SW(S, xEmu, offsetof(x64emu_t, df)); \ - if(dyn->f.pending==SF_PENDING && dyn->insts[ninst].x64.need_after && !(dyn->insts[ninst].x64.need_after&X_PEND)) { \ - CALL_(UpdateFlags, -1, 0); \ - dyn->f.pending = SF_SET; \ - SET_NODF(); \ - } \ - dyn->f.dfnone = 0; \ - } else \ +#define SET_DFNONE() \ + do { \ + dyn->f.dfnone_here = 1; \ + if (!dyn->f.dfnone) { \ + SW(xZR, xEmu, offsetof(x64emu_t, df)); \ + dyn->f.dfnone = 1; \ + } \ + } while (0); + +#define SET_DF(S, N) \ + if ((N) != d_none) { \ + MOV_U12(S, (N)); \ + SW(S, xEmu, offsetof(x64emu_t, df)); \ + if (dyn->f.pending == SF_PENDING && dyn->insts[ninst].x64.need_after && !(dyn->insts[ninst].x64.need_after & X_PEND)) { \ + CALL_(UpdateFlags, -1, 0); \ + dyn->f.pending = SF_SET; \ + SET_NODF(); \ + } \ + dyn->f.dfnone = 0; \ + } else \ SET_DFNONE() #define SET_NODF() dyn->f.dfnone = 0 -#define SET_DFOK() dyn->f.dfnone = 1; dyn->f.dfnone_here=1 +#define SET_DFOK() \ + dyn->f.dfnone = 1; \ + dyn->f.dfnone_here = 1 #define CLEAR_FLAGS() \ - IFX(X_ALL) { ANDI(xFlags, xFlags, ~((1UL << F_AF) | (1UL << F_CF) | (1UL << F_OF2) | (1UL << F_ZF) | (1UL << F_SF) | (1UL << F_PF))); } + IFX (X_ALL) { ANDI(xFlags, xFlags, ~((1UL << F_AF) | (1UL << F_CF) | (1UL << F_OF2) | (1UL << F_ZF) | (1UL << F_SF) | (1UL << F_PF))); } #define SET_FLAGS_NEZ(reg, F, scratch) \ do { \ @@ -964,37 +969,39 @@ OR(dst, dst, s1) #if STEP == 0 -#define X87_PUSH_OR_FAIL(var, dyn, ninst, scratch, t) var = x87_do_push(dyn, ninst, scratch, t) -#define X87_PUSH_EMPTY_OR_FAIL(dyn, ninst, scratch) x87_do_push_empty(dyn, ninst, scratch) -#define X87_POP_OR_FAIL(dyn, ninst, scratch) x87_do_pop(dyn, ninst, scratch) +#define X87_PUSH_OR_FAIL(var, dyn, ninst, scratch, t) var = x87_do_push(dyn, ninst, scratch, t) +#define X87_PUSH_EMPTY_OR_FAIL(dyn, ninst, scratch) x87_do_push_empty(dyn, ninst, scratch) +#define X87_POP_OR_FAIL(dyn, ninst, scratch) x87_do_pop(dyn, ninst, scratch) #else -#define X87_PUSH_OR_FAIL(var, dyn, ninst, scratch, t) \ - if ((dyn->e.x87stack==8) || (dyn->e.pushed==8)) { \ - if(box64_dynarec_dump) dynarec_log(LOG_NONE, " Warning, suspicious x87 Push, stack=%d/%d on inst %d\n", dyn->e.x87stack, dyn->e.pushed, ninst); \ - dyn->abort = 1; \ - return addr; \ - } \ +#define X87_PUSH_OR_FAIL(var, dyn, ninst, scratch, t) \ + if ((dyn->e.x87stack == 8) || (dyn->e.pushed == 8)) { \ + if (box64_dynarec_dump) dynarec_log(LOG_NONE, " Warning, suspicious x87 Push, stack=%d/%d on inst %d\n", dyn->e.x87stack, dyn->e.pushed, ninst); \ + dyn->abort = 1; \ + return addr; \ + } \ var = x87_do_push(dyn, ninst, scratch, t); -#define X87_PUSH_EMPTY_OR_FAIL(dyn, ninst, scratch) \ - if ((dyn->e.x87stack==8) || (dyn->e.pushed==8)) { \ - if(box64_dynarec_dump) dynarec_log(LOG_NONE, " Warning, suspicious x87 Push, stack=%d/%d on inst %d\n", dyn->e.x87stack, dyn->e.pushed, ninst); \ - dyn->abort = 1; \ - return addr; \ - } \ +#define X87_PUSH_EMPTY_OR_FAIL(dyn, ninst, scratch) \ + if ((dyn->e.x87stack == 8) || (dyn->e.pushed == 8)) { \ + if (box64_dynarec_dump) dynarec_log(LOG_NONE, " Warning, suspicious x87 Push, stack=%d/%d on inst %d\n", dyn->e.x87stack, dyn->e.pushed, ninst); \ + dyn->abort = 1; \ + return addr; \ + } \ x87_do_push_empty(dyn, ninst, scratch); -#define X87_POP_OR_FAIL(dyn, ninst, scratch) \ - if ((dyn->e.x87stack==-8) || (dyn->e.poped==8)) { \ - if(box64_dynarec_dump) dynarec_log(LOG_NONE, " Warning, suspicious x87 Pop, stack=%d/%d on inst %d\n", dyn->e.x87stack, dyn->e.poped, ninst); \ - dyn->abort = 1; \ - return addr; \ - } \ +#define X87_POP_OR_FAIL(dyn, ninst, scratch) \ + if ((dyn->e.x87stack == -8) || (dyn->e.poped == 8)) { \ + if (box64_dynarec_dump) dynarec_log(LOG_NONE, " Warning, suspicious x87 Pop, stack=%d/%d on inst %d\n", dyn->e.x87stack, dyn->e.poped, ninst); \ + dyn->abort = 1; \ + return addr; \ + } \ x87_do_pop(dyn, ninst, scratch); #endif #ifndef MAYSETFLAGS -#define MAYSETFLAGS() do {} while (0) +#define MAYSETFLAGS() \ + do { \ + } while (0) #endif #ifndef READFLAGS @@ -1100,27 +1107,27 @@ dyn->vector_sew = VECTOR_SEWNA; #if STEP < 2 -#define GETIP(A) TABLE64(0, 0) +#define GETIP(A) TABLE64(0, 0) #define GETIP_(A) TABLE64(0, 0) #else // put value in the Table64 even if not using it for now to avoid difference between Step2 and Step3. Needs to be optimized later... -#define GETIP(A) \ - if (dyn->last_ip && ((A)-dyn->last_ip) < 2048) { \ - uint64_t _delta_ip = (A)-dyn->last_ip; \ - dyn->last_ip += _delta_ip; \ - if (_delta_ip) { \ - ADDI(xRIP, xRIP, _delta_ip); \ - } \ - } else { \ - dyn->last_ip = (A); \ - if (dyn->last_ip < 0xffffffff) { \ - MOV64x(xRIP, dyn->last_ip); \ - } else \ - TABLE64(xRIP, dyn->last_ip); \ +#define GETIP(A) \ + if (dyn->last_ip && ((A) - dyn->last_ip) < 2048) { \ + uint64_t _delta_ip = (A) - dyn->last_ip; \ + dyn->last_ip += _delta_ip; \ + if (_delta_ip) { \ + ADDI(xRIP, xRIP, _delta_ip); \ + } \ + } else { \ + dyn->last_ip = (A); \ + if (dyn->last_ip < 0xffffffff) { \ + MOV64x(xRIP, dyn->last_ip); \ + } else \ + TABLE64(xRIP, dyn->last_ip); \ } #define GETIP_(A) \ - if (dyn->last_ip && ((A)-dyn->last_ip) < 2048) { \ - int64_t _delta_ip = (A)-dyn->last_ip; \ + if (dyn->last_ip && ((A) - dyn->last_ip) < 2048) { \ + int64_t _delta_ip = (A) - dyn->last_ip; \ if (_delta_ip) { ADDI(xRIP, xRIP, _delta_ip); } \ } else { \ if ((A) < 0xffffffff) { \ @@ -1202,8 +1209,8 @@ void* rv64_next(x64emu_t* emu, uintptr_t addr); #define dynarec64_67_vector STEPNAME(dynarec64_67_vector) #define dynarec64_0F_vector STEPNAME(dynarec64_0F_vector) #define dynarec64_660F_vector STEPNAME(dynarec64_660F_vector) -#define dynarec64_F20F_vector STEPNAME(dynarec64_F20F_vector) -#define dynarec64_F30F_vector STEPNAME(dynarec64_F30F_vector) +#define dynarec64_F20F_vector STEPNAME(dynarec64_F20F_vector) +#define dynarec64_F30F_vector STEPNAME(dynarec64_F30F_vector) #define dynarec64_AVX STEPNAME(dynarec64_AVX) #define dynarec64_AVX_F3_0F STEPNAME(dynarec64_AVX_F3_0F) @@ -1548,7 +1555,7 @@ int extcache_st_coherency(dynarec_rv64_t* dyn, int ninst, int a, int b); #define X87_ST0 extcache_no_i64(dyn, ninst, 0, extcache_get_current_st(dyn, ninst, 0)) #define X87_ST(A) extcache_no_i64(dyn, ninst, A, extcache_get_current_st(dyn, ninst, A)) #else -#define ST_IS_F(A) (extcache_get_st(dyn, ninst, A) == EXT_CACHE_ST_F) +#define ST_IS_F(A) (extcache_get_st(dyn, ninst, A) == EXT_CACHE_ST_F) #define ST_IS_I64(A) (extcache_get_st(dyn, ninst, A) == EXT_CACHE_ST_I64) #if STEP == 3 #define X87_COMBINE(A, B) extcache_st_coherency(dyn, ninst, A, B) @@ -1811,35 +1818,35 @@ uintptr_t dynarec64_AVX_F3_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, #define FCOMS(v1, v2, s1, s2, s3, s4, s5) FCOM(S, v1, v2, s1, s2, s3, s4, s5) #define FCOMD(v1, v2, s1, s2, s3, s4, s5) FCOM(D, v1, v2, s1, s2, s3, s4, s5) -#define FCOMI(w, v1, v2, s1, s2, s3, s4, s5) \ - IFX(X_OF|X_AF|X_SF|X_PEND) { \ - MOV64x(s2, ~((1<<F_OF2)|(1<<F_AF)|(1<<F_SF))); \ - AND(xFlags, xFlags, s2); \ - } \ - IFX(X_CF|X_PF|X_ZF|X_PEND) { \ - MOV32w(s2, 0b01000101); \ - if(rv64_zbb) { \ - ANDN(xFlags, xFlags, s2); \ - } else { \ - NOT(s3, s2); \ - AND(xFlags, xFlags, s3); \ - } \ - FEQ##w(s5, v1, v1); \ - FEQ##w(s4, v2, v2); \ - AND(s5, s5, s4); \ - BEQZ(s5, 5*4); /* undefined/NaN */ \ - FEQ##w(s5, v1, v2); \ - BNEZ(s5, 5*4); /* equal */ \ - FLT##w(s1, v1, v2); /* s1 = (v1<v2)?1:0 */ \ - J(4*4); /* end */ \ - /* undefined/NaN */ \ - MV(s1, s2); \ - J(2*4); /* end */ \ - /* equal */ \ - ADDI(s1, xZR, 0b01000000); \ - /* end */ \ - OR(xFlags, xFlags, s1); \ - } \ +#define FCOMI(w, v1, v2, s1, s2, s3, s4, s5) \ + IFX (X_OF | X_AF | X_SF | X_PEND) { \ + MOV64x(s2, ~((1 << F_OF2) | (1 << F_AF) | (1 << F_SF))); \ + AND(xFlags, xFlags, s2); \ + } \ + IFX (X_CF | X_PF | X_ZF | X_PEND) { \ + MOV32w(s2, 0b01000101); \ + if (rv64_zbb) { \ + ANDN(xFlags, xFlags, s2); \ + } else { \ + NOT(s3, s2); \ + AND(xFlags, xFlags, s3); \ + } \ + FEQ##w(s5, v1, v1); \ + FEQ##w(s4, v2, v2); \ + AND(s5, s5, s4); \ + BEQZ(s5, 5 * 4); /* undefined/NaN */ \ + FEQ##w(s5, v1, v2); \ + BNEZ(s5, 5 * 4); /* equal */ \ + FLT##w(s1, v1, v2); /* s1 = (v1<v2)?1:0 */ \ + J(4 * 4); /* end */ \ + /* undefined/NaN */ \ + MV(s1, s2); \ + J(2 * 4); /* end */ \ + /* equal */ \ + ADDI(s1, xZR, 0b01000000); \ + /* end */ \ + OR(xFlags, xFlags, s1); \ + } \ SET_DFNONE() #define FCOMIS(v1, v2, s1, s2, s3, s4, s5) FCOMI(S, v1, v2, s1, s2, s3, s4, s5) @@ -1860,17 +1867,17 @@ uintptr_t dynarec64_AVX_F3_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, #define FAST_8BIT_OPERATION(dst, src, s1, OP) \ if (!box64_dynarec_nativeflags && MODREG && (rv64_zbb || rv64_xtheadbb) && !dyn->insts[ninst].x64.gen_flags) { \ if (rex.rex) { \ - wb = xRAX + (nextop & 7) + (rex.b << 3); \ + wb = TO_NAT((nextop & 7) + (rex.b << 3)); \ wb2 = 0; \ - gb = xRAX + ((nextop & 0x38) >> 3) + (rex.r << 3); \ + gb = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)); \ gb2 = 0; \ } else { \ wb = (nextop & 7); \ wb2 = (wb >> 2) * 8; \ - wb = xRAX + (wb & 3); \ + wb = TO_NAT(wb & 3); \ gd = (nextop & 0x38) >> 3; \ gb2 = ((gd & 4) >> 2) * 8; \ - gb = xRAX + (gd & 3); \ + gb = TO_NAT(gd & 3); \ } \ if (src##2) { ANDI(s1, src, 0xf00); } \ SLLI(s1, (src##2 ? s1 : src), 64 - src##2 - 8); \ @@ -1890,8 +1897,8 @@ uintptr_t dynarec64_AVX_F3_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, #define FAST_16BIT_OPERATION(dst, src, s1, OP) \ if (!box64_dynarec_nativeflags && MODREG && (rv64_zbb || rv64_xtheadbb) && !dyn->insts[ninst].x64.gen_flags) { \ - gd = xRAX + ((nextop & 0x38) >> 3) + (rex.r << 3); \ - ed = xRAX + (nextop & 7) + (rex.b << 3); \ + gd = TO_NAT(((nextop & 0x38) >> 3) + (rex.r << 3)); \ + ed = TO_NAT((nextop & 7) + (rex.b << 3)); \ SLLI(s1, src, 64 - 16); \ if (rv64_zbb) { \ RORI(dst, dst, 16); \ diff --git a/src/dynarec/rv64/dynarec_rv64_jmpnext.c b/src/dynarec/rv64/dynarec_rv64_jmpnext.c index 4c6d42a9..273f6460 100644 --- a/src/dynarec/rv64/dynarec_rv64_jmpnext.c +++ b/src/dynarec/rv64/dynarec_rv64_jmpnext.c @@ -12,12 +12,12 @@ void CreateJmpNext(void* addr, void* next) uint32_t* block = (uint32_t*)addr; uintptr_t diff = (intptr_t)next - (intptr_t)addr; AUIPC(x2, SPLIT20(diff)); - #if 1 +#if 1 LD(x2, x2, SPLIT12(diff)); - #else +#else // Probably not usefull, but keeping the code, just in case ADDI(x2, x2, SPLIT12(diff)); LR_D(x2, x2, 1, 1); - #endif +#endif BR(x2); } diff --git a/src/dynarec/rv64/dynarec_rv64_pass0.h b/src/dynarec/rv64/dynarec_rv64_pass0.h index 53e7054f..3747a7e2 100644 --- a/src/dynarec/rv64/dynarec_rv64_pass0.h +++ b/src/dynarec/rv64/dynarec_rv64_pass0.h @@ -1,15 +1,18 @@ -#define INIT uintptr_t sav_addr=addr -#define FINI \ - dyn->isize = addr-sav_addr; \ - dyn->insts[ninst].x64.addr = addr; \ - if(ninst) dyn->insts[ninst-1].x64.size = dyn->insts[ninst].x64.addr - dyn->insts[ninst-1].x64.addr +#define INIT uintptr_t sav_addr = addr +#define FINI \ + dyn->isize = addr - sav_addr; \ + dyn->insts[ninst].x64.addr = addr; \ + if (ninst) dyn->insts[ninst - 1].x64.size = dyn->insts[ninst].x64.addr - dyn->insts[ninst - 1].x64.addr -#define MESSAGE(A, ...) do {} while (0) -#define MAYSETFLAGS() dyn->insts[ninst].x64.may_set = 1 -#define READFLAGS(A) \ - dyn->insts[ninst].x64.use_flags = A; dyn->f.dfnone = 1;\ - dyn->f.pending=SF_SET +#define MESSAGE(A, ...) \ + do { \ + } while (0) +#define MAYSETFLAGS() dyn->insts[ninst].x64.may_set = 1 +#define READFLAGS(A) \ + dyn->insts[ninst].x64.use_flags = A; \ + dyn->f.dfnone = 1; \ + dyn->f.pending = SF_SET #define READFLAGS_FUSION(A, checkbarrier) \ if (box64_dynarec_nativeflags && ninst > 0 && !dyn->insts[ninst - 1].nat_flags_nofusion) { \ @@ -30,10 +33,21 @@ dyn->f.dfnone = ((B) & SF_SET) ? (((B) == SF_SET_NODF) ? 0 : 1) : 0; \ dyn->insts[ninst].nat_flags_nofusion = (FUSION) -#define EMIT(A) dyn->native_size+=4 -#define JUMP(A, C) add_jump(dyn, ninst); add_next(dyn, (uintptr_t)A); SMEND(); dyn->insts[ninst].x64.jmp = A; dyn->insts[ninst].x64.jmp_cond = C; dyn->insts[ninst].x64.jmp_insts = 0 -#define BARRIER(A) if(A!=BARRIER_MAYBE) {fpu_purgecache(dyn, ninst, 0, x1, x2, x3); dyn->insts[ninst].x64.barrier = A;} else dyn->insts[ninst].barrier_maybe = 1 -#define SET_HASCALLRET() dyn->insts[ninst].x64.has_callret = 1 +#define EMIT(A) dyn->native_size += 4 +#define JUMP(A, C) \ + add_jump(dyn, ninst); \ + add_next(dyn, (uintptr_t)A); \ + SMEND(); \ + dyn->insts[ninst].x64.jmp = A; \ + dyn->insts[ninst].x64.jmp_cond = C; \ + dyn->insts[ninst].x64.jmp_insts = 0 +#define BARRIER(A) \ + if (A != BARRIER_MAYBE) { \ + fpu_purgecache(dyn, ninst, 0, x1, x2, x3); \ + dyn->insts[ninst].x64.barrier = A; \ + } else \ + dyn->insts[ninst].barrier_maybe = 1 +#define SET_HASCALLRET() dyn->insts[ninst].x64.has_callret = 1 #define NEW_INST \ ++dyn->size; \ memset(&dyn->insts[ninst], 0, sizeof(instruction_native_t)); \ @@ -57,21 +71,21 @@ dyn->insts[ninst].vector_sew_exit = dyn->vector_sew; \ dyn->insts[ninst].x64.has_next = (ok > 0) ? 1 : 0; #define INST_NAME(name) -#define DEFAULT \ - --dyn->size; \ - *ok = -1; \ - if(box64_dynarec_log>=LOG_INFO || box64_dynarec_dump || box64_dynarec_missing==1) {\ +#define DEFAULT \ + --dyn->size; \ + *ok = -1; \ + if (box64_dynarec_log >= LOG_INFO || box64_dynarec_dump || box64_dynarec_missing == 1) { \ dynarec_log(LOG_NONE, "%p: Dynarec stopped because of %sOpcode %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X", \ - (void*)ip, rex.is32bits?"32bits ":"",\ - PKip(0), \ - PKip(1), PKip(2), PKip(3), \ - PKip(4), PKip(5), PKip(6), \ - PKip(7), PKip(8), PKip(9), \ - PKip(10),PKip(11),PKip(12), \ - PKip(13),PKip(14)); \ - printFunctionAddr(ip, " => "); \ - dynarec_log(LOG_NONE, "\n"); \ - } + (void*)ip, rex.is32bits ? "32bits " : "", \ + PKip(0), \ + PKip(1), PKip(2), PKip(3), \ + PKip(4), PKip(5), PKip(6), \ + PKip(7), PKip(8), PKip(9), \ + PKip(10), PKip(11), PKip(12), \ + PKip(13), PKip(14)); \ + printFunctionAddr(ip, " => "); \ + dynarec_log(LOG_NONE, "\n"); \ + } #define SET_ELEMENT_WIDTH(s1, sew, set) \ do { \ diff --git a/src/dynarec/rv64/dynarec_rv64_pass1.h b/src/dynarec/rv64/dynarec_rv64_pass1.h index b488ef86..6d154fb9 100644 --- a/src/dynarec/rv64/dynarec_rv64_pass1.h +++ b/src/dynarec/rv64/dynarec_rv64_pass1.h @@ -1,7 +1,11 @@ #define INIT #define FINI -#define MESSAGE(A, ...) do {} while (0) -#define EMIT(A) do {} while (0) +#define MESSAGE(A, ...) \ + do { \ + } while (0) +#define EMIT(A) \ + do { \ + } while (0) #define NEW_INST \ dyn->insts[ninst].f_entry = dyn->f; \ dyn->e.combined1 = dyn->e.combined2 = 0; \ diff --git a/src/dynarec/rv64/dynarec_rv64_pass2.h b/src/dynarec/rv64/dynarec_rv64_pass2.h index 7cfbc724..5a5665bc 100644 --- a/src/dynarec/rv64/dynarec_rv64_pass2.h +++ b/src/dynarec/rv64/dynarec_rv64_pass2.h @@ -1,12 +1,18 @@ -#define INIT dyn->native_size = 0 -#define FINI \ - if(ninst) { \ - dyn->insts[ninst].address = (dyn->insts[ninst-1].address+dyn->insts[ninst-1].size); \ - dyn->insts_size += 1+((dyn->insts[ninst].x64.size>(dyn->insts[ninst].size/4))?dyn->insts[ninst].x64.size:(dyn->insts[ninst].size/4))/15; \ - } +#define INIT dyn->native_size = 0 +#define FINI \ + if (ninst) { \ + dyn->insts[ninst].address = (dyn->insts[ninst - 1].address + dyn->insts[ninst - 1].size); \ + dyn->insts_size += 1 + ((dyn->insts[ninst].x64.size > (dyn->insts[ninst].size / 4)) ? dyn->insts[ninst].x64.size : (dyn->insts[ninst].size / 4)) / 15; \ + } -#define MESSAGE(A, ...) do {} while (0) -#define EMIT(A) do {dyn->insts[ninst].size+=4; dyn->native_size+=4;}while(0) +#define MESSAGE(A, ...) \ + do { \ + } while (0) +#define EMIT(A) \ + do { \ + dyn->insts[ninst].size += 4; \ + dyn->native_size += 4; \ + } while (0) #define NEW_INST \ dyn->vector_sew = dyn->insts[ninst].vector_sew_entry; \ dyn->inst_sew = dyn->vector_sew; \ @@ -19,5 +25,16 @@ } #define INST_EPILOG dyn->insts[ninst].epilog = dyn->native_size; #define INST_NAME(name) -#define TABLE64(A, V) {Table64(dyn, (V), 2); EMIT(0); EMIT(0);} -#define FTABLE64(A, V) {mmx87_regs_t v = {.d = V}; Table64(dyn, v.q, 2); EMIT(0); EMIT(0);} +#define TABLE64(A, V) \ + { \ + Table64(dyn, (V), 2); \ + EMIT(0); \ + EMIT(0); \ + } +#define FTABLE64(A, V) \ + { \ + mmx87_regs_t v = { .d = V }; \ + Table64(dyn, v.q, 2); \ + EMIT(0); \ + EMIT(0); \ + } diff --git a/src/dynarec/rv64/dynarec_rv64_pass3.h b/src/dynarec/rv64/dynarec_rv64_pass3.h index 0384b0a9..d8a270f6 100644 --- a/src/dynarec/rv64/dynarec_rv64_pass3.h +++ b/src/dynarec/rv64/dynarec_rv64_pass3.h @@ -1,17 +1,19 @@ #define INIT -#define FINI \ - if(ninst) \ - addInst(dyn->instsize, &dyn->insts_size, dyn->insts[ninst].x64.size, dyn->insts[ninst].size/4); \ +#define FINI \ + if (ninst) \ + addInst(dyn->instsize, &dyn->insts_size, dyn->insts[ninst].x64.size, dyn->insts[ninst].size / 4); \ addInst(dyn->instsize, &dyn->insts_size, 0, 0); -#define EMIT(A) \ - do { \ - if(box64_dynarec_dump) print_opcode(dyn, ninst, (uint32_t)A); \ - *(uint32_t*)(dyn->block) = (uint32_t)(A); \ - dyn->block += 4; dyn->native_size += 4; \ - dyn->insts[ninst].size2 += 4; \ - }while(0) +#define EMIT(A) \ + do { \ + if (box64_dynarec_dump) print_opcode(dyn, ninst, (uint32_t)A); \ + *(uint32_t*)(dyn->block) = (uint32_t)(A); \ + dyn->block += 4; \ + dyn->native_size += 4; \ + dyn->insts[ninst].size2 += 4; \ + } while (0) -#define MESSAGE(A, ...) if(box64_dynarec_dump) dynarec_log(LOG_NONE, __VA_ARGS__) +#define MESSAGE(A, ...) \ + if (box64_dynarec_dump) dynarec_log(LOG_NONE, __VA_ARGS__) #define NEW_INST \ dyn->vector_sew = dyn->insts[ninst].vector_sew_entry; \ dyn->inst_sew = dyn->vector_sew; \ @@ -25,11 +27,24 @@ #define INST_EPILOG #define INST_NAME(name) inst_name_pass3(dyn, ninst, name, rex) -#define TABLE64(A, V) {int val64offset = Table64(dyn, (V), 3); MESSAGE(LOG_DUMP, " Table64: 0x%lx\n", (V)); AUIPC(A, SPLIT20(val64offset)); LD(A, A, SPLIT12(val64offset));} -#define FTABLE64(A, V) {mmx87_regs_t v = {.d = V}; int val64offset = Table64(dyn, v.q, 3); MESSAGE(LOG_DUMP, " FTable64: %g\n", v.d); AUIPC(x1, SPLIT20(val64offset)); FLD(A, x1, SPLIT12(val64offset));} +#define TABLE64(A, V) \ + { \ + int val64offset = Table64(dyn, (V), 3); \ + MESSAGE(LOG_DUMP, " Table64: 0x%lx\n", (V)); \ + AUIPC(A, SPLIT20(val64offset)); \ + LD(A, A, SPLIT12(val64offset)); \ + } +#define FTABLE64(A, V) \ + { \ + mmx87_regs_t v = { .d = V }; \ + int val64offset = Table64(dyn, v.q, 3); \ + MESSAGE(LOG_DUMP, " FTable64: %g\n", v.d); \ + AUIPC(x1, SPLIT20(val64offset)); \ + FLD(A, x1, SPLIT12(val64offset)); \ + } #define DEFAULT_VECTOR \ - if (box64_dynarec_log >= LOG_INFO || box64_dynarec_dump || box64_dynarec_missing==2) { \ + if (box64_dynarec_log >= LOG_INFO || box64_dynarec_dump || box64_dynarec_missing == 2) { \ dynarec_log(LOG_NONE, "%p: Dynarec fallback to scalar version because of %sOpcode" \ " %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X", \ (void*)ip, rex.is32bits ? "x86 " : "x64 ", \ diff --git a/src/dynarec/rv64/rv64_emitter.h b/src/dynarec/rv64/rv64_emitter.h index d146c364..39e0b7bd 100644 --- a/src/dynarec/rv64/rv64_emitter.h +++ b/src/dynarec/rv64/rv64_emitter.h @@ -49,24 +49,9 @@ f28–31 ft8–11 FP temporaries Caller #define xFlags 8 #define xRIP 7 -// 32bits version -#define wEAX xRAX -#define wECX xRCX -#define wEDX xRDX -#define wEBX xRBX -#define wESP xRSP -#define wEBP xRBP -#define wESI xRSI -#define wEDI xRDI -#define wR8 xR8 -#define wR9 xR9 -#define wR10 xR10 -#define wR11 xR11 -#define wR12 xR12 -#define wR13 xR13 -#define wR14 xR14 -#define wR15 xR15 -#define wFlags xFlags +// convert a x86 register to native according to the register mapping +#define TO_NAT(A) (xRAX + (A)) + // scratch registers #define x1 11 #define x2 12 @@ -77,13 +62,7 @@ f28–31 ft8–11 FP temporaries Caller #define x9 9 // used to clear the upper 32bits #define xMASK 5 -// 32bits version of scratch -#define w1 x1 -#define w2 x2 -#define w3 x3 -#define w4 x4 -#define w5 x5 -#define w6 x6 + // emu is r10 #define xEmu 10 // RV64 RA @@ -112,18 +91,22 @@ f28–31 ft8–11 FP temporaries Caller // MOV64x/MOV32w is quite complex, so use a function for this #define MOV64x(A, B) rv64_move64(dyn, ninst, A, B) #define MOV32w(A, B) rv64_move32(dyn, ninst, A, B, 1) -#define MOV64xw(A, B) do { \ - if (rex.w) { \ - MOV64x(A, B); \ - } else { \ - MOV32w(A, B); \ - } } while (0) -#define MOV64z(A, B) do { \ - if (rex.is32bits) { \ - MOV32w(A, B); \ - } else { \ - MOV64x(A, B); \ - } } while (0) +#define MOV64xw(A, B) \ + do { \ + if (rex.w) { \ + MOV64x(A, B); \ + } else { \ + MOV32w(A, B); \ + } \ + } while (0) +#define MOV64z(A, B) \ + do { \ + if (rex.is32bits) { \ + MOV32w(A, B); \ + } else { \ + MOV64x(A, B); \ + } \ + } while (0) // ZERO the upper part #define ZEROUP(r) AND(r, r, xMASK) @@ -233,19 +216,23 @@ f28–31 ft8–11 FP temporaries Caller // rd = rs1 (pseudo instruction) #define MV(rd, rs1) ADDI(rd, rs1, 0) // rd = rs1 (pseudo instruction) -#define MVxw(rd, rs1) do { \ - if (rex.w) { \ - MV(rd, rs1); \ - } else { \ - AND(rd, rs1, xMASK); \ - } } while (0) +#define MVxw(rd, rs1) \ + do { \ + if (rex.w) { \ + MV(rd, rs1); \ + } else { \ + AND(rd, rs1, xMASK); \ + } \ + } while (0) // rd = rs1 (pseudo instruction) -#define MVz(rd, rs1) do { \ - if (rex.is32bits) { \ - AND(rd, rs1, xMASK); \ - } else { \ - MV(rd, rs1); \ - } } while (0) +#define MVz(rd, rs1) \ + do { \ + if (rex.is32bits) { \ + AND(rd, rs1, xMASK); \ + } else { \ + MV(rd, rs1); \ + } \ + } while (0) // rd = !rs1 #define NOT(rd, rs1) XORI(rd, rs1, -1) // rd = -rs1 @@ -502,60 +489,72 @@ f28–31 ft8–11 FP temporaries Caller // rd = rs1>>rs2 arithmetic #define SRAW(rd, rs1, rs2) EMIT(R_type(0b0100000, rs2, rs1, 0b101, rd, 0b0111011)) -#define SLLxw(rd, rs1, rs2) do { \ - if (rex.w) { \ - SLL(rd, rs1, rs2); \ - } else { \ - SLLW(rd, rs1, rs2); \ - ZEROUP(rd); \ - } } while (0) - -#define SRLxw(rd, rs1, rs2) do { \ - if (rex.w) { \ - SRL(rd, rs1, rs2); \ - } else { \ - SRLW(rd, rs1, rs2); \ - ZEROUP(rd); \ - } } while (0) - -#define SRAxw(rd, rs1, rs2) do { \ - if (rex.w) { \ - SRA(rd, rs1, rs2); \ - } else { \ - SRAW(rd, rs1, rs2); \ - ZEROUP(rd); \ - } } while (0) +#define SLLxw(rd, rs1, rs2) \ + do { \ + if (rex.w) { \ + SLL(rd, rs1, rs2); \ + } else { \ + SLLW(rd, rs1, rs2); \ + ZEROUP(rd); \ + } \ + } while (0) + +#define SRLxw(rd, rs1, rs2) \ + do { \ + if (rex.w) { \ + SRL(rd, rs1, rs2); \ + } else { \ + SRLW(rd, rs1, rs2); \ + ZEROUP(rd); \ + } \ + } while (0) + +#define SRAxw(rd, rs1, rs2) \ + do { \ + if (rex.w) { \ + SRA(rd, rs1, rs2); \ + } else { \ + SRAW(rd, rs1, rs2); \ + ZEROUP(rd); \ + } \ + } while (0) // Shift Left Immediate, 32-bit, sign-extended #define SLLIW(rd, rs1, imm5) EMIT(I_type(imm5, rs1, 0b001, rd, 0b0011011)) // Shift Left Immediate -#define SLLIxw(rd, rs1, imm) do { \ - if (rex.w) { \ - SLLI(rd, rs1, imm); \ - } else { \ - SLLIW(rd, rs1, imm); \ - ZEROUP(rd); \ - } } while (0) +#define SLLIxw(rd, rs1, imm) \ + do { \ + if (rex.w) { \ + SLLI(rd, rs1, imm); \ + } else { \ + SLLIW(rd, rs1, imm); \ + ZEROUP(rd); \ + } \ + } while (0) // Shift Right Logical Immediate, 32-bit, sign-extended #define SRLIW(rd, rs1, imm5) EMIT(I_type(imm5, rs1, 0b101, rd, 0b0011011)) // Shift Right Logical Immediate -#define SRLIxw(rd, rs1, imm) do { \ - if (rex.w) { \ - SRLI(rd, rs1, imm); \ - } else { \ - SRLIW(rd, rs1, imm); \ - if ((imm) == 0) ZEROUP(rd); \ - } } while (0) +#define SRLIxw(rd, rs1, imm) \ + do { \ + if (rex.w) { \ + SRLI(rd, rs1, imm); \ + } else { \ + SRLIW(rd, rs1, imm); \ + if ((imm) == 0) ZEROUP(rd); \ + } \ + } while (0) // Shift Right Arithmetic Immediate, 32-bit, sign-extended #define SRAIW(rd, rs1, imm5) EMIT(I_type((imm5) | (0b0100000 << 5), rs1, 0b101, rd, 0b0011011)) // Shift Right Arithmetic Immediate -#define SRAIxw(rd, rs1, imm) do { \ - if (rex.w) { \ - SRAI(rd, rs1, imm); \ - } else { \ - SRAIW(rd, rs1, imm); \ - ZEROUP(rd); \ - } } while (0) +#define SRAIxw(rd, rs1, imm) \ + do { \ + if (rex.w) { \ + SRAI(rd, rs1, imm); \ + } else { \ + SRAIW(rd, rs1, imm); \ + ZEROUP(rd); \ + } \ + } while (0) #define CSRRW(rd, rs1, csr) EMIT(I_type(csr, rs1, 0b001, rd, 0b1110011)) #define CSRRS(rd, rs1, csr) EMIT(I_type(csr, rs1, 0b010, rd, 0b1110011)) @@ -1312,10 +1311,10 @@ f28–31 ft8–11 FP temporaries Caller */ -#define VECTOR_SEW8 0b000 -#define VECTOR_SEW16 0b001 -#define VECTOR_SEW32 0b010 -#define VECTOR_SEW64 0b011 +#define VECTOR_SEW8 0b000 +#define VECTOR_SEW16 0b001 +#define VECTOR_SEW32 0b010 +#define VECTOR_SEW64 0b011 #define VECTOR_SEWNA 0b111 // N/A #define VECTOR_SEWANY 0b1000 // any sew would be ok, but not N/A. @@ -1447,7 +1446,7 @@ f28–31 ft8–11 FP temporaries Caller #define VFSLIDE1DOWN_VF(vd, vs2, rs1, vm) EMIT(R_type(0b0011110 | (vm), vs2, rs1, 0b101, vd, 0b1010111)) // 001111...........101.....1010111 #define VFMV_S_F(vd, rs1) EMIT(I_type((rv64_xtheadvector ? 0b001101100000 : 0b010000100000), rs1, 0b101, vd, 0b1010111)) // 010000100000.....101.....1010111 -#define VFMV_V_F(vd, rs1) EMIT(I_type(0b010111100000, rs1, 0b101, vd, 0b1010111)) // 010111100000.....101.....1010111 +#define VFMV_V_F(vd, rs1) EMIT(I_type(0b010111100000, rs1, 0b101, vd, 0b1010111)) // 010111100000.....101.....1010111 #define VFMERGE_VFM(vd, vs2, rs1) EMIT(R_type(0b0101110, vs2, rs1, 0b101, vd, 0b1010111)) // 0101110..........101.....1010111 @@ -1533,8 +1532,8 @@ f28–31 ft8–11 FP temporaries Caller #define VFSQRT_V(vd, vs2, vm) EMIT(R_type((rv64_xtheadvector ? 0b1000110 : 0b0100110) | (vm), vs2, 0b00000, 0b001, vd, 0b1010111)) // 010011......00000001.....1010111 #define VFCLASS_V(vd, vs2, vm) EMIT(R_type((rv64_xtheadvector ? 0b1000110 : 0b0100110) | (vm), vs2, 0b10000, 0b001, vd, 0b1010111)) // 010011......10000001.....1010111 -#define VFRSQRT7_V(vd, vs2, vm) EMIT(R_type(0b0100110 | (vm), vs2, 0b00100, 0b001, vd, 0b1010111)) // 010011......00100001.....1010111 -#define VFREC7_V(vd, vs2, vm) EMIT(R_type(0b0100110 | (vm), vs2, 0b00101, 0b001, vd, 0b1010111)) // 010011......00101001.....1010111 +#define VFRSQRT7_V(vd, vs2, vm) EMIT(R_type(0b0100110 | (vm), vs2, 0b00100, 0b001, vd, 0b1010111)) // 010011......00100001.....1010111 +#define VFREC7_V(vd, vs2, vm) EMIT(R_type(0b0100110 | (vm), vs2, 0b00101, 0b001, vd, 0b1010111)) // 010011......00101001.....1010111 #define VFWADD_VV(vd, vs2, vs1, vm) EMIT(R_type(0b1100000 | (vm), vs2, vs1, 0b001, vd, 0b1010111)) // 110000...........001.....1010111 #define VFWREDUSUM_VS(vd, vs2, vs1, vm) EMIT(R_type(0b1100010 | (vm), vs2, vs1, 0b001, vd, 0b1010111)) // 110001...........001.....1010111 @@ -1564,12 +1563,12 @@ f28–31 ft8–11 FP temporaries Caller #define VSLIDEDOWN_VX(vd, vs2, rs1, vm) EMIT(R_type(0b0011110 | (vm), vs2, rs1, 0b100, vd, 0b1010111)) // 001111...........100.....1010111 #define VADC_VXM(vd, vs2, rs1) EMIT(R_type((0b0100000 | rv64_xtheadvector), vs2, rs1, 0b100, vd, 0b1010111)) // 0100000..........100.....1010111 -#define VMADC_VXM(vd, vs2, rs1) EMIT(R_type(0b0100010, vs2, rs1, 0b100, vd, 0b1010111)) // 0100010..........100.....1010111 -#define VMADC_VX(vd, vs2, rs1) EMIT(R_type(0b0100011, vs2, rs1, 0b100, vd, 0b1010111)) // 0100011..........100.....1010111 +#define VMADC_VXM(vd, vs2, rs1) EMIT(R_type(0b0100010, vs2, rs1, 0b100, vd, 0b1010111)) // 0100010..........100.....1010111 +#define VMADC_VX(vd, vs2, rs1) EMIT(R_type(0b0100011, vs2, rs1, 0b100, vd, 0b1010111)) // 0100011..........100.....1010111 #define VSBC_VXM(vd, vs2, rs1) EMIT(R_type((0b0100100 | rv64_xtheadvector), vs2, rs1, 0b100, vd, 0b1010111)) // 0100100..........100.....1010111 -#define VMSBC_VXM(vd, vs2, rs1) EMIT(R_type(0b0100110, vs2, rs1, 0b100, vd, 0b1010111)) // 0100110..........100.....1010111 -#define VMSBC_VX(vd, vs2, rs1) EMIT(R_type(0b0100111, vs2, rs1, 0b100, vd, 0b1010111)) // 0100111..........100.....1010111 -#define VMERGE_VXM(vd, vs2, rs1) EMIT(R_type(0b0101110, vs2, rs1, 0b100, vd, 0b1010111)) // 0101110..........100.....1010111 +#define VMSBC_VXM(vd, vs2, rs1) EMIT(R_type(0b0100110, vs2, rs1, 0b100, vd, 0b1010111)) // 0100110..........100.....1010111 +#define VMSBC_VX(vd, vs2, rs1) EMIT(R_type(0b0100111, vs2, rs1, 0b100, vd, 0b1010111)) // 0100111..........100.....1010111 +#define VMERGE_VXM(vd, vs2, rs1) EMIT(R_type(0b0101110, vs2, rs1, 0b100, vd, 0b1010111)) // 0101110..........100.....1010111 #define VMV_V_X(vd, rs1) EMIT(I_type(0b010111100000, rs1, 0b100, vd, 0b1010111)) // 010111100000.....100.....1010111 @@ -1610,12 +1609,12 @@ f28–31 ft8–11 FP temporaries Caller #define VRGATHEREI16_VV(vd, vs2, vs1, vm) EMIT(R_type(0b0011100 | (vm), vs2, vs1, 0b000, vd, 0b1010111)) // 001110...........000.....1010111 #define VADC_VVM(vd, vs2, vs1) EMIT(R_type((0b0100000 | rv64_xtheadvector), vs2, vs1, 0b000, vd, 0b1010111)) // 0100000..........000.....1010111 -#define VMADC_VVM(vd, vs2, vs1) EMIT(R_type(0b0100010, vs2, vs1, 0b000, vd, 0b1010111)) // 0100010..........000.....1010111 -#define VMADC_VV(vd, vs2, vs1) EMIT(R_type(0b0100011, vs2, vs1, 0b000, vd, 0b1010111)) // 0100011..........000.....1010111 +#define VMADC_VVM(vd, vs2, vs1) EMIT(R_type(0b0100010, vs2, vs1, 0b000, vd, 0b1010111)) // 0100010..........000.....1010111 +#define VMADC_VV(vd, vs2, vs1) EMIT(R_type(0b0100011, vs2, vs1, 0b000, vd, 0b1010111)) // 0100011..........000.....1010111 #define VSBC_VVM(vd, vs2, vs1) EMIT(R_type((0b0100100 | rv64_xtheadvector), vs2, vs1, 0b000, vd, 0b1010111)) // 0100100..........000.....1010111 -#define VMSBC_VVM(vd, vs2, vs1) EMIT(R_type(0b0100110, vs2, vs1, 0b000, vd, 0b1010111)) // 0100110..........000.....1010111 -#define VMSBC_VV(vd, vs2, vs1) EMIT(R_type(0b0100111, vs2, vs1, 0b000, vd, 0b1010111)) // 0100111..........000.....1010111 -#define VMERGE_VVM(vd, vs2, vs1) EMIT(R_type(0b0101110, vs2, vs1, 0b000, vd, 0b1010111)) // 0101110..........000.....1010111 +#define VMSBC_VVM(vd, vs2, vs1) EMIT(R_type(0b0100110, vs2, vs1, 0b000, vd, 0b1010111)) // 0100110..........000.....1010111 +#define VMSBC_VV(vd, vs2, vs1) EMIT(R_type(0b0100111, vs2, vs1, 0b000, vd, 0b1010111)) // 0100111..........000.....1010111 +#define VMERGE_VVM(vd, vs2, vs1) EMIT(R_type(0b0101110, vs2, vs1, 0b000, vd, 0b1010111)) // 0101110..........000.....1010111 #define VMV_V_V(vd, vs1) EMIT(I_type(0b010111100000, vs1, 0b000, vd, 0b1010111)) // 010111100000.....000.....1010111 @@ -1653,9 +1652,9 @@ f28–31 ft8–11 FP temporaries Caller #define VSLIDEDOWN_VI(vd, vs2, simm5, vm) EMIT(R_type(0b0011110 | (vm), vs2, simm5, 0b011, vd, 0b1010111)) // 001111...........011.....1010111 #define VADC_VIM(vd, vs2, simm5) EMIT(R_type((0b0100000 | rv64_xtheadvector), vs2, simm5, 0b011, vd, 0b1010111)) // 0100000..........011.....1010111 -#define VMADC_VIM(vd, vs2, simm5) EMIT(R_type(0b0100010, vs2, simm5, 0b011, vd, 0b1010111)) // 0100010..........011.....1010111 -#define VMADC_VI(vd, vs2, simm5) EMIT(R_type(0b0100011, vs2, simm5, 0b011, vd, 0b1010111)) // 0100011..........011.....1010111 -#define VMERGE_VIM(vd, vs2, simm5) EMIT(R_type(0b0101110, vs2, simm5, 0b011, vd, 0b1010111)) // 0101110..........011.....1010111 +#define VMADC_VIM(vd, vs2, simm5) EMIT(R_type(0b0100010, vs2, simm5, 0b011, vd, 0b1010111)) // 0100010..........011.....1010111 +#define VMADC_VI(vd, vs2, simm5) EMIT(R_type(0b0100011, vs2, simm5, 0b011, vd, 0b1010111)) // 0100011..........011.....1010111 +#define VMERGE_VIM(vd, vs2, simm5) EMIT(R_type(0b0101110, vs2, simm5, 0b011, vd, 0b1010111)) // 0101110..........011.....1010111 #define VMV_V_I(vd, simm5) EMIT(I_type(0b010111100000, simm5, 0b011, vd, 0b1010111)) // 010111100000.....011.....1010111 @@ -1695,8 +1694,8 @@ f28–31 ft8–11 FP temporaries Caller #define VAADD_VV(vd, vs2, vs1, vm) EMIT(R_type(0b0010010 | (vm), vs2, vs1, 0b010, vd, 0b1010111)) // 001001...........010.....1010111 #define VASUB_VV(vd, vs2, vs1, vm) EMIT(R_type(0b0010110 | (vm), vs2, vs1, 0b010, vd, 0b1010111)) // 001011...........010.....1010111 // Warning, no unsigned edition in Xtheadvector -#define VAADDU_VV(vd, vs2, vs1, vm) EMIT(R_type(0b0010000 | (vm), vs2, vs1, 0b010, vd, 0b1010111)) // 001000...........010.....1010111 -#define VASUBU_VV(vd, vs2, vs1, vm) EMIT(R_type(0b0010100 | (vm), vs2, vs1, 0b010, vd, 0b1010111)) // 001010...........010.....1010111 +#define VAADDU_VV(vd, vs2, vs1, vm) EMIT(R_type(0b0010000 | (vm), vs2, vs1, 0b010, vd, 0b1010111)) // 001000...........010.....1010111 +#define VASUBU_VV(vd, vs2, vs1, vm) EMIT(R_type(0b0010100 | (vm), vs2, vs1, 0b010, vd, 0b1010111)) // 001010...........010.....1010111 // Warning: zero-extended on xtheadvector! #define VMV_X_S(rd, vs2) EMIT(R_type((rv64_xtheadvector ? 0b0011001 : 0b0100001), vs2, 0b00000, 0b010, rd, 0b1010111)) // 0100001.....00000010.....1010111 diff --git a/src/dynarec/rv64/rv64_lock.h b/src/dynarec/rv64/rv64_lock.h index d92b42f9..9c55dffc 100644 --- a/src/dynarec/rv64/rv64_lock.h +++ b/src/dynarec/rv64/rv64_lock.h @@ -15,37 +15,37 @@ extern uintptr_t rv64_lock_xchg_dd(void* p, uintptr_t val); extern uint32_t rv64_lock_xchg_d(void* p, uint32_t val); // Atomically store value to [p] only if [p] is NULL. Return old [p] value -extern uint32_t rv64_lock_storeifnull_d(void*p, uint32_t val); +extern uint32_t rv64_lock_storeifnull_d(void* p, uint32_t val); // Atomically store value to [p] only if [p] is NULL. Return old [p] value -extern void* rv64_lock_storeifnull(void*p, void* val); +extern void* rv64_lock_storeifnull(void* p, void* val); // Atomically store value to [p] only if [p] is ref. Return new [p] value (so val or old) -extern void* rv64_lock_storeifref(void*p, void* val, void* ref); +extern void* rv64_lock_storeifref(void* p, void* val, void* ref); // Atomically store value to [p] only if [p] is ref. Return new [p] value (so val or old) -extern uint32_t rv64_lock_storeifref_d(void*p, uint32_t val, uint32_t ref); +extern uint32_t rv64_lock_storeifref_d(void* p, uint32_t val, uint32_t ref); // Atomically store value to [p] only if [p] is ref. Return new [p] value (so val or old) -extern uint32_t rv64_lock_storeifref2_d(void*p, uint32_t val, uint32_t ref); +extern uint32_t rv64_lock_storeifref2_d(void* p, uint32_t val, uint32_t ref); // decrement atomically the byte at [p] (but only if p not 0) -extern void rv64_lock_decifnot0b(void*p); +extern void rv64_lock_decifnot0b(void* p); // atomic store (with memory barrier) -extern void rv64_lock_storeb(void*p, uint8_t b); +extern void rv64_lock_storeb(void* p, uint8_t b); // increment atomically the int at [p] only if it was 0. Return the old value of [p] -extern int rv64_lock_incif0(void*p); +extern int rv64_lock_incif0(void* p); // decrement atomically the int at [p] (but only if p not 0) -extern int rv64_lock_decifnot0(void*p); +extern int rv64_lock_decifnot0(void* p); // atomic store (with memory barrier) -extern void rv64_lock_store(void*p, uint32_t v); +extern void rv64_lock_store(void* p, uint32_t v); // atomic store (with memory barrier) -extern void rv64_lock_store_dd(void*p, uint64_t v); +extern void rv64_lock_store_dd(void* p, uint64_t v); // atomic get (with memory barrier) extern uint32_t rv64_lock_get_b(void* p); @@ -61,4 +61,4 @@ uint8_t rv64_lock_xchg_b(void* addr, uint8_t v); extern int rv64_lock_cas_b(void* p, uint8_t ref, uint8_t val); extern int rv64_lock_cas_h(void* p, uint16_t ref, uint16_t val); -#endif //__RV64_LOCK__H__ +#endif //__RV64_LOCK__H__ diff --git a/src/dynarec/rv64/rv64_printer.h b/src/dynarec/rv64/rv64_printer.h index e22a208f..505e7edb 100644 --- a/src/dynarec/rv64/rv64_printer.h +++ b/src/dynarec/rv64/rv64_printer.h @@ -1,7 +1,7 @@ #ifndef _RV64_PRINTER_H_ #define _RV64_PRINTER_H_ #include <stdint.h> -#include<stdbool.h> +#include <stdbool.h> const char* rv64_print(uint32_t data, uint64_t addr); |