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| author | ptitSeb <sebastien.chev@gmail.com> | 2023-03-18 10:29:47 +0000 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2023-03-18 10:29:47 +0000 |
| commit | 72cc87b0125de48debc9609f1e95f0057638d23f (patch) | |
| tree | 1a5c27ca7b7f937bd95c19948e0c8b6c8a2bbc92 /src | |
| parent | 5705e471b7a19ecc1a445316da43a84d308ebb72 (diff) | |
| download | box64-72cc87b0125de48debc9609f1e95f0057638d23f.tar.gz box64-72cc87b0125de48debc9609f1e95f0057638d23f.zip | |
[RV64_DYNAREC] Added 66 C1 opcodes
Diffstat (limited to 'src')
| -rw-r--r-- | src/dynarec/rv64/dynarec_rv64_66.c | 97 | ||||
| -rw-r--r-- | src/dynarec/rv64/dynarec_rv64_helper.h | 36 |
2 files changed, 133 insertions, 0 deletions
diff --git a/src/dynarec/rv64/dynarec_rv64_66.c b/src/dynarec/rv64/dynarec_rv64_66.c index ecfe34b0..6348728c 100644 --- a/src/dynarec/rv64/dynarec_rv64_66.c +++ b/src/dynarec/rv64/dynarec_rv64_66.c @@ -85,6 +85,103 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni // just use regular conditional jump return dynarec64_00(dyn, addr-1, ip, ninst, rex, rep, ok, need_epilog); + case 0xC1: + nextop = F8; + switch((nextop>>3)&7) { + case 0: + INST_NAME("ROL Ew, Ib"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); + SETFLAGS(X_OF|X_CF, SF_SET); + GETEW(x1, 1); + u8 = F8; + MOV32w(x2, u8); + CALL_(rol16, x1, x3); + EWBACK; + break; + case 1: + INST_NAME("ROR Ew, Ib"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); + SETFLAGS(X_OF|X_CF, SF_SET); + GETEW(x1, 1); + u8 = F8; + MOV32w(x2, u8); + CALL_(ror16, x1, x3); + EWBACK; + break; + case 2: + INST_NAME("RCL Ew, Ib"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); + READFLAGS(X_CF); + SETFLAGS(X_OF|X_CF, SF_SET); + GETEW(x1, 1); + u8 = F8; + MOV32w(x2, u8); + CALL_(rcl16, x1, x3); + EWBACK; + break; + case 3: + INST_NAME("RCR Ew, Ib"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); + READFLAGS(X_CF); + SETFLAGS(X_OF|X_CF, SF_SET); + GETEW(x1, 1); + u8 = F8; + MOV32w(x2, u8); + CALL_(rcr16, x1, x3); + EWBACK; + break; + case 4: + case 6: + INST_NAME("SHL Ew, Ib"); + UFLAG_IF {MESSAGE(LOG_DUMP, "Need Optimization for flags\n");} + SETFLAGS(X_ALL, SF_PENDING); + GETEW(x1, 1); + u8 = F8; + UFLAG_IF {MOV32w(x2, (u8&0x1f));} + UFLAG_OP12(ed, x2) + if(MODREG) { + SLLI(ed, ed, 48+(u8&0x1f)); + SRLI(ed, ed, 48); + } else { + SLLI(ed, ed, u8&0x1f); + } + EWBACK; + UFLAG_RES(ed); + UFLAG_DF(x3, d_shl16); + break; + case 5: + INST_NAME("SHR Ed, Ib"); + UFLAG_IF {MESSAGE(LOG_DUMP, "Need Optimization for flags\n");} + SETFLAGS(X_ALL, SF_PENDING); + GETEW(x1, 1); + u8 = F8; + UFLAG_IF {MOV32w(x2, (u8&0x1f));} + UFLAG_OP12(ed, x2) + SRLI(ed, ed, u8&0x1f); + EWBACK; + UFLAG_RES(ed); + UFLAG_DF(x3, d_shr16); + break; + case 7: + INST_NAME("SAR Ed, Ib"); + SETFLAGS(X_ALL, SF_PENDING); + UFLAG_IF {MESSAGE(LOG_DUMP, "Need Optimization for flags\n");} + GETSEW(x1, 1); + u8 = F8; + UFLAG_IF {MOV32w(x2, (u8&0x1f));} + UFLAG_OP12(ed, x2) + SRAI(ed, ed, u8&0x1f); + if(MODREG) { + SLLI(ed, ed, 48); + SRLI(ed, ed, 48); + } + EWBACK; + UFLAG_RES(ed); + UFLAG_DF(x3, d_sar16); + break; + } + break; + case 0xC7: INST_NAME("MOV Ew, Iw"); nextop = F8; diff --git a/src/dynarec/rv64/dynarec_rv64_helper.h b/src/dynarec/rv64/dynarec_rv64_helper.h index 62fe1c63..9ae48da5 100644 --- a/src/dynarec/rv64/dynarec_rv64_helper.h +++ b/src/dynarec/rv64/dynarec_rv64_helper.h @@ -83,6 +83,42 @@ LD(x1, wback, fixedaddress); \ ed = x1; \ } +//GETEWW will use i for ed, and can use w for wback. +#define GETEWW(w, i, D) if(MODREG) { \ + wback = xRAX+(nextop&7)+(rex.b<<3);\ + SLLI(i, wback, 48); \ + SRLI(i, i, 48); \ + ed = i; \ + wb1 = 0; \ + } else { \ + SMREAD(); \ + addr = geted(dyn, addr, ninst, nextop, &wback, w, i, &fixedaddress, rex, NULL, 1, D); \ + LHU(i, wback, fixedaddress);\ + ed = i; \ + wb1 = 1; \ + } +//GETEW will use i for ed, and can use r3 for wback. +#define GETEW(i, D) GETEWW(x3, i, D) +//GETSEW will use i for ed, and can use r3 for wback. This is the Signed version +#define GETSEW(i, D) if(MODREG) { \ + wback = xRAX+(nextop&7)+(rex.b<<3);\ + SLLI(i, wback, 48); \ + SRAI(i, i, 48); \ + ed = i; \ + wb1 = 0; \ + } else { \ + SMREAD(); \ + addr = geted(dyn, addr, ninst, nextop, &wback, x3, i, &fixedaddress, rex, NULL, 1, D); \ + LH(i, wback, fixedaddress); \ + ed = i; \ + wb1 = 1; \ + } +// Write ed back to original register / memory +#define EWBACK EWBACKW(ed) +// Write w back to original register / memory (w needs to be 16bits only!) +#define EWBACKW(w) if(wb1) {SH(w, wback, fixedaddress); SMWRITE();} else {SRLI(wback, wback, 16); SLLI(wback, wback, 16); OR(wback, wback, w);} +// Write back gd in correct register (gd needs to be 16bits only!) +#define GWBACK do{int g=xRAX+((nextop&0x38)>>3)+(rex.r<<3); SRLI(g, g, 16); SLLI(g, g, 16); OR(g, g, gd);}while(0) // FAKEED like GETED, but doesn't get anything #define FAKEED if(!MODREG) { \ |