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| author | Yang Liu <liuyang22@iscas.ac.cn> | 2023-09-12 08:27:23 +0000 |
|---|---|---|
| committer | Yang Liu <liuyang22@iscas.ac.cn> | 2023-09-12 08:27:23 +0000 |
| commit | 75958f1f315f15206618185240bab8080c8bfd0f (patch) | |
| tree | ac02d6374652a57203a121275f5d809d7396d846 /src | |
| parent | be34e0221d12fbe55d59739cd86c628f45ffdf65 (diff) | |
| download | box64-75958f1f315f15206618185240bab8080c8bfd0f.tar.gz box64-75958f1f315f15206618185240bab8080c8bfd0f.zip | |
Use macro
Diffstat (limited to 'src')
| -rw-r--r-- | src/dynarec/rv64/dynarec_rv64_0f.c | 34 | ||||
| -rw-r--r-- | src/dynarec/rv64/dynarec_rv64_helper.c | 45 | ||||
| -rw-r--r-- | src/dynarec/rv64/rv64_emitter.h | 10 |
3 files changed, 19 insertions, 70 deletions
diff --git a/src/dynarec/rv64/dynarec_rv64_0f.c b/src/dynarec/rv64/dynarec_rv64_0f.c index 22062ce8..b0f4a3c4 100644 --- a/src/dynarec/rv64/dynarec_rv64_0f.c +++ b/src/dynarec/rv64/dynarec_rv64_0f.c @@ -1097,14 +1097,7 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni SMREAD(); addr = geted(dyn, addr, ninst, nextop, &wback, x3, x1, &fixedaddress, rex, NULL, 1, 0); SRAIxw(x1, gd, 5+rex.w); // r1 = (gd>>5) - if (rv64_zba) { - SHxADD(x3, x1, 2+rex.w, wback); - } else if (rv64_xtheadba) { - TH_ADDSL(x3, wback, x1, 2+rex.w); - } else { - SLLI(x1, x1, 2+rex.w); - ADD(x3, wback, x1); - } + ADDSL(x3, wback, x1, 2+rex.w); LDxw(x1, x3, fixedaddress); ed = x1; } @@ -1137,14 +1130,7 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni SMREAD(); addr = geted(dyn, addr, ninst, nextop, &wback, x3, x1, &fixedaddress, rex, NULL, 1, 0); SRAI(x1, gd, 5+rex.w); - if (rv64_zba) { - SHxADD(x3, x1, 2+rex.w, wback); - } else if (rv64_xtheadba) { - TH_ADDSL(x3, wback, x1, 2+rex.w); - } else { - SLLI(x1, x1, 2+rex.w); - ADD(x3, wback, x1); - } + ADDSL(x3, wback, x1, 2+rex.w); LDxw(x1, x3, fixedaddress); ed = x1; wback = x3; @@ -1291,14 +1277,7 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni SMREAD(); addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, NULL, 1, 0); SRAI(x1, gd, 5+rex.w); - if (rv64_zba) { - SHxADD(x3, x1, 2+rex.w, wback); - } else if (rv64_xtheadba) { - TH_ADDSL(x3, wback, x1, 2+rex.w); - } else { - SLLI(x1, x1, 2+rex.w); - ADD(x3, wback, x1); - } + ADDSL(x3, wback, x1, 2+rex.w); LDxw(x1, x3, fixedaddress); ed = x1; wback = x3; @@ -1467,12 +1446,7 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni SMREAD(); addr = geted(dyn, addr, ninst, nextop, &wback, x3, x1, &fixedaddress, rex, NULL, 1, 0); SRAI(x1, gd, 5+rex.w); - if (rv64_xtheadba) { - TH_ADDSL(x3, wback, x1, 2+rex.w); - } else { - SLLI(x1, x1, 2+rex.w); - ADD(x3, wback, x1); - } + ADDSL(x3, wback, x1, 2+rex.w); LDxw(x1, x3, fixedaddress); ed = x1; wback = x3; diff --git a/src/dynarec/rv64/dynarec_rv64_helper.c b/src/dynarec/rv64/dynarec_rv64_helper.c index f42ea2a1..bb9d518e 100644 --- a/src/dynarec/rv64/dynarec_rv64_helper.c +++ b/src/dynarec/rv64/dynarec_rv64_helper.c @@ -57,14 +57,7 @@ uintptr_t geted(dynarec_rv64_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, if(tmp && ((tmp<-2048) || (tmp>maxval) || !i12)) { MOV64x(scratch, tmp); if((sib>>6)) { - if(rv64_zba) { - SHxADD(ret, xRAX+sib_reg, sib>>6, scratch); - } else if (rv64_xtheadba) { - TH_ADDSL(ret, scratch, xRAX+sib_reg, sib>>6); - } else { - SLLI(ret, xRAX+sib_reg, (sib>>6)); - ADD(ret, ret, scratch); - } + ADDSL(ret, scratch, xRAX+sib_reg, sib>>6); } else { ADD(ret, xRAX+sib_reg, scratch); } @@ -85,14 +78,7 @@ uintptr_t geted(dynarec_rv64_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, } else { if (sib_reg!=4) { if(sib>>6) { - if(rv64_zba) { - SHxADD(ret, xRAX+sib_reg, sib>>6, xRAX+sib_reg2); - } else if (rv64_xtheadba) { - TH_ADDSL(ret, xRAX+sib_reg2, xRAX+sib_reg, sib>>6); - } else { - SLLI(scratch, xRAX+sib_reg, (sib>>6)); - ADD(ret, xRAX+sib_reg2, scratch); - } + ADDSL(ret, xRAX+sib_reg2, xRAX+sib_reg, sib>>6); } else { ADD(ret, xRAX+sib_reg2, xRAX+sib_reg); } @@ -151,14 +137,7 @@ uintptr_t geted(dynarec_rv64_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, if((nextop&7)==4) { if (sib_reg!=4) { if(sib>>6) { - if(rv64_zba) { - SHxADD(ret, xRAX+sib_reg, sib>>6, xRAX+sib_reg2); - } else if (rv64_xtheadba) { - TH_ADDSL(ret, xRAX+sib_reg2, xRAX+sib_reg, sib>>6); - } else { - SLLI(scratch, xRAX+sib_reg, (sib>>6)); - ADD(ret, xRAX+sib_reg2, scratch); - } + ADDSL(ret, xRAX+sib_reg2, xRAX+sib_reg, sib>>6); } else { ADD(ret, xRAX+sib_reg2, xRAX+sib_reg); } @@ -172,14 +151,7 @@ uintptr_t geted(dynarec_rv64_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, if((nextop&7)==4) { if (sib_reg!=4) { if(sib>>6) { - if(rv64_zba) { - SHxADD(scratch, xRAX+sib_reg, sib>>6, xRAX+sib_reg2); - } else if (rv64_xtheadba) { - TH_ADDSL(scratch, xRAX+sib_reg2, xRAX+sib_reg, sib>>6); - } else { - SLLI(scratch, xRAX+sib_reg, (sib>>6)); - ADD(scratch, xRAX+sib_reg2, scratch); - } + ADDSL(scratch, xRAX+sib_reg2, xRAX+sib_reg, sib>>6); } else { ADD(scratch, xRAX+sib_reg2, xRAX+sib_reg); } @@ -195,14 +167,7 @@ uintptr_t geted(dynarec_rv64_t* dyn, uintptr_t addr, int ninst, uint8_t nextop, if (sib_reg!=4) { ADD(scratch, scratch, xRAX+sib_reg2); if(sib>>6) { - if(rv64_zba) { - SHxADD(ret, xRAX+sib_reg, sib>>6, scratch); - } else if (rv64_xtheadba) { - TH_ADDSL(ret, scratch, xRAX+sib_reg, sib>>6); - } else { - SLLI(ret, xRAX+sib_reg, (sib>>6)); - ADD(ret, scratch, ret); - } + ADDSL(ret, scratch, xRAX+sib_reg, sib>>6); } else { ADD(ret, scratch, xRAX+sib_reg); } diff --git a/src/dynarec/rv64/rv64_emitter.h b/src/dynarec/rv64/rv64_emitter.h index 6457ad59..2719a900 100644 --- a/src/dynarec/rv64/rv64_emitter.h +++ b/src/dynarec/rv64/rv64_emitter.h @@ -310,6 +310,16 @@ f28–31 ft8–11 FP temporaries Caller // rd = rs1 + imm12 #define ADDIz(rd, rs1, imm12) EMIT(I_type((imm12)&0b111111111111, rs1, 0b000, rd, rex.is32bits?0b0011011:0b0010011)) +// rd = rs1 + (rs2 << imm2), rs2 might be used as scratch. +#define ADDSL(rd, rs1, rs2, imm2) if (rv64_zba) { \ + SHxADD(rd, rs2, imm2, rs1); \ + } else if (rv64_xtheadba) { \ + TH_ADDSL(rd, rs1, rs2, imm2); \ + } else { \ + SLLI(rs2, rs2, imm2); \ + ADD(rd, rs1, rs2); \ + } \ + #define SEXT_W(rd, rs1) ADDIW(rd, rs1, 0) // rd = rs1<<rs2 |