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| author | ptitSeb <sebastien.chev@gmail.com> | 2021-04-01 16:01:53 +0200 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2021-04-01 16:01:53 +0200 |
| commit | 883463f2d5ba364b930b03a43a24da390e984c66 (patch) | |
| tree | d5f8d7174ac7eb62cdb3518698cf1036862e319a /src | |
| parent | 9abfdb3431f36c83dd57aee9ba13d4ae0a84eeca (diff) | |
| download | box64-883463f2d5ba364b930b03a43a24da390e984c66.tar.gz box64-883463f2d5ba364b930b03a43a24da390e984c66.zip | |
[DYNAREC] Fixed F3 0F 70 opcode
Diffstat (limited to 'src')
| -rwxr-xr-x | src/dynarec/dynarec_arm64_f30f.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/dynarec/dynarec_arm64_f30f.c b/src/dynarec/dynarec_arm64_f30f.c index 82dd4964..76042b33 100755 --- a/src/dynarec/dynarec_arm64_f30f.c +++ b/src/dynarec/dynarec_arm64_f30f.c @@ -264,8 +264,8 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n // only high part need to be suffled. VTBL only handle 8bits value, so the 16bits suffles need to be changed in 8bits u64 = 0; for (int i=0; i<4; ++i) { - u64 |= ((uint64_t)((u8>>(i*2))&3)*2+0)<<(i*16+0); - u64 |= ((uint64_t)((u8>>(i*2))&3)*2+1)<<(i*16+8); + u64 |= ((uint64_t)((u8>>(i*2))&3)*2+8)<<(i*16+0); + u64 |= ((uint64_t)((u8>>(i*2))&3)*2+9)<<(i*16+8); } MOV64x(x2, u64); d0 = fpu_get_scratch(dyn); |