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| author | ptitSeb <sebastien.chev@gmail.com> | 2024-10-22 14:43:34 +0200 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2024-10-22 14:43:34 +0200 |
| commit | 8efd1e3ae0c98940b9c134a1c1de401e1f74ec3b (patch) | |
| tree | faa823dd48bbca584c3d9e1cd897a80a0a9175f0 /src | |
| parent | e7adc6b7f9ae7c6115c9d4b184dd2856ec699737 (diff) | |
| download | box64-8efd1e3ae0c98940b9c134a1c1de401e1f74ec3b.tar.gz box64-8efd1e3ae0c98940b9c134a1c1de401e1f74ec3b.zip | |
[ARM64_DYNAREC] Added AVX.F3.0F 53 opcode
Diffstat (limited to 'src')
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_avx_f3_0f.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_avx_f3_0f.c b/src/dynarec/arm64/dynarec_arm64_avx_f3_0f.c index 08a04825..d4e0400e 100644 --- a/src/dynarec/arm64/dynarec_arm64_avx_f3_0f.c +++ b/src/dynarec/arm64/dynarec_arm64_avx_f3_0f.c @@ -215,6 +215,21 @@ uintptr_t dynarec64_AVX_F3_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, VMOVeS(v0, 0, d0, 0); YMM0(gd); break; + case 0x53: + INST_NAME("VRCPSS Gx, Vx, Ex"); + nextop = F8; + GETGX(v0, 1); + GETVX(v2, 0); + GETEXSS(v1, 0, 0); + d0 = fpu_get_scratch(dyn, ninst); + FMOVS_8(d0, 0b01110000); //1.0f + FDIVS(d0, d0, v1); + if(v0!=v2) { + VMOVQ(v0, v2); + } + VMOVeS(v0, 0, d0, 0); + YMM0(gd); + break; case 0x58: INST_NAME("VADDSS Gx, Vx, Ex"); |