diff options
| author | ptitSeb <sebastien.chev@gmail.com> | 2021-06-18 12:09:05 +0200 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2021-06-18 12:09:05 +0200 |
| commit | 8f6f880b6a5375c9e54c8a5cd54d61f0d169c211 (patch) | |
| tree | 09c4699ac78148b427f03a596ae8f32f87ceb153 /src | |
| parent | 3dcef655c37cc2e9656cb79007ab4f6ad6da5b67 (diff) | |
| download | box64-8f6f880b6a5375c9e54c8a5cd54d61f0d169c211.tar.gz box64-8f6f880b6a5375c9e54c8a5cd54d61f0d169c211.zip | |
[DYNAREC] Small optim on shl/shr 16bits, and marked all opcode that need optimization in dynarec dumps
Diffstat (limited to 'src')
| -rwxr-xr-x | src/dynarec/arm64_emitter.h | 9 | ||||
| -rwxr-xr-x | src/dynarec/dynarec_arm64_00.c | 16 | ||||
| -rwxr-xr-x | src/dynarec/dynarec_arm64_0f.c | 3 | ||||
| -rwxr-xr-x | src/dynarec/dynarec_arm64_66.c | 20 | ||||
| -rwxr-xr-x | src/dynarec/dynarec_arm64_660f.c | 2 | ||||
| -rw-r--r-- | src/dynarec/dynarec_arm64_d9.c | 16 | ||||
| -rw-r--r-- | src/dynarec/dynarec_arm64_dd.c | 3 |
7 files changed, 67 insertions, 2 deletions
diff --git a/src/dynarec/arm64_emitter.h b/src/dynarec/arm64_emitter.h index 3114d214..d2e7e3fa 100755 --- a/src/dynarec/arm64_emitter.h +++ b/src/dynarec/arm64_emitter.h @@ -434,12 +434,15 @@ #define ORRx_REG_LSL(Rd, Rn, Rm, lsl) EMIT(LOGIC_REG_gen(1, 0b01, 0b00, 0, Rm, lsl, Rn, Rd)) #define ORRw_REG_LSL(Rd, Rn, Rm, lsl) EMIT(LOGIC_REG_gen(0, 0b01, 0b00, 0, Rm, lsl, Rn, Rd)) #define ORRxw_REG_LSL(Rd, Rn, Rm, lsl) EMIT(LOGIC_REG_gen(rex.w, 0b01, 0b00, 0, Rm, lsl, Rn, Rd)) +#define ORRx_REG_LSR(Rd, Rn, Rm, lsr) EMIT(LOGIC_REG_gen(1, 0b01, 0b01, 0, Rm, lsr, Rn, Rd)) +#define ORRw_REG_LSR(Rd, Rn, Rm, lsr) EMIT(LOGIC_REG_gen(0, 0b01, 0b01, 0, Rm, lsr, Rn, Rd)) #define ORRxw_REG_LSR(Rd, Rn, Rm, lsr) EMIT(LOGIC_REG_gen(rex.w, 0b01, 0b01, 0, Rm, lsr, Rn, Rd)) #define ORRxw_REG(Rd, Rn, Rm) EMIT(LOGIC_REG_gen(rex.w, 0b01, 0b00, 0, Rm, 0, Rn, Rd)) #define ORRw_REG(Rd, Rn, Rm) EMIT(LOGIC_REG_gen(0, 0b01, 0b00, 0, Rm, 0, Rn, Rd)) #define ORNx_REG(Rd, Rn, Rm) EMIT(LOGIC_REG_gen(1, 0b01, 0b00, 1, Rm, 0, Rn, Rd)) #define ORNw_REG(Rd, Rn, Rm) EMIT(LOGIC_REG_gen(0, 0b01, 0b00, 1, Rm, 0, Rn, Rd)) #define ORNxw_REG(Rd, Rn, Rm) EMIT(LOGIC_REG_gen(rex.w, 0b01, 0b00, 1, Rm, 0, Rn, Rd)) +#define ORNx_REG_LSL(Rd, Rn, Rm, lsl) EMIT(LOGIC_REG_gen(1, 0b01, 0b00, 1, Rm, lsl, Rn, Rd)) #define EORx_REG(Rd, Rn, Rm) EMIT(LOGIC_REG_gen(1, 0b10, 0b00, 0, Rm, 0, Rn, Rd)) #define EORw_REG(Rd, Rn, Rm) EMIT(LOGIC_REG_gen(0, 0b10, 0b00, 0, Rm, 0, Rn, Rd)) #define EORxw_REG(Rd, Rn, Rm) EMIT(LOGIC_REG_gen(rex.w, 0b10, 0b00, 0, Rm, 0, Rn, Rd)) @@ -452,6 +455,12 @@ #define MOVx_REG(Rd, Rm) ORRx_REG(Rd, xZR, Rm) #define MOVw_REG(Rd, Rm) ORRw_REG(Rd, xZR, Rm) #define MOVxw_REG(Rd, Rm) ORRxw_REG(Rd, xZR, Rm) +#define LSLw_IMM(Rd, Rm, lsl) ORRw_REG_LSL(Rd, xZR, Rm, lsl) +#define LSLx_IMM(Rd, Rm, lsl) ORRx_REG_LSL(Rd, xZR, Rm, lsl) +#define LSLxw_IMM(Rd, Rm, lsl) ORRxw_REG_LSL(Rd, xZR, Rm, lsl) +#define LSRw_IMM(Rd, Rm, lsr) ORRw_REG_LSR(Rd, xZR, Rm, lsr) +#define LSRx_IMM(Rd, Rm, lsr) ORRx_REG_LSR(Rd, xZR, Rm, lsr) +#define LSRxw_IMM(Rd, Rm, lsr) ORRxw_REG_LSR(Rd, xZR, Rm, lsr) #define MVNx_REG(Rd, Rm) ORNx_REG(Rd, xZR, Rm) #define MVNx_REG_LSL(Rd, Rm, lsl) ORNx_REG_LSL(Rd, xZR, Rm, lsl) #define MVNw_REG(Rd, Rm) ORNw_REG(Rd, xZR, Rm) diff --git a/src/dynarec/dynarec_arm64_00.c b/src/dynarec/dynarec_arm64_00.c index 3a136b12..df621729 100755 --- a/src/dynarec/dynarec_arm64_00.c +++ b/src/dynarec/dynarec_arm64_00.c @@ -1312,6 +1312,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin switch((nextop>>3)&7) { case 0: INST_NAME("ROL Eb, Ib"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); SETFLAGS(X_OF|X_CF, SF_SET); GETEB(x1, 1); u8 = F8; @@ -1321,6 +1322,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 1: INST_NAME("ROR Eb, Ib"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); SETFLAGS(X_OF|X_CF, SF_SET); GETEB(x1, 1); u8 = F8; @@ -1330,6 +1332,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 2: INST_NAME("RCL Eb, Ib"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); READFLAGS(X_CF); SETFLAGS(X_OF|X_CF, SF_SET); GETEB(x1, 1); @@ -1340,6 +1343,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 3: INST_NAME("RCR Eb, Ib"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); READFLAGS(X_CF); SETFLAGS(X_OF|X_CF, SF_SET); GETEB(x1, 1); @@ -1418,6 +1422,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 2: INST_NAME("RCL Ed, Ib"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); READFLAGS(X_CF); SETFLAGS(X_OF|X_CF, SF_SET); GETEDW(x4, x1, 1); @@ -1428,6 +1433,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 3: INST_NAME("RCR Ed, Ib"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); READFLAGS(X_CF); SETFLAGS(X_OF|X_CF, SF_SET); GETEDW(x4, x1, 1); @@ -1593,6 +1599,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin INST_NAME("ROL Eb, CL"); ANDSw_mask(x2, xRCX, 0, 0b00100); } + MESSAGE(LOG_DUMP, "Need Optimization\n"); SETFLAGS(X_OF|X_CF, SF_SET); GETEB(x1, 0); CALL_(rol8, x1, x3); @@ -1606,6 +1613,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin INST_NAME("ROR Eb, CL"); ANDSw_mask(x2, xRCX, 0, 0b00100); } + MESSAGE(LOG_DUMP, "Need Optimization\n"); SETFLAGS(X_OF|X_CF, SF_SET); GETEB(x1, 0); CALL_(ror8, x1, x3); @@ -1613,6 +1621,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 2: if(opcode==0xD0) {INST_NAME("RCL Eb, 1");} else {INST_NAME("RCL Eb, CL");} + MESSAGE(LOG_DUMP, "Need Optimization\n"); READFLAGS(X_CF); SETFLAGS(X_OF|X_CF, SF_SET); if(opcode==0xD0) {MOV32w(x2, 1);} else {ANDSw_mask(x2, xRCX, 0, 0b00100);} @@ -1622,6 +1631,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 3: if(opcode==0xD0) {INST_NAME("RCR Eb, 1");} else {INST_NAME("RCR Eb, CL");} + MESSAGE(LOG_DUMP, "Need Optimization\n"); READFLAGS(X_CF); SETFLAGS(X_OF|X_CF, SF_SET); if(opcode==0xD0) {MOV32w(x2, 1);} else {ANDSw_mask(x2, xRCX, 0, 0b00100);} @@ -1699,6 +1709,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 2: INST_NAME("RCL Ed, 1"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); READFLAGS(X_CF); SETFLAGS(X_OF|X_CF, SF_SET); MOV32w(x2, 1); @@ -1708,6 +1719,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 3: INST_NAME("RCR Ed, 1"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); READFLAGS(X_CF); SETFLAGS(X_OF|X_CF, SF_SET); MOV32w(x2, 1); @@ -1795,6 +1807,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 2: INST_NAME("RCL Ed, CL"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); READFLAGS(X_CF); SETFLAGS(X_OF|X_CF, SF_SET); if(rex.w) { @@ -1810,6 +1823,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 3: INST_NAME("RCR Ed, CL"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); READFLAGS(X_CF); SETFLAGS(X_OF|X_CF, SF_SET); if(rex.w) { @@ -2096,12 +2110,14 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 6: INST_NAME("DIV Eb"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); SETFLAGS(X_ALL, SF_SET); GETEB(x1, 0); CALL(div8, -1); break; case 7: INST_NAME("IDIV Eb"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); SETFLAGS(X_ALL, SF_SET); GETEB(x1, 0); CALL(idiv8, -1); diff --git a/src/dynarec/dynarec_arm64_0f.c b/src/dynarec/dynarec_arm64_0f.c index 26ac8b62..8c648d6e 100755 --- a/src/dynarec/dynarec_arm64_0f.c +++ b/src/dynarec/dynarec_arm64_0f.c @@ -313,6 +313,7 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin case 0x31: INST_NAME("RDTSC"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); CALL(ReadTSC, xRAX); // will return the u64 in xEAX LSRx(xRDX, xRAX, 32); MOVw_REG(xRAX, xRAX); // wipe upper part @@ -1125,6 +1126,7 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin switch((nextop>>3)&7) { case 0: INST_NAME("FXSAVE Ed"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); fpu_purgecache(dyn, ninst, x1, x2, x3); if(MODREG) { DEFAULT; @@ -1136,6 +1138,7 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 1: INST_NAME("FXRSTOR Ed"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); fpu_purgecache(dyn, ninst, x1, x2, x3); if(MODREG) { DEFAULT; diff --git a/src/dynarec/dynarec_arm64_66.c b/src/dynarec/dynarec_arm64_66.c index e5429363..a8debcb8 100755 --- a/src/dynarec/dynarec_arm64_66.c +++ b/src/dynarec/dynarec_arm64_66.c @@ -552,6 +552,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin switch((nextop>>3)&7) { case 0: INST_NAME("ROL Ew, Ib"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); SETFLAGS(X_OF|X_CF, SF_SET); GETEW(x1, 1); u8 = F8; @@ -561,6 +562,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 1: INST_NAME("ROR Ew, Ib"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); SETFLAGS(X_OF|X_CF, SF_SET); GETEW(x1, 1); u8 = F8; @@ -570,6 +572,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 2: INST_NAME("RCL Ew, Ib"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); READFLAGS(X_CF); SETFLAGS(X_OF|X_CF, SF_SET); GETEW(x1, 1); @@ -580,6 +583,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 3: INST_NAME("RCR Ew, Ib"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); READFLAGS(X_CF); SETFLAGS(X_OF|X_CF, SF_SET); GETEW(x1, 1); @@ -591,24 +595,26 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin case 4: case 6: INST_NAME("SHL Ew, Ib"); + UFLAG_IF {MESSAGE(LOG_DUMP, "Need Optimization for flags\n");} SETFLAGS(X_ALL, SF_PENDING); GETEW(x1, 1); u8 = F8; MOV32w(x2, (u8&0x1f)); UFLAG_OP12(ed, x2) - LSLw_REG(ed, ed, x2); + LSLw_IMM(ed, ed, u8&0x1f); EWBACK; UFLAG_RES(ed); UFLAG_DF(x3, d_shl16); break; case 5: INST_NAME("SHR Ed, Ib"); + UFLAG_IF {MESSAGE(LOG_DUMP, "Need Optimization for flags\n");} SETFLAGS(X_ALL, SF_PENDING); GETEW(x1, 1); u8 = F8; MOV32w(x2, (u8&0x1f)); UFLAG_OP12(ed, x2) - LSRw_REG(ed, ed, x2); + LSRw_IMM(ed, ed, u8&0x1f); EWBACK; UFLAG_RES(ed); UFLAG_DF(x3, d_shr16); @@ -616,6 +622,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin case 7: INST_NAME("SAR Ed, Ib"); SETFLAGS(X_ALL, SF_PENDING); + UFLAG_IF {MESSAGE(LOG_DUMP, "Need Optimization for flags\n");} GETSEW(x1, 0); u8 = F8; MOV32w(x2, (u8&0x1f)); @@ -656,6 +663,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin INST_NAME("ROL Ew, CL"); ANDSw_mask(x2, xRCX, 0, 0b00100); } + MESSAGE(LOG_DUMP, "Need Optimization\n"); SETFLAGS(X_OF|X_CF, SF_SET); GETEW(x1, 0); CALL_(rol16, x1, x3); @@ -669,6 +677,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin INST_NAME("ROR Ew, CL"); ANDSw_mask(x2, xRCX, 0, 0b00100); } + MESSAGE(LOG_DUMP, "Need Optimization\n"); SETFLAGS(X_OF|X_CF, SF_SET); GETEW(x1, 0); CALL_(ror16, x1, x3); @@ -676,6 +685,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 2: if(opcode==0xD1) {INST_NAME("RCL Ew, 1"); } else { INST_NAME("RCL Ew, CL");} + MESSAGE(LOG_DUMP, "Need Optimization\n"); READFLAGS(X_CF); SETFLAGS(X_OF|X_CF, SF_SET); if(opcode==0xD1) {MOV32w(x2, 1);} else {ANDSw_mask(x2, xRCX, 0, 0b00100);} @@ -685,6 +695,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 3: if(opcode==0xD1) {INST_NAME("RCR Ew, 1");} else {INST_NAME("RCR Ew, CL");} + MESSAGE(LOG_DUMP, "Need Optimization\n"); READFLAGS(X_CF); SETFLAGS(X_OF|X_CF, SF_SET); if(opcode==0xD1) {MOV32w(x2, 1);} else {ANDSw_mask(x2, xRCX, 0, 0b00100);} @@ -701,6 +712,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin INST_NAME("SHL Ew, CL"); ANDSw_mask(x4, xRCX, 0, 0b00100); } + UFLAG_IF {MESSAGE(LOG_DUMP, "Need Optimization for flags\n");} SETFLAGS(X_ALL, SF_PENDING); GETEW(x1, 0); UFLAG_OP12(ed, x4) @@ -717,6 +729,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin INST_NAME("SHR Ew, CL"); ANDSw_mask(x4, xRCX, 0, 0b00100); } + UFLAG_IF {MESSAGE(LOG_DUMP, "Need Optimization for flags\n");} SETFLAGS(X_ALL, SF_PENDING); GETEW(x1, 0); UFLAG_OP12(ed, x4) @@ -733,6 +746,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin INST_NAME("SAR Ew, CL"); ANDSw_mask(x4, xRCX, 0, 0b00100); } + UFLAG_IF {MESSAGE(LOG_DUMP, "Need Optimization for flags\n");} SETFLAGS(X_ALL, SF_PENDING); GETSEW(x1, 0); UFLAG_OP12(ed, x4) @@ -793,12 +807,14 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 6: INST_NAME("DIV Ew"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); SETFLAGS(X_ALL, SF_SET); GETEW(x1, 0); CALL(div16, -1); break; case 7: INST_NAME("IDIV Ew"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); SETFLAGS(X_ALL, SF_SET); GETEW(x1, 0); CALL(idiv16, -1); diff --git a/src/dynarec/dynarec_arm64_660f.c b/src/dynarec/dynarec_arm64_660f.c index 39bf8229..577c3d2f 100755 --- a/src/dynarec/dynarec_arm64_660f.c +++ b/src/dynarec/dynarec_arm64_660f.c @@ -967,6 +967,7 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n INST_NAME("SHLD Ew, Gw, CL"); UXTBw(x3, xRCX); } + MESSAGE(LOG_DUMP, "Need Optimization\n"); SETFLAGS(X_ALL, SF_SET); GETEWW(x4, x1, (opcode==0xA4)?1:0); GETGW(x2); @@ -1015,6 +1016,7 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n INST_NAME("SHRD Ew, Gw, CL"); UXTBw(x3, xRCX); } + MESSAGE(LOG_DUMP, "Need Optimization\n"); SETFLAGS(X_ALL, SF_SET); GETEWW(x4, x1, (opcode==0xAC)?1:0); GETGW(x2); diff --git a/src/dynarec/dynarec_arm64_d9.c b/src/dynarec/dynarec_arm64_d9.c index f152860a..8089b68d 100644 --- a/src/dynarec/dynarec_arm64_d9.c +++ b/src/dynarec/dynarec_arm64_d9.c @@ -95,6 +95,7 @@ uintptr_t dynarec64_D9(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 0xE5: INST_NAME("FXAM"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); x87_refresh(dyn, ninst, x1, x2, 0); CALL(fpu_fxam, -1); // should be possible inline, but is it worth it? break; @@ -143,6 +144,7 @@ uintptr_t dynarec64_D9(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin case 0xFC: INST_NAME("FRNDINT"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); // use C helper for now, nothing staightforward is available x87_forget(dyn, ninst, x1, x2, 0); CALL(arm_frndint, -1); @@ -160,11 +162,13 @@ uintptr_t dynarec64_D9(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 0xF0: INST_NAME("F2XM1"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); x87_forget(dyn, ninst, x1, x2, 0); CALL(arm_f2xm1, -1); break; case 0xF1: INST_NAME("FYL2X"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); x87_forget(dyn, ninst, x1, x2, 0); x87_forget(dyn, ninst, x1, x2, 1); CALL(arm_fyl2x, -1); @@ -172,6 +176,7 @@ uintptr_t dynarec64_D9(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 0xF2: INST_NAME("FTAN"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); x87_forget(dyn, ninst, x1, x2, 0); CALL(arm_ftan, -1); v1 = x87_do_push(dyn, ninst); @@ -179,6 +184,7 @@ uintptr_t dynarec64_D9(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 0xF3: INST_NAME("FPATAN"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); x87_forget(dyn, ninst, x1, x2, 0); x87_forget(dyn, ninst, x1, x2, 1); CALL(arm_fpatan, -1); @@ -186,12 +192,14 @@ uintptr_t dynarec64_D9(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 0xF4: INST_NAME("FXTRACT"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); x87_do_push_empty(dyn, ninst, 0); x87_forget(dyn, ninst, x1, x2, 1); CALL(arm_fxtract, -1); break; case 0xF5: INST_NAME("FPREM1"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); x87_forget(dyn, ninst, x1, x2, 0); x87_forget(dyn, ninst, x1, x2, 1); CALL(arm_fprem1, -1); @@ -214,12 +222,14 @@ uintptr_t dynarec64_D9(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 0xF8: INST_NAME("FPREM"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); x87_forget(dyn, ninst, x1, x2, 0); x87_forget(dyn, ninst, x1, x2, 1); CALL(arm_fprem, -1); break; case 0xF9: INST_NAME("FYL2XP1"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); x87_forget(dyn, ninst, x1, x2, 0); x87_forget(dyn, ninst, x1, x2, 1); CALL(arm_fyl2xp1, -1); @@ -227,23 +237,27 @@ uintptr_t dynarec64_D9(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 0xFB: INST_NAME("FSINCOS"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); x87_do_push_empty(dyn, ninst, 0); x87_forget(dyn, ninst, x1, x2, 1); CALL(arm_fsincos, -1); break; case 0xFD: INST_NAME("FSCALE"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); x87_forget(dyn, ninst, x1, x2, 0); x87_forget(dyn, ninst, x1, x2, 1); CALL(arm_fscale, -1); break; case 0xFE: INST_NAME("FSIN"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); x87_forget(dyn, ninst, x1, x2, 0); CALL(arm_fsin, -1); break; case 0xFF: INST_NAME("FCOS"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); x87_forget(dyn, ninst, x1, x2, 0); CALL(arm_fcos, -1); break; @@ -299,6 +313,7 @@ uintptr_t dynarec64_D9(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 4: INST_NAME("FLDENV Ed"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); fpu_purgecache(dyn, ninst, x1, x2, x3); // maybe only x87, not SSE? addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0, 0, rex, 0, 0); if(ed!=x1) { @@ -316,6 +331,7 @@ uintptr_t dynarec64_D9(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 6: INST_NAME("FNSTENV Ed"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); fpu_purgecache(dyn, ninst, x1, x2, x3); // maybe only x87, not SSE? addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0, 0, rex, 0, 0); if(ed!=x1) { diff --git a/src/dynarec/dynarec_arm64_dd.c b/src/dynarec/dynarec_arm64_dd.c index 887cd3fc..4068af44 100644 --- a/src/dynarec/dynarec_arm64_dd.c +++ b/src/dynarec/dynarec_arm64_dd.c @@ -48,6 +48,7 @@ uintptr_t dynarec64_DD(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin case 0xC6: case 0xC7: INST_NAME("FFREE STx"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); x87_purgecache(dyn, ninst, x1, x2, x3); MOV32w(x1, nextop-0xC0); CALL(fpu_do_free, -1); @@ -173,6 +174,7 @@ uintptr_t dynarec64_DD(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 4: INST_NAME("FRSTOR m108byte"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); fpu_purgecache(dyn, ninst, x1, x2, x3); addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0, 0, rex, 0, 0); if(ed!=x1) {MOVx_REG(x1, ed);} @@ -180,6 +182,7 @@ uintptr_t dynarec64_DD(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 6: INST_NAME("FSAVE m108byte"); + MESSAGE(LOG_DUMP, "Need Optimization\n"); fpu_purgecache(dyn, ninst, x1, x2, x3); addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0, 0, rex, 0, 0); if(ed!=x1) {MOVx_REG(x1, ed);} |