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| author | Yang Liu <liuyang22@iscas.ac.cn> | 2024-11-02 01:07:18 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-11-01 18:07:18 +0100 |
| commit | 9e43737e1823ee49649307c799df98a910ae236e (patch) | |
| tree | c11d9e914d371090b79f6bb9fd3d6ad35ed1fa4f /src | |
| parent | 5d03ad24c38dbd451cf9341edc41fe6bd5cab4e2 (diff) | |
| download | box64-9e43737e1823ee49649307c799df98a910ae236e.tar.gz box64-9e43737e1823ee49649307c799df98a910ae236e.zip | |
[RV64_DYNAREC] Added more opcodes for vector (#1991)
Diffstat (limited to 'src')
| -rw-r--r-- | src/dynarec/rv64/dynarec_rv64_0f_vector.c | 2 | ||||
| -rw-r--r-- | src/dynarec/rv64/dynarec_rv64_660f_vector.c | 45 | ||||
| -rw-r--r-- | src/dynarec/rv64/dynarec_rv64_f20f_vector.c | 21 |
3 files changed, 67 insertions, 1 deletions
diff --git a/src/dynarec/rv64/dynarec_rv64_0f_vector.c b/src/dynarec/rv64/dynarec_rv64_0f_vector.c index 7fd1ccb3..5e54bbdc 100644 --- a/src/dynarec/rv64/dynarec_rv64_0f_vector.c +++ b/src/dynarec/rv64/dynarec_rv64_0f_vector.c @@ -573,7 +573,7 @@ uintptr_t dynarec64_0F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, case 0x60 ... 0x7F: case 0x80 ... 0xBF: case 0xC3 ... 0xC5: - case 0xC8 ... 0xCF: + case 0xC7 ... 0xCF: return 0; default: DEFAULT_VECTOR; diff --git a/src/dynarec/rv64/dynarec_rv64_660f_vector.c b/src/dynarec/rv64/dynarec_rv64_660f_vector.c index ab5053c3..b916bc39 100644 --- a/src/dynarec/rv64/dynarec_rv64_660f_vector.c +++ b/src/dynarec/rv64/dynarec_rv64_660f_vector.c @@ -766,6 +766,51 @@ uintptr_t dynarec64_660F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t i if (q0 != q1) VMV_V_V(q0, q1); } break; + case 0x16: + nextop = F8; + if (rex.w) { + INST_NAME("PEXTRQ Ed, Gx, Ib"); + } else { + INST_NAME("PEXTRD Ed, Gx, Ib"); + } + SET_ELEMENT_WIDTH(x1, (rex.w ? VECTOR_SEW64 : VECTOR_SEW32), 1); + GETGX_vector(q0, 1, dyn->vector_eew); + if (MODREG) { + ed = xRAX + (nextop & 7) + (rex.b << 3); + u8 = F8; + if (u8 & (rex.w ? 1 : 3)) { + if (rv64_xtheadvector) { + ADDI(x4, xZR, (u8 & (rex.w ? 1 : 3))); + VEXT_X_V(ed, q0, x4); + } else { + d0 = fpu_get_scratch(dyn); + VSLIDEDOWN_VI(d0, q0, (u8 & (rex.w ? 1 : 3)), VECTOR_UNMASKED); + VMV_X_S(ed, d0); + if (!rex.w) ZEROUP(ed); + } + } else { + VMV_X_S(ed, q0); + if (!rv64_xtheadvector && !rex.w) ZEROUP(ed); + } + } else { + addr = geted(dyn, addr, ninst, nextop, &ed, x2, x3, &fixedaddress, rex, NULL, 0, 1); + u8 = F8; + if (u8 & (rex.w ? 1 : 3)) { + if (rv64_xtheadvector) { + ADDI(x4, xZR, (u8 & (rex.w ? 1 : 3))); + VEXT_X_V(x5, q0, x4); + } else { + d0 = fpu_get_scratch(dyn); + VSLIDEDOWN_VI(d0, q0, (u8 & (rex.w ? 1 : 3)), VECTOR_UNMASKED); + VMV_X_S(x5, d0); + } + } else { + VMV_X_S(x5, q0); + } + SDxw(x5, ed, fixedaddress); + SMWRITE2(); + } + break; case 0x22: INST_NAME("PINSRD Gx, Ed, Ib"); nextop = F8; diff --git a/src/dynarec/rv64/dynarec_rv64_f20f_vector.c b/src/dynarec/rv64/dynarec_rv64_f20f_vector.c index 52247de8..78c224e7 100644 --- a/src/dynarec/rv64/dynarec_rv64_f20f_vector.c +++ b/src/dynarec/rv64/dynarec_rv64_f20f_vector.c @@ -631,6 +631,27 @@ uintptr_t dynarec64_F20F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t i VMV_S_X(d0, x2); } break; + case 0xE6: + if (!box64_dynarec_fastround) return 0; + INST_NAME("CVTPD2DQ Gx, Ex"); + nextop = F8; + SET_ELEMENT_WIDTH(x1, VECTOR_SEW64, 1); + GETEX_vector(v1, 0, 0, VECTOR_SEW64); + GETGX_empty_vector(v0); + if (v1 & 1) { + d1 = fpu_get_scratch_lmul(dyn, VECTOR_LMUL2); + VMV_V_V(d1, v1); + } else { + d1 = v1; + } + vector_vsetvli(dyn, ninst, x1, VECTOR_SEW32, VECTOR_LMUL1, 0.5); + d0 = fpu_get_scratch_lmul(dyn, VECTOR_LMUL2); + VFNCVT_X_F_W(d0, d1, VECTOR_UNMASKED); + vector_vsetvli(dyn, ninst, x1, VECTOR_SEW64, VECTOR_LMUL1, 1); + if (!rv64_xtheadvector) VXOR_VV(v0, v0, v0, VECTOR_UNMASKED); + VMV_X_S(x4, d0); + VMV_S_X(v0, x4); + break; default: DEFAULT_VECTOR; } return addr; |