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| author | Yang Liu <numbksco@gmail.com> | 2024-03-03 15:50:48 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-03-03 08:50:48 +0100 |
| commit | a159cb5efeb8fe6b848692f86977fda27aa0703b (patch) | |
| tree | e435515f6b5fe0caa30bbbfd59280a9d046eae56 /src | |
| parent | 26371bb9ddeccf5a4b7dd3920c100da9ebb0537c (diff) | |
| download | box64-a159cb5efeb8fe6b848692f86977fda27aa0703b.tar.gz box64-a159cb5efeb8fe6b848692f86977fda27aa0703b.zip | |
[LA64_DYNAREC] Enable co-simulation and fixed an important issue (#1317)
Diffstat (limited to 'src')
| -rw-r--r-- | src/dynarec/la64/dynarec_la64_private.h | 8 | ||||
| -rw-r--r-- | src/dynarec/la64/la64_emitter.h | 26 |
2 files changed, 26 insertions, 8 deletions
diff --git a/src/dynarec/la64/dynarec_la64_private.h b/src/dynarec/la64/dynarec_la64_private.h index 36127ba9..1ecb88f6 100644 --- a/src/dynarec/la64/dynarec_la64_private.h +++ b/src/dynarec/la64/dynarec_la64_private.h @@ -83,6 +83,12 @@ int Table64(dynarec_la64_t *dyn, uint64_t val, int pass); // add a value to tab void CreateJmpNext(void* addr, void* next); -#define GO_TRACE(A, B, s0) \ +#define GO_TRACE(A, B, s0) \ + GETIP(addr); \ + MV(A1, xRIP); \ + STORE_XEMU_CALL(); \ + MOV64x(A2, B); \ + CALL(A, -1); \ + LOAD_XEMU_CALL() #endif //__DYNAREC_ARM_PRIVATE_H_ diff --git a/src/dynarec/la64/la64_emitter.h b/src/dynarec/la64/la64_emitter.h index e3235633..a92fd180 100644 --- a/src/dynarec/la64/la64_emitter.h +++ b/src/dynarec/la64/la64_emitter.h @@ -95,6 +95,15 @@ f24-f31 fs0-fs7 Static registers Callee #define ra xRA // LA64 SP #define xSP 3 +// RV64 args +#define A0 4 +#define A1 5 +#define A2 6 +#define A3 7 +#define A4 8 +#define A5 9 +#define A6 10 +#define A7 11 // xZR regs #define xZR 0 #define wZR xZR @@ -575,16 +584,19 @@ f24-f31 fs0-fs7 Static registers Callee // GR[rd] = imm32 -#define MOV32w(rd, imm32) \ - if (((uint32_t)(imm32)) > 0xfffu) { \ - LU12I_W(rd, (imm32) >> 12); \ - ORI(rd, rd, imm32); \ - } else { \ - ORI(rd, xZR, imm32); \ +#define MOV32w_(rd, imm32, zeroup) \ + if (((uint32_t)(imm32)) > 0xfffu) { \ + LU12I_W(rd, (imm32) >> 12); \ + ORI(rd, rd, imm32); \ + if (zeroup && (int32_t)imm32 < 0) \ + ZEROUP(rd); \ + } else { \ + ORI(rd, xZR, imm32); \ } +#define MOV32w(rd, imm32) MOV32w_(rd, imm32, 1) // GR[rd] = imm64 #define MOV64x(rd, imm64) \ - MOV32w(rd, imm64); \ + MOV32w_(rd, imm64, 0); \ if (((uint64_t)(imm64)) > 0xffffffffu) { \ LU32I_D(rd, ((uint64_t)(imm64)) >> 32); \ LU52I_D(rd, rd, ((uint64_t)(imm64)) >> 52); \ |