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authorptitSeb <sebastien.chev@gmail.com>2022-06-11 16:42:05 +0200
committerptitSeb <sebastien.chev@gmail.com>2022-06-11 16:42:05 +0200
commita356eb7abf8bda6e885c2316f3b353cd2f6b0397 (patch)
tree5738cf304bce9420a99360c3b4e484eb93171e89 /src
parente950872ec9e4ef0f6b89aa4708e78c0f0aa6ecc5 (diff)
downloadbox64-a356eb7abf8bda6e885c2316f3b353cd2f6b0397.tar.gz
box64-a356eb7abf8bda6e885c2316f3b353cd2f6b0397.zip
Added 67 83 opcode ([DYNAREC] too) (for #323)
Diffstat (limited to 'src')
-rwxr-xr-xsrc/dynarec/arm64/dynarec_arm64_67.c78
-rw-r--r--src/emu/x64run67.c47
2 files changed, 125 insertions, 0 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_67.c b/src/dynarec/arm64/dynarec_arm64_67.c
index 0b513909..aba42529 100755
--- a/src/dynarec/arm64/dynarec_arm64_67.c
+++ b/src/dynarec/arm64/dynarec_arm64_67.c
@@ -124,6 +124,84 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             }

             break;

 

+        case 0x81:

+        case 0x83:

+            nextop = F8;

+            switch((nextop>>3)&7) {

+                case 0: //ADD

+                    if(opcode==0x81) {INST_NAME("ADD Ed, Id");} else {INST_NAME("ADD Ed, Ib");}

+                    SETFLAGS(X_ALL, SF_SET_PENDING);

+                    GETED32((opcode==0x81)?4:1);

+                    if(opcode==0x81) i64 = F32S; else i64 = F8S;

+                    emit_add32c(dyn, ninst, rex, ed, i64, x3, x4, x5);

+                    WBACK;

+                    break;

+                case 1: //OR

+                    if(opcode==0x81) {INST_NAME("OR Ed, Id");} else {INST_NAME("OR Ed, Ib");}

+                    SETFLAGS(X_ALL, SF_SET_PENDING);

+                    GETED32((opcode==0x81)?4:1);

+                    if(opcode==0x81) i64 = F32S; else i64 = F8S;

+                    emit_or32c(dyn, ninst, rex, ed, i64, x3, x4);

+                    WBACK;

+                    break;

+                case 2: //ADC

+                    if(opcode==0x81) {INST_NAME("ADC Ed, Id");} else {INST_NAME("ADC Ed, Ib");}

+                    READFLAGS(X_CF);

+                    SETFLAGS(X_ALL, SF_SET_PENDING);

+                    GETED32((opcode==0x81)?4:1);

+                    if(opcode==0x81) i64 = F32S; else i64 = F8S;

+                    MOV64xw(x5, i64);

+                    emit_adc32(dyn, ninst, rex, ed, x5, x3, x4);

+                    WBACK;

+                    break;

+                case 3: //SBB

+                    if(opcode==0x81) {INST_NAME("SBB Ed, Id");} else {INST_NAME("SBB Ed, Ib");}

+                    READFLAGS(X_CF);

+                    SETFLAGS(X_ALL, SF_SET_PENDING);

+                    GETED32((opcode==0x81)?4:1);

+                    if(opcode==0x81) i64 = F32S; else i64 = F8S;

+                    MOV64xw(x5, i64);

+                    emit_sbb32(dyn, ninst, rex, ed, x5, x3, x4);

+                    WBACK;

+                    break;

+                case 4: //AND

+                    if(opcode==0x81) {INST_NAME("AND Ed, Id");} else {INST_NAME("AND Ed, Ib");}

+                    SETFLAGS(X_ALL, SF_SET_PENDING);

+                    GETED32((opcode==0x81)?4:1);

+                    if(opcode==0x81) i64 = F32S; else i64 = F8S;

+                    emit_and32c(dyn, ninst, rex, ed, i64, x3, x4);

+                    WBACK;

+                    break;

+                case 5: //SUB

+                    if(opcode==0x81) {INST_NAME("SUB Ed, Id");} else {INST_NAME("SUB Ed, Ib");}

+                    SETFLAGS(X_ALL, SF_SET_PENDING);

+                    GETED32((opcode==0x81)?4:1);

+                    if(opcode==0x81) i64 = F32S; else i64 = F8S;

+                    emit_sub32c(dyn, ninst, rex, ed, i64, x3, x4, x5);

+                    WBACK;

+                    break;

+                case 6: //XOR

+                    if(opcode==0x81) {INST_NAME("XOR Ed, Id");} else {INST_NAME("XOR Ed, Ib");}

+                    SETFLAGS(X_ALL, SF_SET_PENDING);

+                    GETED32((opcode==0x81)?4:1);

+                    if(opcode==0x81) i64 = F32S; else i64 = F8S;

+                    emit_xor32c(dyn, ninst, rex, ed, i64, x3, x4);

+                    WBACK;

+                    break;

+                case 7: //CMP

+                    if(opcode==0x81) {INST_NAME("CMP Ed, Id");} else {INST_NAME("CMP Ed, Ib");}

+                    SETFLAGS(X_ALL, SF_SET_PENDING);

+                    GETED32((opcode==0x81)?4:1);

+                    if(opcode==0x81) i64 = F32S; else i64 = F8S;

+                    if(i64) {

+                        MOV64xw(x2, i64);

+                        emit_cmp32(dyn, ninst, rex, ed, x2, x3, x4, x5);

+                    } else

+                        emit_cmp32_0(dyn, ninst, rex, ed, x3, x4);

+                    break;

+            }

+            break;

+            

         case 0x89:

             INST_NAME("MOV Ed, Gd");

             nextop=F8;

diff --git a/src/emu/x64run67.c b/src/emu/x64run67.c
index 4dd1c5dc..f17e5e6d 100644
--- a/src/emu/x64run67.c
+++ b/src/emu/x64run67.c
@@ -124,6 +124,53 @@ int Run67(x64emu_t *emu, rex_t rex, int rep)
             case 7:               cmp8(emu, EB->byte[0], tmp8u); break;

         }

         break;

+    case 0x81:                      /* GRP Ed,Id */

+    case 0x83:                      /* GRP Ed,Ib */

+        nextop = F8;

+        GETED32((opcode==0x81)?4:1);

+        if(opcode==0x81) {

+            tmp32s = F32S;

+        } else {

+            tmp32s = F8S;

+        }

+        if(rex.w) {

+            tmp64u = (uint64_t)(int64_t)tmp32s;

+            switch((nextop>>3)&7) {

+                case 0: ED->q[0] = add64(emu, ED->q[0], tmp64u); break;

+                case 1: ED->q[0] =  or64(emu, ED->q[0], tmp64u); break;

+                case 2: ED->q[0] = adc64(emu, ED->q[0], tmp64u); break;

+                case 3: ED->q[0] = sbb64(emu, ED->q[0], tmp64u); break;

+                case 4: ED->q[0] = and64(emu, ED->q[0], tmp64u); break;

+                case 5: ED->q[0] = sub64(emu, ED->q[0], tmp64u); break;

+                case 6: ED->q[0] = xor64(emu, ED->q[0], tmp64u); break;

+                case 7:            cmp64(emu, ED->q[0], tmp64u); break;

+            }

+        } else {

+            tmp32u = (uint32_t)tmp32s;

+            if(MODREG)

+                switch((nextop>>3)&7) {

+                    case 0: ED->q[0] = add32(emu, ED->dword[0], tmp32u); break;

+                    case 1: ED->q[0] =  or32(emu, ED->dword[0], tmp32u); break;

+                    case 2: ED->q[0] = adc32(emu, ED->dword[0], tmp32u); break;

+                    case 3: ED->q[0] = sbb32(emu, ED->dword[0], tmp32u); break;

+                    case 4: ED->q[0] = and32(emu, ED->dword[0], tmp32u); break;

+                    case 5: ED->q[0] = sub32(emu, ED->dword[0], tmp32u); break;

+                    case 6: ED->q[0] = xor32(emu, ED->dword[0], tmp32u); break;

+                    case 7:            cmp32(emu, ED->dword[0], tmp32u); break;

+                }

+            else

+                switch((nextop>>3)&7) {

+                    case 0: ED->dword[0] = add32(emu, ED->dword[0], tmp32u); break;

+                    case 1: ED->dword[0] =  or32(emu, ED->dword[0], tmp32u); break;

+                    case 2: ED->dword[0] = adc32(emu, ED->dword[0], tmp32u); break;

+                    case 3: ED->dword[0] = sbb32(emu, ED->dword[0], tmp32u); break;

+                    case 4: ED->dword[0] = and32(emu, ED->dword[0], tmp32u); break;

+                    case 5: ED->dword[0] = sub32(emu, ED->dword[0], tmp32u); break;

+                    case 6: ED->dword[0] = xor32(emu, ED->dword[0], tmp32u); break;

+                    case 7:                cmp32(emu, ED->dword[0], tmp32u); break;

+                }

+        }

+        break;

 

     case 0x88:                      /* MOV Eb,Gb */

         nextop = F8;