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| author | Yang Liu <liuyang22@iscas.ac.cn> | 2023-04-25 20:09:23 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-04-25 14:09:23 +0200 |
| commit | a6a62007dc6cfeb4d475a650ddb03bdd011df62c (patch) | |
| tree | a4276649b4b472ad0dea764c565ef187bb260f57 /src | |
| parent | 549c42ac1913c06547abcc99c8ebb6dc745fe4e4 (diff) | |
| download | box64-a6a62007dc6cfeb4d475a650ddb03bdd011df62c.tar.gz box64-a6a62007dc6cfeb4d475a650ddb03bdd011df62c.zip | |
[RV64_DYNAREC] Added more opcodes (#743)
Diffstat (limited to 'src')
| -rw-r--r-- | src/dynarec/rv64/dynarec_rv64_0f.c | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/src/dynarec/rv64/dynarec_rv64_0f.c b/src/dynarec/rv64/dynarec_rv64_0f.c index 1031d6a0..a3d9efc1 100644 --- a/src/dynarec/rv64/dynarec_rv64_0f.c +++ b/src/dynarec/rv64/dynarec_rv64_0f.c @@ -455,6 +455,30 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni FSW(s1, gback, i*4); } break; + case 0x5D: + INST_NAME("MINPS Gx, Ex"); + nextop = F8; + GETGX(x1); + GETEX(x2, 0); + s0 = fpu_get_scratch(dyn); + s1 = fpu_get_scratch(dyn); + for(int i=0; i<4; ++i) { + FLW(s0, wback, fixedaddress+i*4); + FLW(s1, gback, i*4); + if(!box64_dynarec_fastnan) { + FEQS(x3, s0, s0); + FEQS(x4, s1, s1); + AND(x3, x3, x4); + BEQZ(x3, 12); + FLTS(x3, s0, s1); + BEQZ(x3, 8); + FSW(s0, gback, i*4); + } else { + FMINS(s1, s1, s0); + FSW(s1, gback, i*4); + } + } + break; case 0x5E: INST_NAME("DIVPS Gx, Ex"); nextop = F8; @@ -470,6 +494,30 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni FSW(s1, gback, i*4); } break; + case 0x5F: + INST_NAME("MAXPS Gx, Ex"); + nextop = F8; + GETGX(x1); + GETEX(x2, 0); + s0 = fpu_get_scratch(dyn); + s1 = fpu_get_scratch(dyn); + for(int i=0; i<4; ++i) { + FLW(s0, wback, fixedaddress+i*4); + FLW(s1, gback, i*4); + if(!box64_dynarec_fastnan) { + FEQS(x3, s0, s0); + FEQS(x4, s1, s1); + AND(x3, x3, x4); + BEQZ(x3, 12); + FLTS(x3, s1, s0); + BEQZ(x3, 8); + FSW(s0, gback, i*4); + } else { + FMAXS(s1, s1, s0); + FSW(s1, gback, i*4); + } + } + break; case 0x77: INST_NAME("EMMS"); // empty MMX, FPU now usable |