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| author | ptitSeb <sebastien.chev@gmail.com> | 2022-04-17 11:05:29 +0200 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2022-04-17 11:05:29 +0200 |
| commit | aa163b5010ebd10d54a0abae0439fe14a6bd722e (patch) | |
| tree | 7d8ee9f96ce3790554a5425956b07bfd01532bbd /src | |
| parent | aacc3920499736c5709fd3653dc65f0344bffb58 (diff) | |
| download | box64-aa163b5010ebd10d54a0abae0439fe14a6bd722e.tar.gz box64-aa163b5010ebd10d54a0abae0439fe14a6bd722e.zip | |
[DYNAREC] Added 66 0F 51 opcode
Diffstat (limited to 'src')
| -rwxr-xr-x | src/dynarec/arm64/dynarec_arm64_660f.c | 21 |
1 files changed, 20 insertions, 1 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_660f.c b/src/dynarec/arm64/dynarec_arm64_660f.c index 2d3d048b..bcdc677b 100755 --- a/src/dynarec/arm64/dynarec_arm64_660f.c +++ b/src/dynarec/arm64/dynarec_arm64_660f.c @@ -669,7 +669,26 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n LSRx(gd, gd, 63); BFIx(gd, x1, 1, 1); break; - + case 0x51: + INST_NAME("SQRTPD Gx, Ex"); + nextop = F8; + GETEX(q0, 0, 0); + GETGX_empty(q1); + if(!box64_dynarec_fastnan) { + v0 = fpu_get_scratch(dyn); + v1 = fpu_get_scratch(dyn); + // check if any input value was NAN + VFCMEQQD(v0, q0, q0); // 0 if NAN, 1 if not NAN + } + VFSQRTQD(q1, q0); + if(!box64_dynarec_fastnan) { + VFCMEQQD(v1, q1, q1); // 0 => out is NAN + VBICQ(v1, v0, v1); // forget it in any input was a NAN already + VSHLQ_64(v1, v1, 63); // only keep the sign bit + VORRQ(q1, q1, v1); // NAN -> -NAN + } + break; + case 0x54: INST_NAME("ANDPD Gx, Ex"); nextop = F8; |