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| author | ptitSeb <sebastien.chev@gmail.com> | 2025-03-31 11:37:44 +0200 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2025-03-31 11:37:44 +0200 |
| commit | b1ba548d62983ee23e3a3b2ea57da5d8a7ee669d (patch) | |
| tree | 68f611a4a1fedf134c69b284b247f554173b341e /src | |
| parent | da4f574bdd8448e8c09f15293f7876246435d6fa (diff) | |
| download | box64-b1ba548d62983ee23e3a3b2ea57da5d8a7ee669d.tar.gz box64-b1ba548d62983ee23e3a3b2ea57da5d8a7ee669d.zip | |
[INTERP] Added support for F2 0F A5 opcode, ignoring F2 (for #2459)
Diffstat (limited to 'src')
| -rw-r--r-- | src/emu/x64runf20f.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/emu/x64runf20f.c b/src/emu/x64runf20f.c index 5a3e0129..32c2b050 100644 --- a/src/emu/x64runf20f.c +++ b/src/emu/x64runf20f.c @@ -412,6 +412,14 @@ uintptr_t RunF20F(x64emu_t *emu, rex_t rex, uintptr_t addr, int *step) , addr += tmp32s; ,,STEP3 ) /* 0x80 -> 0x8F Jxx */ + + case 0xA5: // ignore F2 prefix + #ifdef TEST_INTERPRETER + return Test0F(test, rex, addr-1, step); + #else + return Run0F(emu, rex, addr-1, step); + #endif + case 0xC2: /* CMPSD Gx, Ex, Ib */ nextop = F8; |