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authorptitSeb <sebastien.chev@gmail.com>2021-03-31 21:08:22 +0200
committerptitSeb <sebastien.chev@gmail.com>2021-03-31 21:08:22 +0200
commitb689c745a00fc6e12cc21b905a56a80b073b2d0a (patch)
treef4fd6ea46dabc33d9b164a1dfaa0ab27ae0ea74a /src
parent28c2c56271c5b05ba94d93327ae7df9038557b03 (diff)
downloadbox64-b689c745a00fc6e12cc21b905a56a80b073b2d0a.tar.gz
box64-b689c745a00fc6e12cc21b905a56a80b073b2d0a.zip
[DYNAREC] Added 66 0F D5 and 0F D5 opcodes and fixed F2 0F 70 opcode
Diffstat (limited to 'src')
-rwxr-xr-xsrc/dynarec/arm64_printer.c2
-rwxr-xr-xsrc/dynarec/dynarec_arm64_0f.c8
-rwxr-xr-xsrc/dynarec/dynarec_arm64_660f.c8
-rwxr-xr-xsrc/dynarec/dynarec_arm64_f20f.c6
4 files changed, 21 insertions, 3 deletions
diff --git a/src/dynarec/arm64_printer.c b/src/dynarec/arm64_printer.c
index c47a0279..8b2e3ab0 100755
--- a/src/dynarec/arm64_printer.c
+++ b/src/dynarec/arm64_printer.c
@@ -1202,7 +1202,7 @@ const char* arm64_print(uint32_t opcode, uintptr_t addr)
                     }

                     break;

         }

-        snprintf(buff, sizeof(buff), "%s1 {V%d.%s}[%d], %s", a.L?"LD":"ST", Rd, Y[scale], idx, XtSp[Rt]);

+        snprintf(buff, sizeof(buff), "%s1 {V%d.%s}[%d], [%s]", a.L?"LD":"ST", Rt, Y[scale], idx, XtSp[Rn]);

         return buff;

     }

     // LDUR/STUR

diff --git a/src/dynarec/dynarec_arm64_0f.c b/src/dynarec/dynarec_arm64_0f.c
index f7e7d2a6..cde25a2c 100755
--- a/src/dynarec/dynarec_arm64_0f.c
+++ b/src/dynarec/dynarec_arm64_0f.c
@@ -1222,6 +1222,14 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             REVxw(gd, gd);

             break;

 

+        case 0xD5:

+            INST_NAME("PMULLW Gm, Em");

+            nextop = F8;

+            GETGM(q0);

+            GETEM(q1, 0);

+            VMUL_16(q0, q0, q1);

+            break;

+

         case 0xEB:

             INST_NAME("POR Gm, Em");

             nextop = F8;

diff --git a/src/dynarec/dynarec_arm64_660f.c b/src/dynarec/dynarec_arm64_660f.c
index 2f530316..72c81902 100755
--- a/src/dynarec/dynarec_arm64_660f.c
+++ b/src/dynarec/dynarec_arm64_660f.c
@@ -982,7 +982,13 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             GETEX(q0, 0);

             VADDQ_64(v0, v0, q0);

             break;

-

+        case 0xD5:

+            INST_NAME("PMULLW Gx,Ex");

+            nextop = F8;

+            GETGX(q0);

+            GETEX(q1, 0);

+            VMULQ_16(q0, q0, q1);

+            break;

         case 0xD6:

             INST_NAME("MOVQ Ex, Gx");

             nextop = F8;

diff --git a/src/dynarec/dynarec_arm64_f20f.c b/src/dynarec/dynarec_arm64_f20f.c
index ceb212ae..6051e319 100755
--- a/src/dynarec/dynarec_arm64_f20f.c
+++ b/src/dynarec/dynarec_arm64_f20f.c
@@ -253,9 +253,13 @@ uintptr_t dynarec64_F20F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             MOV64x(x2, u64);

             d0 = fpu_get_scratch(dyn);

             VMOVQDfrom(d0, 0, x2);

-            VTBL1_8(v0, v1, d0);

             if(v0!=v1) {

+                VTBL1_8(v0, v1, d0);

                 VMOVeD(v0, 1, v1, 1);

+            } else {

+                VTBL1_8(d0, v1, d0);

+                VMOVeD(v0, 0, d0, 0);

+

             }

             break;