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| author | ptitSeb <sebastien.chev@gmail.com> | 2024-05-27 12:48:05 +0200 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2024-05-27 12:48:05 +0200 |
| commit | bc0f31407f3417223bd5503470bd0f351f53e7a9 (patch) | |
| tree | 4a72089d6bca66a9c8a5c1a2eef17129a17c5e4f /src | |
| parent | 0d755e610b5a7cf782c261d14687146c90ae4ee3 (diff) | |
| download | box64-bc0f31407f3417223bd5503470bd0f351f53e7a9.tar.gz box64-bc0f31407f3417223bd5503470bd0f351f53e7a9.zip | |
[INTERPRETER] Added some more avx opcodes
Diffstat (limited to 'src')
| -rw-r--r-- | src/emu/x64runavx0f.c | 18 | ||||
| -rw-r--r-- | src/emu/x64runavxf20f.c | 27 | ||||
| -rw-r--r-- | src/emu/x64runavxf30f.c | 41 |
3 files changed, 86 insertions, 0 deletions
diff --git a/src/emu/x64runavx0f.c b/src/emu/x64runavx0f.c index d7313074..0a1a087a 100644 --- a/src/emu/x64runavx0f.c +++ b/src/emu/x64runavx0f.c @@ -57,6 +57,24 @@ uintptr_t RunAVX_0F(x64emu_t *emu, vex_t vex, uintptr_t addr, int *step) switch(opcode) { + case 0x57: /* XORPS Gx, Ex */ + nextop = F8; + GETEX(0); + GETGX; + GETVX; + GETGY; + for(int i=0; i<4; ++i) + GX->ud[i] = VX->ud[i] ^ EX->ud[i]; + if(vex.l) { + GETEY; + GETVY; + for(int i=0; i<4; ++i) + GY->ud[i] = VY->ud[i] ^ EY->ud[i]; + + } else + GY->q[0] = GY->q[1] = 0; + break; + case 0x77: if(!vex.l) { // VZEROUPPER if(vex.v!=0) { diff --git a/src/emu/x64runavxf20f.c b/src/emu/x64runavxf20f.c index 6048aeb9..1bb03d72 100644 --- a/src/emu/x64runavxf20f.c +++ b/src/emu/x64runavxf20f.c @@ -58,6 +58,33 @@ uintptr_t RunAVX_F20F(x64emu_t *emu, vex_t vex, uintptr_t addr, int *step) switch(opcode) { + case 0x10: /* VMOVSD Gx Ex */ + nextop = F8; + GETEX(0); + GETGX; + GX->q[0] = EX->q[0]; + if(MODREG) { + GETVX; + GX->q[1] = VX->q[1]; + } else { + GX->q[1] = 0; + } + GETGY; + GY->q[0] = GY->q[1] = 0; + break; + case 0x11: /* MOVSS Ex Gx */ + nextop = F8; + GETEX(0); + GETGX; + EX->q[0] = GX->q[0]; + if(MODREG) { + GETVX; + EX->q[1] = VX->q[1]; + GETEY; + EY->q[0] = EY->q[1] = 0; + } + break; + default: return 0; } diff --git a/src/emu/x64runavxf30f.c b/src/emu/x64runavxf30f.c index 0f4c0205..6dccb27d 100644 --- a/src/emu/x64runavxf30f.c +++ b/src/emu/x64runavxf30f.c @@ -58,6 +58,47 @@ uintptr_t RunAVX_F30F(x64emu_t *emu, vex_t vex, uintptr_t addr, int *step) switch(opcode) { + case 0x10: /* VMOVSS Gx Ex */ + nextop = F8; + GETEX(0); + GETGX; + GX->ud[0] = EX->ud[0]; + if(MODREG) { + GETVX; + GX->ud[1] = VX->ud[1]; + GX->q[1] = VX->q[1]; + } else { + // EX is not a register (reg to reg only move 31:0) + GX->ud[1] = GX->ud[2] = GX->ud[3] = 0; + } + GETGY; + GY->q[0] = GY->q[1] = 0; + break; + case 0x11: /* MOVSS Ex Gx */ + nextop = F8; + GETEX(0); + GETGX; + EX->ud[0] = GX->ud[0]; + if(MODREG) { + GETVX; + EX->ud[1] = VX->ud[1]; + EX->q[1] = VX->q[1]; + GETEY; + EY->q[0] = EY->q[1] = 0; + } + break; + + case 0x5A: /* VCVTSS2SD Gx, Vx, Ex */ + nextop = F8; + GETEX(0); + GETGX; + GETVX; + GETGY; + GX->d[0] = EX->f[0]; + GX->q[1] = VX->q[1]; + GY->q[0] = GY->q[1] = 0; + break; + case 0x6F: // VMOVDQU Gx, Ex nextop = F8; GETEX(0); |