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| author | ptitSeb <sebastien.chev@gmail.com> | 2021-03-22 14:14:31 +0100 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2021-03-22 14:14:31 +0100 |
| commit | c02946a913ad8b264f0babca15b4d040e66a01bb (patch) | |
| tree | 3eb175680b5f1e7eb664c7e0d3838ddd5235da59 /src | |
| parent | 8ec2851439b2486531c8d2b3e38b22972b1f53b6 (diff) | |
| download | box64-c02946a913ad8b264f0babca15b4d040e66a01bb.tar.gz box64-c02946a913ad8b264f0babca15b4d040e66a01bb.zip | |
[DYNAREC] Added 66 83 opcode
Diffstat (limited to 'src')
| -rwxr-xr-x | src/dynarec/dynarec_arm64_66.c | 87 |
1 files changed, 87 insertions, 0 deletions
diff --git a/src/dynarec/dynarec_arm64_66.c b/src/dynarec/dynarec_arm64_66.c index ba7a90be..0b33d2d8 100755 --- a/src/dynarec/dynarec_arm64_66.c +++ b/src/dynarec/dynarec_arm64_66.c @@ -315,6 +315,93 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin GWBACK; break; + case 0x81: + case 0x83: + nextop = F8; + switch((nextop>>3)&7) { + case 0: //ADD + if(opcode==0x81) { + INST_NAME("ADD Ew, Iw"); + } else { + INST_NAME("ADD Ew, Ib"); + } + SETFLAGS(X_ALL, SF_SET); + GETEW(x1, (opcode==81)?2:1); + if(opcode==0x81) i16 = F16S; else i16 = F8S; + MOV32w(x5, i16); + emit_add16(dyn, ninst, ed, x5, x2, x4); + EWBACK; + break; + case 1: //OR + if(opcode==0x81) {INST_NAME("OR Ew, Iw");} else {INST_NAME("OR Ew, Ib");} + SETFLAGS(X_ALL, SF_SET); + GETEW(x1, (opcode==81)?2:1); + if(opcode==0x81) i16 = F16S; else i16 = F8S; + MOV32w(x5, i16); + emit_or16(dyn, ninst, x1, x5, x2, x4); + EWBACK; + break; + case 2: //ADC + if(opcode==0x81) {INST_NAME("ADC Ew, Iw");} else {INST_NAME("ADC Ew, Ib");} + READFLAGS(X_CF); + SETFLAGS(X_ALL, SF_SET); + GETEW(x1, (opcode==81)?2:1); + if(opcode==0x81) i16 = F16S; else i16 = F8S; + MOV32w(x5, i16); + emit_adc16(dyn, ninst, x1, x5, x2, x4); + EWBACK; + break; + case 3: //SBB + if(opcode==0x81) {INST_NAME("SBB Ew, Iw");} else {INST_NAME("SBB Ew, Ib");} + READFLAGS(X_CF); + SETFLAGS(X_ALL, SF_SET); + GETEW(x1, (opcode==81)?2:1); + if(opcode==0x81) i16 = F16S; else i16 = F8S; + MOV32w(x5, i16); + emit_sbb16(dyn, ninst, x1, x5, x2, x4); + EWBACK; + break; + case 4: //AND + if(opcode==0x81) {INST_NAME("AND Ew, Iw");} else {INST_NAME("AND Ew, Ib");} + SETFLAGS(X_ALL, SF_SET); + GETEW(x1, (opcode==81)?2:1); + if(opcode==0x81) i16 = F16S; else i16 = F8S; + MOV32w(x5, i16); + emit_and16(dyn, ninst, x1, x5, x2, x4); + EWBACK; + break; + case 5: //SUB + if(opcode==0x81) {INST_NAME("SUB Ew, Iw");} else {INST_NAME("SUB Ew, Ib");} + SETFLAGS(X_ALL, SF_SET); + GETEW(x1, (opcode==81)?2:1); + if(opcode==0x81) i16 = F16S; else i16 = F8S; + MOV32w(x5, i16); + emit_sub16(dyn, ninst, x1, x5, x2, x4); + EWBACK; + break; + case 6: //XOR + if(opcode==0x81) {INST_NAME("XOR Ew, Iw");} else {INST_NAME("XOR Ew, Ib");} + SETFLAGS(X_ALL, SF_SET); + GETEW(x1, (opcode==81)?2:1); + if(opcode==0x81) i16 = F16S; else i16 = F8S; + MOV32w(x5, i16); + emit_xor16(dyn, ninst, x1, x5, x2, x4); + EWBACK; + break; + case 7: //CMP + if(opcode==0x81) {INST_NAME("CMP Ew, Iw");} else {INST_NAME("CMP Ew, Ib");} + SETFLAGS(X_ALL, SF_SET); + GETEW(x1, (opcode==81)?2:1); + if(opcode==0x81) i16 = F16S; else i16 = F8S; + if(i16) { + MOV32w(x2, i16); + emit_cmp16(dyn, ninst, x1, x2, x3, x4, x5); + } else + emit_cmp16_0(dyn, ninst, x1, x3, x4); + break; + } + break; + case 0x89: INST_NAME("MOV Ew, Gw"); nextop = F8; |