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| author | ptitSeb <sebastien.chev@gmail.com> | 2022-10-01 23:29:38 +0200 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2022-10-01 23:31:49 +0200 |
| commit | cc26096c2899500d003e45e78dea1f1d3d0e02ac (patch) | |
| tree | e31de233d56f0e0a653b9f0c0326db04277cf1ff /src | |
| parent | 1c110080a8b8ac080f6ecb9e6c029a9c790bd479 (diff) | |
| download | box64-cc26096c2899500d003e45e78dea1f1d3d0e02ac.tar.gz box64-cc26096c2899500d003e45e78dea1f1d3d0e02ac.zip | |
[DYNAREC] Fixed and optimized 0F BA opcodes
Diffstat (limited to 'src')
| -rwxr-xr-x | src/dynarec/arm64/dynarec_arm64_0f.c | 33 | ||||
| -rwxr-xr-x | src/dynarec/arm64/dynarec_arm64_helper.h | 8 |
2 files changed, 15 insertions, 26 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_0f.c b/src/dynarec/arm64/dynarec_arm64_0f.c index eb1ac7f0..a870de86 100755 --- a/src/dynarec/arm64/dynarec_arm64_0f.c +++ b/src/dynarec/arm64/dynarec_arm64_0f.c @@ -1370,11 +1370,7 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin } u8 = F8; u8&=rex.w?0x3f:0x1f; - if(u8) { - LSRxw(x1, ed, u8); - ed = x1; - } - BFIw(xFlags, ed, F_CF, 1); + BFXILxw(xFlags, ed, u8, 1); // inject 1 bit from u8 to F_CF (i.e. pos 0) break; case 5: INST_NAME("BTS Ed, Ib"); @@ -1390,13 +1386,8 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin } u8 = F8; u8&=(rex.w?0x3f:0x1f); - if(u8) { - LSRxw(x4, ed, u8); - } else { - MOVw_REG(x4, ed); - } - BFIw(xFlags, x4, F_CF, 1); - TBNZ_MARK3(x4, 0); // bit already set, jump to next instruction + BFXILxw(xFlags, ed, u8, 1); // inject 1 bit from u8 to F_CF (i.e. pos 0) + TBNZ_MARK3(xFlags, 0); // bit already set, jump to next instruction MOV32w(x4, 1); EORxw_REG_LSL(ed, ed, x4, u8); if(wback) { @@ -1418,14 +1409,9 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin } u8 = F8; u8&=(rex.w?0x3f:0x1f); - if(u8) { - LSRxw(x4, ed, u8); - } else { - MOVw_REG(x4, ed); - } - BFIw(xFlags, x4, F_CF, 1); - TBZ_MARK3(x4, 0); // bit already clear, jump to next instruction - //MOVW(x14, 1); // already 0x01 + BFXILxw(xFlags, ed, u8, 1); // inject 1 bit from u8 to F_CF (i.e. pos 0) + TBZ_MARK3(xFlags, 0); // bit already clear, jump to next instruction + MOV32w(x4, 1); EORxw_REG_LSL(ed, ed, x4, u8); if(wback) { STRxw_U12(ed, wback, fixedaddress); @@ -1446,12 +1432,7 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin } u8 = F8; u8&=(rex.w?0x3f:0x1f); - if(u8) { - LSRxw(x4, ed, u8); - } else { - MOVw_REG(x4, ed); - } - BFIw(xFlags, x4, F_CF, 1); + BFXILxw(xFlags, ed, u8, 1); // inject 1 bit from u8 to F_CF (i.e. pos 0) MOV32w(x4, 1); EORxw_REG_LSL(ed, ed, x4, u8); if(wback) { diff --git a/src/dynarec/arm64/dynarec_arm64_helper.h b/src/dynarec/arm64/dynarec_arm64_helper.h index 69f5544b..6472989a 100755 --- a/src/dynarec/arm64/dynarec_arm64_helper.h +++ b/src/dynarec/arm64/dynarec_arm64_helper.h @@ -408,10 +408,18 @@ #define CBNZx_MARK3(reg) \ j64 = GETMARK3-(dyn->native_size); \ CBNZx(reg, j64) +// Branch to MARK3 if reg is not 0 (use j64) +#define CBNZw_MARK3(reg) \ + j64 = GETMARK3-(dyn->native_size); \ + CBNZw(reg, j64) // Branch to MARK3 if reg is 0 (use j64) #define CBZx_MARK3(reg) \ j64 = GETMARK3-(dyn->native_size); \ CBZx(reg, j64) +// Branch to MARK3 if reg is 0 (use j64) +#define CBZw_MARK3(reg) \ + j64 = GETMARK3-(dyn->native_size); \ + CBZw(reg, j64) // Test bit N of A and branch to MARK3 if not set #define TBZ_MARK3(A, N) \ j64 = GETMARK3-(dyn->native_size); \ |