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| author | ptitSeb <sebastien.chev@gmail.com> | 2021-03-19 17:37:22 +0100 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2021-03-19 17:37:22 +0100 |
| commit | d8c3c38d6983c1f88e2e5992635c25eb6a54086d (patch) | |
| tree | a948a6a7841975fa5592598ddf9bd3c9c82f77b5 /src | |
| parent | 0400bea3bd4baef97db74b4b07358d603f2f5dac (diff) | |
| download | box64-d8c3c38d6983c1f88e2e5992635c25eb6a54086d.tar.gz box64-d8c3c38d6983c1f88e2e5992635c25eb6a54086d.zip | |
[DYNAREC] Added 38/3A/3C CMP opcodes, and fixed GETGB macro (still broken)
Diffstat (limited to 'src')
| -rwxr-xr-x | src/dynarec/dynarec_arm64_00.c | 30 | ||||
| -rwxr-xr-x | src/dynarec/dynarec_arm64_helper.h | 63 |
2 files changed, 66 insertions, 27 deletions
diff --git a/src/dynarec/dynarec_arm64_00.c b/src/dynarec/dynarec_arm64_00.c index 0646a630..2bf86f36 100755 --- a/src/dynarec/dynarec_arm64_00.c +++ b/src/dynarec/dynarec_arm64_00.c @@ -193,6 +193,14 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin emit_xor32c(dyn, ninst, rex, xRAX, i64, x3, x4); break; + case 0x38: + INST_NAME("CMP Eb, Gb"); + SETFLAGS(X_ALL, SF_SET); + nextop = F8; + GETEB(x1, 0); + GETGB(x2); + emit_cmp8(dyn, ninst, x1, x2, x3, x4, x5); + break; case 0x39: INST_NAME("CMP Ed, Gd"); SETFLAGS(X_ALL, SF_SET); @@ -201,7 +209,14 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin GETED(0); emit_cmp32(dyn, ninst, rex, ed, gd, x3, x4, x5); break; - + case 0x3A: + INST_NAME("CMP Gb, Eb"); + SETFLAGS(X_ALL, SF_SET); + nextop = F8; + GETEB(x2, 0); + GETGB(x1); + emit_cmp8(dyn, ninst, x1, x2, x3, x4, x5); + break; case 0x3B: INST_NAME("CMP Gd, Ed"); SETFLAGS(X_ALL, SF_SET); @@ -210,7 +225,18 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin GETED(0); emit_cmp32(dyn, ninst, rex, gd, ed, x3, x4, x5); break; - + case 0x3C: + INST_NAME("CMP AL, Ib"); + SETFLAGS(X_ALL, SF_SET); + u8 = F8; + UXTBw(x1, xRAX); + if(u8) { + MOV32w(x2, u8); + emit_cmp8(dyn, ninst, x1, x2, x3, x4, x5); + } else { + emit_cmp8_0(dyn, ninst, x1, x3, x4); + } + break; case 0x3D: INST_NAME("CMP EAX, Id"); SETFLAGS(X_ALL, SF_SET); diff --git a/src/dynarec/dynarec_arm64_helper.h b/src/dynarec/dynarec_arm64_helper.h index 9ef851d5..1c9f1878 100755 --- a/src/dynarec/dynarec_arm64_helper.h +++ b/src/dynarec/dynarec_arm64_helper.h @@ -176,37 +176,50 @@ ed = i; \ } //GETSEB sign extend EB, will use i for ed, and can use r3 for wback. -#define GETSEB(i) if((nextop&0xC0)==0xC0) { \ - wback = (nextop&7); \ - wb2 = (wback>>2); \ - wback = xEAX+(wback&3); \ - SXTB(i, wback, wb2); \ - wb1 = 0; \ - ed = i; \ - } else { \ - addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 255, 0); \ - LDRSB_IMM8(i, wback, fixedaddress);\ - wb1 = 1; \ - ed = i; \ +#define GETSEB(i) if(MODREG) { \ + if(rex.rex) { \ + wback = xRAX+(nextop&7)+(rex.b<<3); \ + wb2 = 0; \ + } else { \ + wback = (nextop&7); \ + wb2 = (wback>>2)*8; \ + wback = xRAX+(wback&3); \ + } \ + SBFXx(i, wback, wb2, 8); \ + wb1 = 0; \ + ed = i; \ + } else { \ + addr = geted(dyn, addr, ninst, nextop, &wback, x3, &fixedaddress, 0xfff, 0, rex, 0, D); \ + LDRSB_U12(i, wback, fixedaddress); \ + wb1 = 1; \ + ed = i; \ } // Write eb (ed) back to original register / memory #define EBBACK if(wb1) {STRB_U12(ed, wback, fixedaddress);} else {BFIx(wback, ed, wb2, 8);} //GETGB will use i for gd -#define GETGB(i) gd = (nextop&0x38)>>3; \ - gb2 = ((gd&4)>>2); \ - gb1 = xRAX+(gd&3); \ - gd = i; \ - nopenope! \ - UXTB(gd, gb1, gb2); +#define GETGB(i) if(rex.rex) { \ + gb1 = xRAX+((nextop&0x38)>>3)+(rex.r<<3); \ + gb2 = 0; \ + } else { \ + gd = (nextop&0x38)>>3; \ + gb2 = ((gd&4)>>2); \ + gb1 = xRAX+(gd&3); \ + } \ + gd = i; \ + UBFXx(gd, gb1, gb2, 8); //GETSGB signe extend GB, will use i for gd -#define GETSGB(i) gd = (nextop&0x38)>>3; \ - gb2 = ((gd&4)>>2); \ - gb1 = xEAX+(gd&3); \ - gd = i; \ - nopenope! \ - SXTB(gd, gb1, gb2); +#define GETSGB(i) if(rex.rex) { \ + gb1 = xRAX+((nextop&0x38)>>3)+(rex.r<<3); \ + gb2 = 0; \ + } else { \ + gd = (nextop&0x38)>>3; \ + gb2 = ((gd&4)>>2); \ + gb1 = xRAX+(gd&3); \ + } \ + gd = i; \ + SBFXx(gd, gb1, gb2, 8); // Write gb (gd) back to original register / memory -#define GBBACK BFI(gb1, gd, gb2*8, 8); +#define GBBACK BFIx(gb1, gd, gb2, 8); // Get Direction with size Z and based of F_DF flag, on register r ready for LDR/STR fetching // F_DF is 1<<10, so 1 ROR 11*2 (so F_OF) |