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authorptitSeb <sebastien.chev@gmail.com>2021-03-06 12:16:39 +0100
committerptitSeb <sebastien.chev@gmail.com>2021-03-06 12:16:39 +0100
commitd94237100cbf9b7e1e3d7b9dc46e3fdfc7196f76 (patch)
tree85630bfbcf2b9cf67591359228932e99f86b7b14 /src
parentafe97d4815329d0b0f0310810cab9be053e0ef52 (diff)
downloadbox64-d94237100cbf9b7e1e3d7b9dc46e3fdfc7196f76.tar.gz
box64-d94237100cbf9b7e1e3d7b9dc46e3fdfc7196f76.zip
Fixed more 32 opcode to wipe upper 32bits par of 64bits reg
Diffstat (limited to 'src')
-rwxr-xr-xsrc/emu/x64run.c12
1 files changed, 8 insertions, 4 deletions
diff --git a/src/emu/x64run.c b/src/emu/x64run.c
index d54849fa..e7896a12 100755
--- a/src/emu/x64run.c
+++ b/src/emu/x64run.c
@@ -90,8 +90,12 @@ x64emurun:
             GETGD;                                          \
             if(rex.w)                                       \
                 ED->q[0] = OP##64(emu, ED->q[0], GD->q[0]); \
-            else                                            \
-                ED->dword[0] = OP##32(emu, ED->dword[0], GD->dword[0]); \
+            else {                                          \
+                if((nextop&0xC0)==0xC0)                     \
+                    ED->q[0] = OP##32(emu, ED->dword[0], GD->dword[0]);     \
+                else                                                        \
+                    ED->dword[0] = OP##32(emu, ED->dword[0], GD->dword[0]); \
+            }                                               \
             break;                                          \
         case B+2:                                           \
             nextop = F8;                                    \
@@ -106,7 +110,7 @@ x64emurun:
             if(rex.w)                                       \
                 GD->q[0] = OP##64(emu, GD->q[0], ED->q[0]); \
             else                                            \
-                GD->dword[0] = OP##32(emu, GD->dword[0], ED->dword[0]); \
+                GD->q[0] = OP##32(emu, GD->dword[0], ED->dword[0]); \
             break;                                          \
         case B+4:                                           \
             R_AL = OP##8(emu, R_AL, F8);                    \
@@ -115,7 +119,7 @@ x64emurun:
             if(rex.w)                                       \
                 R_RAX = OP##64(emu, R_RAX, F32S64);         \
             else                                            \
-                R_EAX = OP##32(emu, R_EAX, F32);            \
+                R_RAX = OP##32(emu, R_EAX, F32);            \
             break;
 
         GO(0x00, add)                   /* ADD 0x00 -> 0x05 */