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| author | ptitSeb <sebastien.chev@gmail.com> | 2025-01-15 17:05:29 +0100 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2025-01-15 17:05:29 +0100 |
| commit | ec675564c6d27c66a03c7573e893d445677f858e (patch) | |
| tree | 4e2eca2c2cd42598018e3bea595a8e1a6168c897 /src | |
| parent | 8c71178238def88efac9bad131203f99e7e8f0db (diff) | |
| download | box64-ec675564c6d27c66a03c7573e893d445677f858e.tar.gz box64-ec675564c6d27c66a03c7573e893d445677f858e.zip | |
[ARM64_DYNAREC] Added one more case of fastround=2 for AVX.F2.0F 5A opcode
Diffstat (limited to 'src')
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_avx_f2_0f.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_avx_f2_0f.c b/src/dynarec/arm64/dynarec_arm64_avx_f2_0f.c index 9845fa5d..e8858014 100644 --- a/src/dynarec/arm64/dynarec_arm64_avx_f2_0f.c +++ b/src/dynarec/arm64/dynarec_arm64_avx_f2_0f.c @@ -240,7 +240,13 @@ uintptr_t dynarec64_AVX_F2_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, d1 = fpu_get_scratch(dyn, ninst); GETEXSD(v1, 0, 0); GETGX_empty_VX(v0, v2); - FCVT_S_D(d1, v1); + if(box64_dynarec_fastround==2) { + FCVT_S_D(d1, v1); + } else { + u8 = sse_setround(dyn, ninst, x1, x2, x3); + FCVT_S_D(d1, v1); + x87_restoreround(dyn, ninst, u8); + } if(v0!=v2) { VMOVQ(v0, v2); } |