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| author | ptitSeb <sebastien.chev@gmail.com> | 2024-06-01 19:12:18 +0200 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2024-06-01 19:12:18 +0200 |
| commit | ef3acd9f336b2019b8d576167e1c9cee775a97c1 (patch) | |
| tree | 85466f32527f9f8c11d86546e1d37296e132fab6 /src | |
| parent | 083b42feadaf392296df8c79dcfa70daa8a685ff (diff) | |
| download | box64-ef3acd9f336b2019b8d576167e1c9cee775a97c1.tar.gz box64-ef3acd9f336b2019b8d576167e1c9cee775a97c1.zip | |
[ARM64_DYNAREC] Added BMI.F2.0F38 F7 opcode
Diffstat (limited to 'src')
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_avx_f2_0f38.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_avx_f2_0f38.c b/src/dynarec/arm64/dynarec_arm64_avx_f2_0f38.c index 294a7797..779fb217 100644 --- a/src/dynarec/arm64/dynarec_arm64_avx_f2_0f38.c +++ b/src/dynarec/arm64/dynarec_arm64_avx_f2_0f38.c @@ -79,6 +79,15 @@ uintptr_t dynarec64_AVX_F2_0F38(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip LSRx(gd, x3, 32); } break; + case 0xF7: + INST_NAME("SHRX Gd, Ed, Vd"); + nextop = F8; + GETGD; + GETED(0); + GETVD; + ANDx_mask(x3, vd, 1, 0, rex.w?5:4); // mask 0x3f/0x1f + LSRxw_REG(gd, ed, x3); + break; default: DEFAULT; |