about summary refs log tree commit diff stats
path: root/src
diff options
context:
space:
mode:
authorYang Liu <liuyang22@iscas.ac.cn>2024-07-18 14:12:40 +0800
committerGitHub <noreply@github.com>2024-07-18 08:12:40 +0200
commitf07ee85078a2571f02b8c3c9f132760a53b95331 (patch)
treee620b05a624fec71c62c3c8c01e6981220d8221e /src
parent51b118d516f6d18fcad3cbf4f060055b619ab85a (diff)
downloadbox64-f07ee85078a2571f02b8c3c9f132760a53b95331.tar.gz
box64-f07ee85078a2571f02b8c3c9f132760a53b95331.zip
[RV64_DYNAREC] Added vlen detection (#1694)
Diffstat (limited to 'src')
-rw-r--r--src/core.c3
-rw-r--r--src/include/debug.h1
-rw-r--r--src/rv64detect.c12
3 files changed, 14 insertions, 2 deletions
diff --git a/src/core.c b/src/core.c
index 6c2d791e..507f65bb 100644
--- a/src/core.c
+++ b/src/core.c
@@ -109,6 +109,7 @@ int rv64_zbb = 0;
 int rv64_zbc = 0;
 int rv64_zbs = 0;
 int rv64_vector = 0;
+int rv64_vlen = 0;
 int rv64_xtheadba = 0;
 int rv64_xtheadbb = 0;
 int rv64_xtheadbs = 0;
@@ -509,7 +510,7 @@ HWCAP2_AFP
     if(rv64_zbb) printf_log(LOG_INFO, " Zbb");
     if(rv64_zbc) printf_log(LOG_INFO, " Zbc");
     if(rv64_zbs) printf_log(LOG_INFO, " Zbs");
-    if(rv64_vector) printf_log(LOG_INFO, " Vector");
+    if(rv64_vector) printf_log(LOG_INFO, " Vector (vlen: %d)", rv64_vlen);
     if(rv64_xtheadba) printf_log(LOG_INFO, " XTheadBa");
     if(rv64_xtheadbb) printf_log(LOG_INFO, " XTheadBb");
     if(rv64_xtheadbs) printf_log(LOG_INFO, " XTheadBs");
diff --git a/src/include/debug.h b/src/include/debug.h
index 523dfc14..1e31b437 100644
--- a/src/include/debug.h
+++ b/src/include/debug.h
@@ -55,6 +55,7 @@ extern int rv64_zbb;
 extern int rv64_zbc;
 extern int rv64_zbs;
 extern int rv64_vector;
+extern int rv64_vlen;
 extern int rv64_xtheadba;
 extern int rv64_xtheadbb;
 extern int rv64_xtheadbs;
diff --git a/src/rv64detect.c b/src/rv64detect.c
index 27ea2e51..01f36fcc 100644
--- a/src/rv64detect.c
+++ b/src/rv64detect.c
@@ -72,7 +72,17 @@ void RV64_Detect_Function()
     block = (uint32_t*)my_block;
     CSRRS(xZR, xZR, 0x00f);
     BR(xRA);
-    rv64_vector = Check(my_block); // TODO: also check vlen >= 128
+    rv64_vector = Check(my_block);
+
+    if (rv64_vector) {
+        int vlenb = 0;
+        asm volatile("csrr %0, 0xc22" : "=r"(vlenb));
+        rv64_vlen = vlenb * 8;
+        if (vlenb < 16) {
+            // we need vlen >= 128
+            rv64_vector = 0;
+        }
+    }
 
     // THead vendor extensions
     if (!rv64_zba) {