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authorYang Liu <liuyang22@iscas.ac.cn>2024-12-19 01:43:06 +0800
committerGitHub <noreply@github.com>2024-12-18 18:43:06 +0100
commitf873255a19704f9be0be110f2b7e5d219d2ea0a6 (patch)
tree4e19ef13222bc5d4ed5faa42c09b7f1eece41d3e /src
parent4662ab1c80fa800851793af44e32460ff5ebb11e (diff)
downloadbox64-f873255a19704f9be0be110f2b7e5d219d2ea0a6.tar.gz
box64-f873255a19704f9be0be110f2b7e5d219d2ea0a6.zip
[RV64_DYNAREC] Fixed CMPXCHG8B (#2167)
Diffstat (limited to 'src')
-rw-r--r--src/dynarec/rv64/dynarec_rv64_f0.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/dynarec/rv64/dynarec_rv64_f0.c b/src/dynarec/rv64/dynarec_rv64_f0.c
index f30ea9f0..a7ef099a 100644
--- a/src/dynarec/rv64/dynarec_rv64_f0.c
+++ b/src/dynarec/rv64/dynarec_rv64_f0.c
@@ -283,8 +283,8 @@ uintptr_t dynarec64_F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni
                                     ZEXTW2(x4, xRBX);
                                     SLLI(x2, xRCX, 32);
                                     OR(x4, x4, x2); // x4 is ecx:ebx
-                                    ANDI(x5, wback, (1 << (rex.w + 2)) - 1);
-                                    BNEZ_MARK3(x1);
+                                    ANDI(x5, wback, 7);
+                                    BNEZ_MARK3(x5);
                                     // Aligned
                                     MARKLOCK;
                                     LR_D(x2, wback, 1, 1);
@@ -301,14 +301,14 @@ uintptr_t dynarec64_F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni
                                     B_NEXT_nocond;
                                     MARK3;
                                     // Unaligned
-                                    ANDI(x5, wback, -(1 << (rex.w + 2)));
+                                    ANDI(x5, wback, -8);
                                     MARKLOCK2;
                                     LD(x2, wback, 0);
                                     LR_D(x6, x5, 1, 1);
                                     BNE_MARK2(x2, x3); // edx:eax != ed, load m64 into edx:eax
-                                    SCxw(x7, x6, x5, 1, 1);
+                                    SC_D(x7, x6, x5, 1, 1);
                                     BNEZ_MARKLOCK2(x7);
-                                    SDxw(x4, wback, 0); // set ZF and load ecx:ebx into m64
+                                    SD(x4, wback, 0); // set ZF and load ecx:ebx into m64
                                     ORI(xFlags, xFlags, 1 << F_ZF);
                                     SMDMB();
                                     B_NEXT_nocond;