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| author | ptitSeb <sebastien.chev@gmail.com> | 2025-04-25 16:43:23 +0200 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2025-04-25 16:43:23 +0200 |
| commit | f9475aa540d4cdb6cc54a58ed9589449c72d8995 (patch) | |
| tree | 586c998fa7a7fea96b5449fb31bb24852bbcbfa0 /src | |
| parent | c6f0872e50ce05820becffc27815908a6cba96c6 (diff) | |
| download | box64-f9475aa540d4cdb6cc54a58ed9589449c72d8995.tar.gz box64-f9475aa540d4cdb6cc54a58ed9589449c72d8995.zip | |
[ARM64_DYNAREC] Allow bigger block to be built
Diffstat (limited to 'src')
| -rw-r--r-- | src/dynarec/arm64/arm64_emitter.h | 2 | ||||
| -rw-r--r-- | src/dynarec/dynarec_arch.h | 6 |
2 files changed, 5 insertions, 3 deletions
diff --git a/src/dynarec/arm64/arm64_emitter.h b/src/dynarec/arm64/arm64_emitter.h index 749e7e03..91e4fba6 100644 --- a/src/dynarec/arm64/arm64_emitter.h +++ b/src/dynarec/arm64/arm64_emitter.h @@ -340,7 +340,7 @@ int convert_bitmask(uint64_t bitmask); #define LDRSW_REGz(Rt, Rn, Rm) EMIT(LDRS_REG_gen(0b10, Rm, rex.is32bits?0b110:0b011, 0, Rn, Rt)) #define LDR_PC_gen(opc, imm19, Rt) ((opc)<<30 | 0b011<<27 | (imm19)<<5 | (Rt)) -#define LDRx_literal(Rt, imm19) EMIT(LDR_PC_gen(0b01, ((imm19)>>2)&0x7FFFF, Rt)) +#define LDRx_literal(Rt, imm21) EMIT(LDR_PC_gen(0b01, (((int64_t)(imm21))>>2)&0x7FFFF, Rt)) #define LDU_gen(size, opc, imm9, Rn, Rt) ((size)<<30 | 0b111<<27 | (opc)<<22 | ((imm9)&0x1ff)<<12 | (Rn)<<5 | (Rt)) #define LDURx_I9(Rt, Rn, imm9) EMIT(LDU_gen(0b11, 0b01, imm9, Rn, Rt)) diff --git a/src/dynarec/dynarec_arch.h b/src/dynarec/dynarec_arch.h index c337523e..e3afb60a 100644 --- a/src/dynarec/dynarec_arch.h +++ b/src/dynarec/dynarec_arch.h @@ -18,8 +18,10 @@ #include "arm64/dynarec_arm64_private.h" #include "arm64/dynarec_arm64_functions.h" #include "arm64/dynarec_arm64_arch.h" -// Limit here is defined by LD litteral, that is 19bits -#define MAXBLOCK_SIZE ((1<<19)-200) +// TBZ/TBNZ is signed 14bits shifted by 2, but not use to jump from opcode to opcode +// Limit here is defined by LD litteral, that is 19bits signed ledt shifted by 2. So 20bits (positive/negative) address space (used for TABLE64) +// C.cond is also signed 19bits shifted by 2 +#define MAXBLOCK_SIZE ((1<<20)-200) #define RAZ_SPECIFIC(A, N) rasNativeState(A, N) #define UPDATE_SPECIFICS(A) updateNativeFlags(A) |