[ARM64_DYNAREC] Improved (V)[MIN/MAX][S/P][S/D] opcodes

4 files changed, 10 insertions, 34 deletions

diff --git a/src/dynarec/arm64/dynarec_arm64_avx_f2_0f.c b/src/dynarec/arm64/dynarec_arm64_avx_f2_0f.c
index f1e03d20..5e79f6a1 100644
--- a/src/dynarec/arm64/dynarec_arm64_avx_f2_0f.c
+++ b/src/dynarec/arm64/dynarec_arm64_avx_f2_0f.c
@@ -336,7 +336,7 @@ uintptr_t dynarec64_AVX_F2_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip,
             GETGX_empty_VX(v0, v2);
             // VMINSD: if any input is NaN, or Ex[0]<Gx[0], copy Ex[0] -> Gx[0]
             FCMPD(v2, v1);
-            FCSELD(d1, v1, v2, cCS);
+            FCSELD(d1, v1, v2, cCS);    //CS: NAN or == or Vx > Ex
             if(v0!=v2) {
                 VMOVQ(v0, v2);
             }
@@ -376,7 +376,7 @@ uintptr_t dynarec64_AVX_F2_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip,
             GETEXSD(v1, 0, 0);
             GETGX_empty_VX(v0, v2);
             FCMPD(v1, v2);
-            FCSELD(d1, v1, v2, cCS);
+            FCSELD(d1, v1, v2, cCS);    //CS: NAN or == or Ex > Vx
             if(v0!=v2) {
                 VMOVQ(v0, v2);
             }
diff --git a/src/dynarec/arm64/dynarec_arm64_avx_f3_0f.c b/src/dynarec/arm64/dynarec_arm64_avx_f3_0f.c
index bb1774e7..4cc04f7e 100644
--- a/src/dynarec/arm64/dynarec_arm64_avx_f3_0f.c
+++ b/src/dynarec/arm64/dynarec_arm64_avx_f3_0f.c
@@ -386,7 +386,7 @@ uintptr_t dynarec64_AVX_F3_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip,
             GETEXSS(v1, 0, 0);
             GETGX_empty_VX(v0, v2);
             FCMPS(v2, v1);
-            FCSELS(d1, v1, v2, cCS);
+            FCSELS(d1, v1, v2, cCS);    //CS: NAN or == or Ex > Vx
             if(v0!=v2) {
                 VMOVQ(v0, v2);
             }
@@ -426,7 +426,7 @@ uintptr_t dynarec64_AVX_F3_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip,
             GETEXSS(v1, 0, 0);
             GETGX_empty_VX(v0, v2);
             FCMPS(v1, v2);
-            FCSELS(d1, v1, v2, cCS);
+            FCSELS(d1, v1, v2, cCS);    //CS: NAN or == or Ex > Vx
             if(v0!=v2) {
                 VMOVQ(v0, v2);
             }
diff --git a/src/dynarec/arm64/dynarec_arm64_f20f.c b/src/dynarec/arm64/dynarec_arm64_f20f.c
index 59154259..8428538d 100644
--- a/src/dynarec/arm64/dynarec_arm64_f20f.c
+++ b/src/dynarec/arm64/dynarec_arm64_f20f.c
@@ -336,15 +336,9 @@ uintptr_t dynarec64_F20F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             GETGX(v0, 1);

             GETEXSD(v1, 0, 0);

             // MINSD: if any input is NaN, or Ex[0]<Gx[0], copy Ex[0] -> Gx[0]

-            #if 0

-            d0 = fpu_get_scratch(dyn, ninst);

-            FMINNMD(d0, v0, v1);    // NaN handling may be slightly different, is that a problem?

-            VMOVeD(v0, 0, d0, 0);   // to not erase uper part

-            #else

             FCMPD(v0, v1);

-            B_NEXT(cCC);    //Less than

+            B_NEXT(cCC);    //CC invert of CS: NAN or == or Gx > Ex

             VMOVeD(v0, 0, v1, 0);   // to not erase uper part

-            #endif

             break;

         case 0x5E:

             INST_NAME("DIVSD Gx, Ex");

@@ -374,15 +368,9 @@ uintptr_t dynarec64_F20F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             GETGX(v0, 1);

             GETEXSD(v1, 0, 0);

             // MAXSD: if any input is NaN, or Ex[0]>Gx[0], copy Ex[0] -> Gx[0]

-            #if 0

-            d0 = fpu_get_scratch(dyn, ninst);

-            FMAXNMD(d0, v0, v1);    // NaN handling may be slightly different, is that a problem?

-            VMOVeD(v0, 0, d0, 0);   // to not erase uper part

-            #else

-            FCMPD(v0, v1);

-            B_NEXT(cGT);    //Greater than

+            FCMPD(v1, v0);

+            B_NEXT(cCC);    //CC invert of CS: NAN or == or Ex > Gx

             VMOVeD(v0, 0, v1, 0);   // to not erase uper part

-            #endif

             break;

 

         case 0x70:

diff --git a/src/dynarec/arm64/dynarec_arm64_f30f.c b/src/dynarec/arm64/dynarec_arm64_f30f.c
index 9fde5da9..a0cf44c9 100644
--- a/src/dynarec/arm64/dynarec_arm64_f30f.c
+++ b/src/dynarec/arm64/dynarec_arm64_f30f.c
@@ -374,15 +374,9 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             GETGX(v0, 1);

             GETEXSS(v1, 0, 0);

             // MINSS: if any input is NaN, or Ex[0]<Gx[0], copy Ex[0] -> Gx[0]

-            #if 0

-            d0 = fpu_get_scratch(dyn, ninst);

-            FMINNMS(d0, v0, v1);    // NaN handling may be slightly different, is that a problem?

-            VMOVeS(v0, 0, d0, 0);   // to not erase uper part

-            #else

             FCMPS(v0, v1);

-            B_NEXT(cCC);    //Less than

+            B_NEXT(cCC);    //CC invert of CS: NAN or == or Gx > Ex

             VMOVeS(v0, 0, v1, 0);   // to not erase uper part

-            #endif

             break;

         case 0x5E:

             INST_NAME("DIVSS Gx, Ex");

@@ -412,15 +406,9 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             GETGX(v0, 1);

             GETEXSS(v1, 0, 0);

             // MAXSS: if any input is NaN, or Ex[0]>Gx[0], copy Ex[0] -> Gx[0]

-            #if 0

-            d0 = fpu_get_scratch(dyn, ninst);

-            FMAXNMS(d0, v0, v1);    // NaN handling may be slightly different, is that a problem?

-            VMOVeS(v0, 0, d0, 0);   // to not erase uper part

-            #else

-            FCMPS(v0, v1);

-            B_NEXT(cGT);    //Greater than

+            FCMPS(v1, v0);

+            B_NEXT(cCC);    //CC: invert of CS: NAN or == or Ex > Gx

             VMOVeS(v0, 0, v1, 0);   // to not erase uper part

-            #endif

             break;

 

         case 0x6F: