diff options
| author | Yang Liu <liuyang22@iscas.ac.cn> | 2024-12-23 04:41:43 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-12-22 21:41:43 +0100 |
| commit | fc2a6d4dd19183a68f3d22270a58be683bd62266 (patch) | |
| tree | 811e7103b04d410426ccc82db54458f0e39d0217 /src | |
| parent | 85fe4c628e29a18584cdd2e9ca7647196219d0b4 (diff) | |
| download | box64-fc2a6d4dd19183a68f3d22270a58be683bd62266.tar.gz box64-fc2a6d4dd19183a68f3d22270a58be683bd62266.zip | |
[RV64_DYNAREC] Added a fast path to SHR Ew, Ib (#2188)
Diffstat (limited to 'src')
| -rw-r--r-- | src/dynarec/rv64/dynarec_rv64_66.c | 20 | ||||
| -rw-r--r-- | src/dynarec/rv64/rv64_emitter.h | 6 |
2 files changed, 19 insertions, 7 deletions
diff --git a/src/dynarec/rv64/dynarec_rv64_66.c b/src/dynarec/rv64/dynarec_rv64_66.c index 586f46fc..f3fe90c9 100644 --- a/src/dynarec/rv64/dynarec_rv64_66.c +++ b/src/dynarec/rv64/dynarec_rv64_66.c @@ -1105,10 +1105,22 @@ uintptr_t dynarec64_66(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni INST_NAME("SHR Ew, Ib"); if (geted_ib(dyn, addr, ninst, nextop) & 0x1f) { SETFLAGS(X_ALL, SF_SET_PENDING, NAT_FLAGS_FUSION); // some flags are left undefined - GETEW(x1, 0); - u8 = (F8) & 0x1f; - emit_shr16c(dyn, ninst, x1, u8, x5, x4, x6); - EWBACK; + if (MODREG && !dyn->insts[ninst].x64.gen_flags) { + // save an srli instruction... + wback = TO_NAT((nextop & 7) + (rex.b << 3)); + u8 = (F8) & 0x1f; + SLLI(x1, wback, 48); + SRLI(x1, x1, 48 + u8); + ed = x1; + wb1 = 0; + EWBACK; + if (dyn->insts[ninst].nat_flags_fusion) NAT_FLAGS_OPS(ed, xZR); + } else { + GETEW(x1, 0); + u8 = (F8) & 0x1f; + emit_shr16c(dyn, ninst, x1, u8, x5, x4, x6); + EWBACK; + } } else { FAKEED; F8; diff --git a/src/dynarec/rv64/rv64_emitter.h b/src/dynarec/rv64/rv64_emitter.h index 5c3279ea..dbdccf24 100644 --- a/src/dynarec/rv64/rv64_emitter.h +++ b/src/dynarec/rv64/rv64_emitter.h @@ -419,11 +419,11 @@ #define SDz(rs2, rs1, imm12) EMIT(S_type(imm12, rs2, rs1, 0b010 + (1 - rex.is32bits), 0b0100011)) // Shift Left Immediate -#define SLLI(rd, rs1, imm6) EMIT(I_type(imm6, rs1, 0b001, rd, 0b0010011)) +#define SLLI(rd, rs1, imm6) EMIT(I_type(((imm6) & 0x3f), rs1, 0b001, rd, 0b0010011)) // Shift Right Logical Immediate -#define SRLI(rd, rs1, imm6) EMIT(I_type(imm6, rs1, 0b101, rd, 0b0010011)) +#define SRLI(rd, rs1, imm6) EMIT(I_type(((imm6) & 0x3f), rs1, 0b101, rd, 0b0010011)) // Shift Right Arithmetic Immediate -#define SRAI(rd, rs1, imm6) EMIT(I_type((imm6) | (0b010000 << 6), rs1, 0b101, rd, 0b0010011)) +#define SRAI(rd, rs1, imm6) EMIT(I_type(((imm6) & 0x3f) | (0b010000 << 6), rs1, 0b101, rd, 0b0010011)) // rd = rs1 + imm12 #define ADDIW(rd, rs1, imm12) EMIT(I_type((imm12) & 0b111111111111, rs1, 0b000, rd, 0b0011011)) |