[RV64_DYNAREC][LA64_DYNAREC] Fixed various issues (#1940)

* [RV64_DYNAREC] Fixed more issues for vector

* more fixes and optims

* more

* more

* more

* more

12 files changed, 57 insertions, 52 deletions

diff --git a/src/dynarec/la64/dynarec_la64_00.c b/src/dynarec/la64/dynarec_la64_00.c
index 3e6c0f99..c0ab6470 100644
--- a/src/dynarec/la64/dynarec_la64_00.c
+++ b/src/dynarec/la64/dynarec_la64_00.c
@@ -1660,10 +1660,10 @@ uintptr_t dynarec64_00(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni
                 ed = TO_LA64((nextop & 7) + (rex.b << 3));
                 MOV64xw(ed, i64);
             } else { // mem <= i32
-                addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, &lock, 0, 4);
+                addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, &lock, 1, 4);
                 i64 = F32S;
                 if (i64) {
-                    MOV64xw(x3, i64);
+                    MOV64x(x3, i64);
                     ed = x3;
                 } else
                     ed = xZR;
diff --git a/src/dynarec/la64/dynarec_la64_64.c b/src/dynarec/la64/dynarec_la64_64.c
index 0753c11c..a069dd80 100644
--- a/src/dynarec/la64/dynarec_la64_64.c
+++ b/src/dynarec/la64/dynarec_la64_64.c
@@ -408,7 +408,7 @@ uintptr_t dynarec64_64(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni
                 addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, NULL, 0, 4);
                 i64 = F32S;
                 if (i64) {
-                    MOV64xw(x3, i64);
+                    MOV64x(x3, i64);
                     ed = x3;
                 } else
                     ed = xZR;
diff --git a/src/dynarec/la64/dynarec_la64_f20f.c b/src/dynarec/la64/dynarec_la64_f20f.c
index 9f8bcc24..ee68cda5 100644
--- a/src/dynarec/la64/dynarec_la64_f20f.c
+++ b/src/dynarec/la64/dynarec_la64_f20f.c
@@ -129,7 +129,7 @@ uintptr_t dynarec64_F20F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int
             if (!rex.w) ZEROUP(gd);
             if (!box64_dynarec_fastround) {
                 MOVFCSR2GR(x5, FCSR2); // get back FPSR to check
-                MOV32w(x3, (1 << FR_V) | (1 << FR_O));
+                MOV32w(x3, (1 << FR_V));
                 AND(x5, x5, x3);
                 CBZ_NEXT(x5);
                 if (rex.w) {
@@ -160,7 +160,7 @@ uintptr_t dynarec64_F20F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int
             x87_restoreround(dyn, ninst, u8);
             if (!box64_dynarec_fastround) {
                 MOVFCSR2GR(x5, FCSR2); // get back FPSR to check
-                MOV32w(x3, (1 << FR_V) | (1 << FR_O));
+                MOV32w(x3, (1 << FR_V)); 
                 AND(x5, x5, x3);
                 CBZ_NEXT(x5);
                 if (rex.w) {
@@ -330,4 +330,4 @@ uintptr_t dynarec64_F20F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int
             DEFAULT;
     }
     return addr;
-}
\ No newline at end of file
+}
diff --git a/src/dynarec/la64/dynarec_la64_f30f.c b/src/dynarec/la64/dynarec_la64_f30f.c
index 5f116b2d..4a8cd4e0 100644
--- a/src/dynarec/la64/dynarec_la64_f30f.c
+++ b/src/dynarec/la64/dynarec_la64_f30f.c
@@ -118,7 +118,7 @@ uintptr_t dynarec64_F30F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int
             }
             if (!box64_dynarec_fastround) {
                 MOVFCSR2GR(x5, FCSR2); // get back FPSR to check
-                MOV32w(x3, (1 << FR_V) | (1 << FR_O));
+                MOV32w(x3, (1 << FR_V));
                 AND(x5, x5, x3);
                 CBZ_NEXT(x5);
                 if (rex.w) {
@@ -151,7 +151,7 @@ uintptr_t dynarec64_F30F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int
             x87_restoreround(dyn, ninst, u8);
             if (!box64_dynarec_fastround) {
                 MOVFCSR2GR(x5, FCSR2); // get back FPSR to check
-                MOV32w(x3, (1 << FR_V) | (1 << FR_O));
+                MOV32w(x3, (1 << FR_V));
                 AND(x5, x5, x3);
                 CBZ_NEXT(x5);
                 if (rex.w) {
@@ -381,4 +381,4 @@ uintptr_t dynarec64_F30F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int
             DEFAULT;
     }
     return addr;
-}
\ No newline at end of file
+}
diff --git a/src/dynarec/rv64/dynarec_rv64_00_3.c b/src/dynarec/rv64/dynarec_rv64_00_3.c
index e1804f21..1b76badc 100644
--- a/src/dynarec/rv64/dynarec_rv64_00_3.c
+++ b/src/dynarec/rv64/dynarec_rv64_00_3.c
@@ -335,7 +335,7 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int
                     ORI(eb1, eb1, u8);
                 }
             } else {                    // mem <= u8
-                addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, &lock, 0, 1);
+                addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, &lock, 1, 1);
                 u8 = F8;
                 if(u8) {
                     ADDI(x3, xZR, u8);
@@ -354,10 +354,10 @@ uintptr_t dynarec64_00_3(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int
                 ed = xRAX+(nextop&7)+(rex.b<<3);
                 MOV64xw(ed, i64);
             } else {        // mem <= i32
-                addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, &lock, 0, 4);
+                addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, &lock, 1, 4);
                 i64 = F32S;
                 if(i64) {
-                    MOV64xw(x3, i64);
+                    MOV64x(x3, i64);
                     ed = x3;
                 } else
                     ed = xZR;
diff --git a/src/dynarec/rv64/dynarec_rv64_64.c b/src/dynarec/rv64/dynarec_rv64_64.c
index 2ad48874..168ee161 100644
--- a/src/dynarec/rv64/dynarec_rv64_64.c
+++ b/src/dynarec/rv64/dynarec_rv64_64.c
@@ -517,7 +517,7 @@ uintptr_t dynarec64_64(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni
                 addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, NULL, 1, 4);
                 i64 = F32S;
                 if(i64) {
-                    MOV64xw(x3, i64);
+                    MOV64x(x3, i64);
                     ed = x3;
                 } else
                     ed = xZR;
diff --git a/src/dynarec/rv64/dynarec_rv64_660f_vector.c b/src/dynarec/rv64/dynarec_rv64_660f_vector.c
index a3c5bf05..d76d26f2 100644
--- a/src/dynarec/rv64/dynarec_rv64_660f_vector.c
+++ b/src/dynarec/rv64/dynarec_rv64_660f_vector.c
@@ -1384,9 +1384,9 @@ uintptr_t dynarec64_660F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t i
                 ed = xRAX + (nextop & 7) + (rex.b << 3);
             } else {
                 SMREAD();
-                addr = geted(dyn, addr, ninst, nextop, &ed, x2, x3, &fixedaddress, rex, NULL, 0, 1);
+                addr = geted(dyn, addr, ninst, nextop, &ed, x2, x3, &fixedaddress, rex, NULL, 1, 1);
                 u8 = (F8) & 7;
-                LHU(x4, ed, 0);
+                LHU(x4, ed, fixedaddress);
                 ed = x4;
             }
             vector_loadmask(dyn, ninst, VMASK, (1 << u8), x5, 1);
diff --git a/src/dynarec/rv64/dynarec_rv64_67.c b/src/dynarec/rv64/dynarec_rv64_67.c
index 76bdaef4..7c3b3041 100644
--- a/src/dynarec/rv64/dynarec_rv64_67.c
+++ b/src/dynarec/rv64/dynarec_rv64_67.c
@@ -698,9 +698,9 @@ uintptr_t dynarec64_67(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni
                 ed = xRAX + (nextop & 7) + (rex.b << 3);
                 MOV64xw(ed, i64);
             } else {     // mem <= i32
-                addr = geted32(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, &lock, 1, 0);
+                addr = geted32(dyn, addr, ninst, nextop, &ed, x2, x1, &fixedaddress, rex, &lock, 1, 4);
                 i64 = F32S;
-                MOV64xw(x3, i64);
+                MOV64x(x3, i64);
                 SDxw(x3, ed, fixedaddress);
                 SMWRITELOCK(lock);
             }
diff --git a/src/dynarec/rv64/dynarec_rv64_f20f.c b/src/dynarec/rv64/dynarec_rv64_f20f.c
index 373541f0..ebb58484 100644
--- a/src/dynarec/rv64/dynarec_rv64_f20f.c
+++ b/src/dynarec/rv64/dynarec_rv64_f20f.c
@@ -105,14 +105,13 @@ uintptr_t dynarec64_F20F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int
             GETGD;
             GETEXSD(v0, 0);
             if(!box64_dynarec_fastround) {
-                FSFLAGSI(0);  // // reset all bits
+                FSFLAGSI(0); // reset all bits
             }
             FCVTLDxw(gd, v0, RD_RTZ);
-            if(!rex.w)
-                ZEROUP(gd);
+            if (!rex.w) ZEROUP(gd);
             if(!box64_dynarec_fastround) {
-                FRFLAGS(x5);   // get back FPSR to check the IOC bit
-                ANDI(x5, x5, (1<<FR_NV)|(1<<FR_OF));
+                FRFLAGS(x5); // get back FPSR to check the IOC bit
+                ANDI(x5, x5, (1 << FR_NV));
                 CBZ_NEXT(x5);
                 if(rex.w) {
                     MOV64x(gd, 0x8000000000000000LL);
@@ -131,10 +130,11 @@ uintptr_t dynarec64_F20F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int
             }
             u8 = sse_setround(dyn, ninst, x2, x3);
             FCVTLDxw(gd, v0, RD_DYN);
+            if (!rex.w) ZEROUP(gd);
             x87_restoreround(dyn, ninst, u8);
             if(!box64_dynarec_fastround) {
                 FRFLAGS(x5);   // get back FPSR to check the IOC bit
-                ANDI(x5, x5, (1<<FR_NV)|(1<<FR_OF));
+                ANDI(x5, x5, (1 << FR_NV));
                 CBZ_NEXT(x5);
                 if(rex.w) {
                     MOV64x(gd, 0x8000000000000000LL);
diff --git a/src/dynarec/rv64/dynarec_rv64_f20f_vector.c b/src/dynarec/rv64/dynarec_rv64_f20f_vector.c
index 040cc313..263f3030 100644
--- a/src/dynarec/rv64/dynarec_rv64_f20f_vector.c
+++ b/src/dynarec/rv64/dynarec_rv64_f20f_vector.c
@@ -147,7 +147,7 @@ uintptr_t dynarec64_F20F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t i
                 FCVTLDxw(gd, v0, RD_RTZ);
                 if (!rex.w) ZEROUP(gd);
                 FRFLAGS(x5); // get back FPSR to check the IOC bit
-                ANDI(x5, x5, (1 << FR_NV) | (1 << FR_OF));
+                ANDI(x5, x5, (1 << FR_NV));
                 CBZ_NEXT(x5);
                 if (rex.w) {
                     MOV64x(gd, 0x8000000000000000LL);
@@ -161,7 +161,7 @@ uintptr_t dynarec64_F20F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t i
             nextop = F8;
             GETGD;
             if (MODREG) {
-                SET_ELEMENT_WIDTH(x1, (rex.w ? VECTOR_SEW64 : VECTOR_SEW32), 1);
+                SET_ELEMENT_WIDTH(x1, VECTOR_SEW64, 1);
                 v0 = sse_get_reg_vector(dyn, ninst, x1, (nextop & 7) + (rex.b << 3), 0, dyn->vector_eew);
             } else {
                 SMREAD();
@@ -170,21 +170,23 @@ uintptr_t dynarec64_F20F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t i
                 addr = geted(dyn, addr, ninst, nextop, &ed, x1, x2, &fixedaddress, rex, NULL, 0, 0);
                 vector_loadmask(dyn, ninst, VMASK, 0xFF, x4, 1);
                 VLE8_V(v0, ed, VECTOR_MASKED, VECTOR_NFIELD1);
-                SET_ELEMENT_WIDTH(x1, (rex.w ? VECTOR_SEW64 : VECTOR_SEW32), 1);
+                SET_ELEMENT_WIDTH(x1, VECTOR_SEW64, 1);
             }
             if (box64_dynarec_fastround) {
                 VFMV_F_S(v0, v0);
                 u8 = sse_setround(dyn, ninst, x2, x3);
                 FCVTLDxw(gd, v0, RD_DYN);
+                if (!rex.w) ZEROUP(gd);
                 x87_restoreround(dyn, ninst, u8);
             } else {
                 VFMV_F_S(v0, v0);
                 FSFLAGSI(0); // // reset all bits
                 u8 = sse_setround(dyn, ninst, x2, x3);
                 FCVTLDxw(gd, v0, RD_DYN);
+                if (!rex.w) ZEROUP(gd);
                 x87_restoreround(dyn, ninst, u8);
                 FRFLAGS(x5); // get back FPSR to check the IOC bit
-                ANDI(x5, x5, (1 << FR_NV) | (1 << FR_OF));
+                ANDI(x5, x5, (1 << FR_NV));
                 CBZ_NEXT(x5);
                 if (rex.w) {
                     MOV64x(gd, 0x8000000000000000LL);
@@ -230,6 +232,7 @@ uintptr_t dynarec64_F20F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t i
                 if (rv64_xtheadvector) {
                     d0 = fpu_get_scratch(dyn);
                     VFMV_S_F(d0, v0);
+                    vector_loadmask(dyn, ninst, VMASK, 0b01, x4, 1);
                     VMERGE_VVM(v0, v0, d0); // implies VMASK
                 } else {
                     VFMV_S_F(v0, v0);
diff --git a/src/dynarec/rv64/dynarec_rv64_f30f_vector.c b/src/dynarec/rv64/dynarec_rv64_f30f_vector.c
index 43b5de83..f6064852 100644
--- a/src/dynarec/rv64/dynarec_rv64_f30f_vector.c
+++ b/src/dynarec/rv64/dynarec_rv64_f30f_vector.c
@@ -162,6 +162,7 @@ uintptr_t dynarec64_F30F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t i
                 if (rv64_xtheadvector) {
                     d0 = fpu_get_scratch(dyn);
                     VFMV_S_F(d0, v0);
+                    vector_loadmask(dyn, ninst, VMASK, 0b0001, x4, 1);
                     VMERGE_VVM(v0, v0, d0); // implies VMASK
                 } else {
                     VFMV_S_F(v0, v0);
diff --git a/src/dynarec/rv64/rv64_printer.c b/src/dynarec/rv64/rv64_printer.c
index 3eaf92f2..6f7af4d2 100644
--- a/src/dynarec/rv64/rv64_printer.c
+++ b/src/dynarec/rv64/rv64_printer.c
@@ -177,6 +177,7 @@ typedef struct {
     int8_t vm;
     int8_t rm;
     int8_t nf;
+    int16_t csr;
 
     int32_t imm;
     int32_t imm2;
@@ -699,7 +700,7 @@ const char* rv64_print(uint32_t opcode, uintptr_t addr)
     if ((opcode & 0x707f) == 0x63) {
         a.rs1 = FX(opcode, 19, 15);
         a.rs2 = FX(opcode, 24, 20);
-        a.imm = a.imm = BX(opcode, 31) << 12;
+        a.imm = BX(opcode, 31) << 12;
         a.imm |= BX(opcode, 7) << 11;
         a.imm |= FX(opcode, 30, 25) << 5;
         a.imm |= FX(opcode, 11, 8) << 1;
@@ -731,7 +732,7 @@ const char* rv64_print(uint32_t opcode, uintptr_t addr)
     if ((opcode & 0x707f) == 0x5063) {
         a.rs1 = FX(opcode, 19, 15);
         a.rs2 = FX(opcode, 24, 20);
-        a.imm = a.imm = BX(opcode, 31) << 12;
+        a.imm = BX(opcode, 31) << 12;
         a.imm |= BX(opcode, 7) << 11;
         a.imm |= FX(opcode, 30, 25) << 5;
         a.imm |= FX(opcode, 11, 8) << 1;
@@ -745,7 +746,7 @@ const char* rv64_print(uint32_t opcode, uintptr_t addr)
     if ((opcode & 0x707f) == 0x7063) {
         a.rs1 = FX(opcode, 19, 15);
         a.rs2 = FX(opcode, 24, 20);
-        a.imm = a.imm = BX(opcode, 31) << 12;
+        a.imm = BX(opcode, 31) << 12;
         a.imm |= BX(opcode, 7) << 11;
         a.imm |= FX(opcode, 30, 25) << 5;
         a.imm |= FX(opcode, 11, 8) << 1;
@@ -777,7 +778,7 @@ const char* rv64_print(uint32_t opcode, uintptr_t addr)
     if ((opcode & 0x707f) == 0x4063) {
         a.rs1 = FX(opcode, 19, 15);
         a.rs2 = FX(opcode, 24, 20);
-        a.imm = a.imm = BX(opcode, 31) << 12;
+        a.imm = BX(opcode, 31) << 12;
         a.imm |= BX(opcode, 7) << 11;
         a.imm |= FX(opcode, 30, 25) << 5;
         a.imm |= FX(opcode, 11, 8) << 1;
@@ -791,7 +792,7 @@ const char* rv64_print(uint32_t opcode, uintptr_t addr)
     if ((opcode & 0x707f) == 0x6063) {
         a.rs1 = FX(opcode, 19, 15);
         a.rs2 = FX(opcode, 24, 20);
-        a.imm = a.imm = BX(opcode, 31) << 12;
+        a.imm = BX(opcode, 31) << 12;
         a.imm |= BX(opcode, 7) << 11;
         a.imm |= FX(opcode, 30, 25) << 5;
         a.imm |= FX(opcode, 11, 8) << 1;
@@ -805,7 +806,7 @@ const char* rv64_print(uint32_t opcode, uintptr_t addr)
     if ((opcode & 0x707f) == 0x1063) {
         a.rs1 = FX(opcode, 19, 15);
         a.rs2 = FX(opcode, 24, 20);
-        a.imm = a.imm = BX(opcode, 31) << 12;
+        a.imm = BX(opcode, 31) << 12;
         a.imm |= BX(opcode, 7) << 11;
         a.imm |= FX(opcode, 30, 25) << 5;
         a.imm |= FX(opcode, 11, 8) << 1;
@@ -896,17 +897,17 @@ const char* rv64_print(uint32_t opcode, uintptr_t addr)
     if ((opcode & 0x707f) == 0x3073) {
         a.rd = FX(opcode, 11, 7);
         a.rs1 = FX(opcode, 19, 15);
-        a.imm = FX(opcode, 31, 20);
-        snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%x(%d)", "CSRRC", gpr[a.rd], gpr[a.rs1], a.imm, a.imm);
+        a.csr = FX(opcode, 31, 20);
+        snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%x(%d)", "CSRRC", gpr[a.rd], gpr[a.rs1], a.csr, a.csr);
         return buff;
     }
 
     // rv_zicsr, CSRRCI
     if ((opcode & 0x707f) == 0x7073) {
         a.rd = FX(opcode, 11, 7);
-        a.imm = FX(opcode, 31, 20);
+        a.csr = FX(opcode, 31, 20);
         a.imm = FX(opcode, 19, 15);
-        snprintf(buff, sizeof(buff), "%-15s %s, 0x%x(%d), 0x%x(%d)", "CSRRCI", gpr[a.rd], a.imm, a.imm, a.imm, a.imm);
+        snprintf(buff, sizeof(buff), "%-15s %s, 0x%x(%d), 0x%x(%d)", "CSRRCI", gpr[a.rd], a.csr, a.csr, a.imm, a.imm);
         return buff;
     }
 
@@ -914,17 +915,17 @@ const char* rv64_print(uint32_t opcode, uintptr_t addr)
     if ((opcode & 0x707f) == 0x2073) {
         a.rd = FX(opcode, 11, 7);
         a.rs1 = FX(opcode, 19, 15);
-        a.imm = FX(opcode, 31, 20);
-        snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%x(%d)", "CSRRS", gpr[a.rd], gpr[a.rs1], a.imm, a.imm);
+        a.csr = FX(opcode, 31, 20);
+        snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%x(%d)", "CSRRS", gpr[a.rd], gpr[a.rs1], a.csr, a.csr);
         return buff;
     }
 
     // rv_zicsr, CSRRSI
     if ((opcode & 0x707f) == 0x6073) {
         a.rd = FX(opcode, 11, 7);
-        a.imm = FX(opcode, 31, 20);
+        a.csr = FX(opcode, 31, 20);
         a.imm = FX(opcode, 19, 15);
-        snprintf(buff, sizeof(buff), "%-15s %s, 0x%x(%d), 0x%x(%d)", "CSRRSI", gpr[a.rd], a.imm, a.imm, a.imm, a.imm);
+        snprintf(buff, sizeof(buff), "%-15s %s, 0x%x(%d), 0x%x(%d)", "CSRRSI", gpr[a.rd], a.csr, a.csr, a.imm, a.imm);
         return buff;
     }
 
@@ -932,17 +933,17 @@ const char* rv64_print(uint32_t opcode, uintptr_t addr)
     if ((opcode & 0x707f) == 0x1073) {
         a.rd = FX(opcode, 11, 7);
         a.rs1 = FX(opcode, 19, 15);
-        a.imm = FX(opcode, 31, 20);
-        snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%x(%d)", "CSRRW", gpr[a.rd], gpr[a.rs1], a.imm, a.imm);
+        a.csr = FX(opcode, 31, 20);
+        snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%x(%d)", "CSRRW", gpr[a.rd], gpr[a.rs1], a.csr, a.csr);
         return buff;
     }
 
     // rv_zicsr, CSRRWI
     if ((opcode & 0x707f) == 0x5073) {
         a.rd = FX(opcode, 11, 7);
-        a.imm = FX(opcode, 31, 20);
+        a.csr = FX(opcode, 31, 20);
         a.imm = FX(opcode, 19, 15);
-        snprintf(buff, sizeof(buff), "%-15s %s, 0x%x(%d), 0x%x(%d)", "CSRRWI", gpr[a.rd], a.imm, a.imm, a.imm, a.imm);
+        snprintf(buff, sizeof(buff), "%-15s %s, 0x%x(%d), 0x%x(%d)", "CSRRWI", gpr[a.rd], a.csr, a.csr, a.imm, a.imm);
         return buff;
     }
 
@@ -1488,7 +1489,7 @@ const char* rv64_print(uint32_t opcode, uintptr_t addr)
     if ((opcode & 0x707f) == 0x3027) {
         a.rs2 = FX(opcode, 24, 20);
         a.rs1 = FX(opcode, 19, 15);
-        a.imm = a.imm = (FX(opcode, 31, 25) << 5) | (FX(opcode, 11, 7));
+        a.imm = (FX(opcode, 31, 25) << 5) | (FX(opcode, 11, 7));
         a.imm = SIGN_EXTEND(a.imm, 12);
 
         snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%x(%d)", "FSD", fpr[a.rs2], gpr[a.rs1], a.imm, a.imm);
@@ -1591,7 +1592,7 @@ const char* rv64_print(uint32_t opcode, uintptr_t addr)
     if ((opcode & 0x707f) == 0x2027) {
         a.rs2 = FX(opcode, 24, 20);
         a.rs1 = FX(opcode, 19, 15);
-        a.imm = a.imm = (FX(opcode, 31, 25) << 5) | (FX(opcode, 11, 7));
+        a.imm = (FX(opcode, 31, 25) << 5) | (FX(opcode, 11, 7));
         a.imm = SIGN_EXTEND(a.imm, 12);
 
         snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%x(%d)", "FSW", fpr[a.rs2], gpr[a.rs1], a.imm, a.imm);
@@ -1601,7 +1602,7 @@ const char* rv64_print(uint32_t opcode, uintptr_t addr)
     //    rv_i, JAL
     if ((opcode & 0x7f) == 0x6f) {
         a.rd = FX(opcode, 11, 7);
-        a.imm = a.imm = BX(opcode, 31) << 20;
+        a.imm = BX(opcode, 31) << 20;
         a.imm |= FX(opcode, 19, 12) << 12;
         a.imm |= BX(opcode, 20) << 11;
         a.imm |= FX(opcode, 30, 21) << 1;
@@ -1929,7 +1930,7 @@ const char* rv64_print(uint32_t opcode, uintptr_t addr)
     if ((opcode & 0x707f) == 0x23) {
         a.rs2 = FX(opcode, 24, 20);
         a.rs1 = FX(opcode, 19, 15);
-        a.imm = a.imm = (FX(opcode, 31, 25) << 5) | (FX(opcode, 11, 7));
+        a.imm = (FX(opcode, 31, 25) << 5) | (FX(opcode, 11, 7));
         a.imm = SIGN_EXTEND(a.imm, 12);
 
         snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%x(%d)", "SB", gpr[a.rs2], gpr[a.rs1], a.imm, a.imm);
@@ -1962,7 +1963,7 @@ const char* rv64_print(uint32_t opcode, uintptr_t addr)
     if ((opcode & 0x707f) == 0x3023) {
         a.rs2 = FX(opcode, 24, 20);
         a.rs1 = FX(opcode, 19, 15);
-        a.imm = a.imm = (FX(opcode, 31, 25) << 5) | (FX(opcode, 11, 7));
+        a.imm = (FX(opcode, 31, 25) << 5) | (FX(opcode, 11, 7));
         a.imm = SIGN_EXTEND(a.imm, 12);
 
         snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%x(%d)", "SD", gpr[a.rs2], gpr[a.rs1], a.imm, a.imm);
@@ -1989,7 +1990,7 @@ const char* rv64_print(uint32_t opcode, uintptr_t addr)
     if ((opcode & 0x707f) == 0x1023) {
         a.rs2 = FX(opcode, 24, 20);
         a.rs1 = FX(opcode, 19, 15);
-        a.imm = a.imm = (FX(opcode, 31, 25) << 5) | (FX(opcode, 11, 7));
+        a.imm = (FX(opcode, 31, 25) << 5) | (FX(opcode, 11, 7));
         a.imm = SIGN_EXTEND(a.imm, 12);
 
         snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%x(%d)", "SH", gpr[a.rs2], gpr[a.rs1], a.imm, a.imm);
@@ -2225,7 +2226,7 @@ const char* rv64_print(uint32_t opcode, uintptr_t addr)
     if ((opcode & 0x707f) == 0x2023) {
         a.rs2 = FX(opcode, 24, 20);
         a.rs1 = FX(opcode, 19, 15);
-        a.imm = a.imm = (FX(opcode, 31, 25) << 5) | (FX(opcode, 11, 7));
+        a.imm = (FX(opcode, 31, 25) << 5) | (FX(opcode, 11, 7));
         a.imm = SIGN_EXTEND(a.imm, 12);
 
         snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%x(%d)", "SW", gpr[a.rs2], gpr[a.rs1], a.imm, a.imm);