diff options
| -rwxr-xr-x | src/dynarec/dynarec_arm64_66.c | 28 | ||||
| -rwxr-xr-x | src/dynarec/dynarec_arm64_emit_logic.c | 64 | ||||
| -rwxr-xr-x | src/dynarec/dynarec_arm64_helper.h | 2 |
3 files changed, 59 insertions, 35 deletions
diff --git a/src/dynarec/dynarec_arm64_66.c b/src/dynarec/dynarec_arm64_66.c index 401f80a3..8ac96026 100755 --- a/src/dynarec/dynarec_arm64_66.c +++ b/src/dynarec/dynarec_arm64_66.c @@ -81,6 +81,34 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin BFIx(xRAX, x1, 0, 16); break; + case 0x09: + INST_NAME("OR Ew, Gw"); + SETFLAGS(X_ALL, SF_SET); + nextop = F8; + GETGW(x2); + GETEW(x1, 0); + emit_or16(dyn, ninst, x1, x2, x4, x2); + EWBACK; + break; + case 0x0B: + INST_NAME("OR Gw, Ew"); + SETFLAGS(X_ALL, SF_SET); + nextop = F8; + GETGW(x1); + GETEW(x2, 0); + emit_or16(dyn, ninst, x1, x2, x4, x3); + GWBACK; + break; + case 0x0D: + INST_NAME("OR AX, Iw"); + SETFLAGS(X_ALL, SF_SET); + i32 = F16; + UXTHw(x1, xRAX); + MOV32w(x2, i32); + emit_or16(dyn, ninst, x1, x2, x3, x4); + BFIw(xRAX, x1, 0, 16); + break; + case 0x0F: addr = dynarec64_660F(dyn, addr, ip, ninst, rex, ok, need_epilog); break; diff --git a/src/dynarec/dynarec_arm64_emit_logic.c b/src/dynarec/dynarec_arm64_emit_logic.c index b9ead5d3..92742f77 100755 --- a/src/dynarec/dynarec_arm64_emit_logic.c +++ b/src/dynarec/dynarec_arm64_emit_logic.c @@ -435,40 +435,36 @@ void emit_and8c(dynarec_arm_t* dyn, int ninst, int s1, int32_t c, int s3, int s4 // emit OR16 instruction, from s1 , s2, store result in s1 using s3 and s4 as scratch, s4 can be same as s2 (and so s2 destroyed) -//void emit_or16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4) -//{ -// IFX(X_PEND) { -// STR_IMM9(s1, xEmu, offsetof(x64emu_t, op1)); -// STR_IMM9(s2, xEmu, offsetof(x64emu_t, op2)); -// SET_DF(s3, d_or16); -// } else IFX(X_ALL) { -// SET_DFNONE(s3); -// } -// IFX(X_ALL) { -// ORRS_REG_LSL_IMM5(s1, s1, s2, 0); -// } else { -// ORR_REG_LSL_IMM5(s1, s1, s2, 0); -// } -// IFX(X_PEND) { -// STR_IMM9(s1, xEmu, offsetof(x64emu_t, res)); -// } -// IFX(X_CF | X_AF | X_ZF) { -// BIC_IMM8(xFlags, xFlags, (1<<F_CF)|(1<<F_AF)|(1<<F_ZF), 0); -// } -// IFX(X_OF) { -// BIC_IMM8(xFlags, xFlags, 0b10, 0x0b); -// } -// IFX(X_ZF) { -// ORR_IMM8_COND(cEQ, xFlags, xFlags, 1<<F_ZF, 0); -// } -// IFX(X_SF) { -// MOV_REG_LSR_IMM5(s3, s1, 15); -// BFI(xFlags, s3, F_SF, 1); -// } -// IFX(X_PF) { -// emit_pf(dyn, ninst, s1, s3, s4); -// } -//} +void emit_or16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4) +{ + IFX(X_PEND) { + STRH_U12(s1, xEmu, offsetof(x64emu_t, op1)); + STRH_U12(s2, xEmu, offsetof(x64emu_t, op2)); + SET_DF(s3, d_or16); + } else IFX(X_ALL) { + SET_DFNONE(s3); + } + ORRw_REG(s1, s1, s2); + IFX(X_PEND) { + STRH_U12(s1, xEmu, offsetof(x64emu_t, res)); + } + IFX(X_CF | X_AF | X_OF) { + MOV32w(s3, (1<<F_CF)|(1<<F_AF)|(1<<F_OF)); + BICw(xFlags, xFlags, s3); + } + IFX(X_ZF) { + ANDSw_mask(s1, s1, 0, 15); //mask=0xffff + CSETw(s3, cEQ); + BFIw(xFlags, s3, F_ZF, 1); + } + IFX(X_SF) { + LSRw(s3, s1, 15); + BFIw(xFlags, s3, F_SF, 1); + } + IFX(X_PF) { + emit_pf(dyn, ninst, s1, s3, s4); + } +} // emit OR16 instruction, from s1 , constant c, store result in s1 using s3 and s4 as scratch //void emit_or16c(dynarec_arm_t* dyn, int ninst, int s1, int32_t c, int s3, int s4) diff --git a/src/dynarec/dynarec_arm64_helper.h b/src/dynarec/dynarec_arm64_helper.h index 339f7b05..4becf86f 100755 --- a/src/dynarec/dynarec_arm64_helper.h +++ b/src/dynarec/dynarec_arm64_helper.h @@ -664,7 +664,7 @@ void emit_add16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4); //void emit_add16c(dynarec_arm_t* dyn, int ninst, int s1, int32_t c, int s3, int s4); //void emit_sub16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4, int save_s4); //void emit_sub16c(dynarec_arm_t* dyn, int ninst, int s1, int32_t c, int s3, int s4); -//void emit_or16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4); +void emit_or16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4); //void emit_or16c(dynarec_arm_t* dyn, int ninst, int s1, int32_t c, int s3, int s4); //void emit_xor16(dynarec_arm_t* dyn, int ninst, int s1, int s2, int s3, int s4); //void emit_xor16c(dynarec_arm_t* dyn, int ninst, int s1, int32_t c, int s3, int s4); |