diff options
| -rwxr-xr-x | src/dynarec/arm64_emitter.h | 6 | ||||
| -rwxr-xr-x | src/dynarec/dynarec_arm64_660f.c | 12 |
2 files changed, 18 insertions, 0 deletions
diff --git a/src/dynarec/arm64_emitter.h b/src/dynarec/arm64_emitter.h index 74256e5d..92197a15 100755 --- a/src/dynarec/arm64_emitter.h +++ b/src/dynarec/arm64_emitter.h @@ -1256,6 +1256,12 @@ #define VUMULL2_8(Rd, Rn, Rm) EMIT(MULL_vector(1, 1, 0b00, Rm, Rn, Rd)) #define VUMULL2_16(Rd, Rn, Rm) EMIT(MULL_vector(1, 1, 0b01, Rm, Rn, Rd)) #define VUMULL2_32(Rd, Rn, Rm) EMIT(MULL_vector(1, 1, 0b10, Rm, Rn, Rd)) +#define VSMULL_8(Rd, Rn, Rm) EMIT(MULL_vector(0, 0, 0b00, Rm, Rn, Rd)) +#define VSMULL_16(Rd, Rn, Rm) EMIT(MULL_vector(0, 0, 0b01, Rm, Rn, Rd)) +#define VSMULL_32(Rd, Rn, Rm) EMIT(MULL_vector(0, 0, 0b10, Rm, Rn, Rd)) +#define VSMULL2_8(Rd, Rn, Rm) EMIT(MULL_vector(1, 0, 0b00, Rm, Rn, Rd)) +#define VSMULL2_16(Rd, Rn, Rm) EMIT(MULL_vector(1, 0, 0b01, Rm, Rn, Rd)) +#define VSMULL2_32(Rd, Rn, Rm) EMIT(MULL_vector(1, 0, 0b10, Rm, Rn, Rd)) // MUL #define MUL_vector(Q, size, Rm, Rn, Rd) ((Q)<<30 | 0b01110<<24 | (size)<<22 | 1<<21 | (Rm)<<16 | 0b10011<<11 | 1<<10 | (Rn)<<5 | (Rd)) diff --git a/src/dynarec/dynarec_arm64_660f.c b/src/dynarec/dynarec_arm64_660f.c index 67aa1d4c..4f7987ea 100755 --- a/src/dynarec/dynarec_arm64_660f.c +++ b/src/dynarec/dynarec_arm64_660f.c @@ -1049,6 +1049,18 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n UQSHRN_16(v0, q0, 16); UQSHRN2_16(v0, q1, 16); break; + case 0xE5: + INST_NAME("PMULHW Gx,Ex"); + nextop = F8; + GETGX(v0); + GETEX(v1, 0); + q0 = fpu_get_scratch(dyn); + q1 = fpu_get_scratch(dyn); + VSMULL_16(q0, v0, v1); + VSMULL2_16(q1, v0, v1); + SQSHRN_16(v0, q0, 16); + SQSHRN2_16(v0, q1, 16); + break; case 0xE8: INST_NAME("PSUBSB Gx,Ex"); |