diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_660f.c | 20 | ||||
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_avx_66_0f.c | 26 |
2 files changed, 14 insertions, 32 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_660f.c b/src/dynarec/arm64/dynarec_arm64_660f.c index a9ec0388..cb396e0e 100644 --- a/src/dynarec/arm64/dynarec_arm64_660f.c +++ b/src/dynarec/arm64/dynarec_arm64_660f.c @@ -1803,13 +1803,9 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n GETEX(v1, 0, 0); // FMIN/FMAX wll not copy the value if v0[x] is NaN // but x86 will copy if either v0[x] or v1[x] is NaN, so lets force a copy if source is NaN - if(BOX64ENV(dynarec_fastnan)) { - VFMINQD(v0, v0, v1); - } else { - q0 = fpu_get_scratch(dyn, ninst); - VFCMGTQD(q0, v1, v0); // 0 is NaN or v1 GT v0, so invert mask for copy - VBIFQ(v0, v1, q0); - } + q0 = fpu_get_scratch(dyn, ninst); + VFCMGTQD(q0, v1, v0); // 0 is NaN or v1 GT v0, so invert mask for copy + VBIFQ(v0, v1, q0); break; case 0x5E: INST_NAME("DIVPD Gx, Ex"); @@ -1838,13 +1834,9 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n GETEX(v1, 0, 0); // FMIN/FMAX wll not copy the value if v0[x] is NaN // but x86 will copy if either v0[x] or v1[x] is NaN, or if values are equals, so lets force a copy if source is NaN - if(BOX64ENV(dynarec_fastnan)) { - VFMAXQD(v0, v0, v1); - } else { - q0 = fpu_get_scratch(dyn, ninst); - VFCMGTQD(q0, v0, v1); // 0 is NaN or v0 GT v1, so invert mask for copy - VBIFQ(v0, v1, q0); - } + q0 = fpu_get_scratch(dyn, ninst); + VFCMGTQD(q0, v0, v1); // 0 is NaN or v0 GT v1, so invert mask for copy + VBIFQ(v0, v1, q0); break; case 0x60: INST_NAME("PUNPCKLBW Gx, Ex"); diff --git a/src/dynarec/arm64/dynarec_arm64_avx_66_0f.c b/src/dynarec/arm64/dynarec_arm64_avx_66_0f.c index 33620d65..b5b4736d 100644 --- a/src/dynarec/arm64/dynarec_arm64_avx_66_0f.c +++ b/src/dynarec/arm64/dynarec_arm64_avx_66_0f.c @@ -493,19 +493,14 @@ uintptr_t dynarec64_AVX_66_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, case 0x5D: INST_NAME("VMINPD Gx, Vx, Ex"); nextop = F8; - if(!BOX64ENV(dynarec_fastnan)) - q0 = fpu_get_scratch(dyn, ninst); + q0 = fpu_get_scratch(dyn, ninst); for(int l=0; l<1+vex.l; ++l) { if(!l) { GETGX_empty_VXEX(v0, v2, v1, 0); } else { GETGY_empty_VYEY(v0, v2, v1); } // FMIN/FMAX wll not copy a NaN if either is NaN // but x86 will copy src2 if either value is NaN, so lets force a copy of Src2 (Ex) if result is NaN - if(BOX64ENV(dynarec_fastnan)) { - VFMINQD(v0, v2, v1); - } else { - VFCMGTQD(q0, v1, v2); // 0 if NaN or v1 GT v2, so invert mask for copy - if(v0!=v1) VBIFQ(v0, v1, q0); - if(v0!=v2) VBITQ(v0, v2, q0); - } + VFCMGTQD(q0, v1, v2); // 0 if NaN or v1 GT v2, so invert mask for copy + if(v0!=v1) VBIFQ(v0, v1, q0); + if(v0!=v2) VBITQ(v0, v2, q0); } if(!vex.l) YMM0(gd); break; @@ -536,19 +531,14 @@ uintptr_t dynarec64_AVX_66_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, case 0x5F: INST_NAME("VMAXPD Gx, Vx, Ex"); nextop = F8; - if(!BOX64ENV(dynarec_fastnan)) - q0 = fpu_get_scratch(dyn, ninst); + q0 = fpu_get_scratch(dyn, ninst); for(int l=0; l<1+vex.l; ++l) { if(!l) { GETGX_empty_VXEX(v0, v2, v1, 0); } else { GETGY_empty_VYEY(v0, v2, v1); } // FMIN/FMAX wll not copy a NaN if either is NaN // but x86 will copy src2 if either value is NaN, so lets force a copy of Src2 (Ex) if result is NaN - if(BOX64ENV(dynarec_fastnan)) { - VFMAXQD(v0, v2, v1); - } else { - VFCMGTQD(q0, v2, v1); // 0 if NaN or v2 GT v1, so invert mask for copy - if(v0!=v1) VBIFQ(v0, v1, q0); - if(v0!=v2) VBITQ(v0, v2, q0); - } + VFCMGTQD(q0, v2, v1); // 0 if NaN or v2 GT v1, so invert mask for copy + if(v0!=v1) VBIFQ(v0, v1, q0); + if(v0!=v2) VBITQ(v0, v2, q0); } if(!vex.l) YMM0(gd); break; |