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-rw-r--r--src/dynarec/arm64/dynarec_arm64_0f.c4
-rw-r--r--src/dynarec/arm64/dynarec_arm64_660f.c6
2 files changed, 6 insertions, 4 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_0f.c b/src/dynarec/arm64/dynarec_arm64_0f.c
index c8df4f9f..927a06d4 100644
--- a/src/dynarec/arm64/dynarec_arm64_0f.c
+++ b/src/dynarec/arm64/dynarec_arm64_0f.c
@@ -2331,7 +2331,7 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             nextop = F8;

             GETED(0);

             GETGD;

-            if(ed!=gd)

+            if(!MODREG)

                 MOVxw_REG(gd, ed);  // to handle ed=0, setting UD gd to 0

             IFX(X_ZF) {

                 TSTxw_REG(ed, ed);

@@ -2367,7 +2367,7 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             nextop = F8;

             GETED(0);

             GETGD;

-            if(ed!=gd)

+            if(!MODREG)

                 MOVxw_REG(gd, ed);  // to handle ed=0, setting UD gd to 0

             IFX(X_ZF) {

                 TSTxw_REG(ed, ed);

diff --git a/src/dynarec/arm64/dynarec_arm64_660f.c b/src/dynarec/arm64/dynarec_arm64_660f.c
index 546af8f4..a9ec0388 100644
--- a/src/dynarec/arm64/dynarec_arm64_660f.c
+++ b/src/dynarec/arm64/dynarec_arm64_660f.c
@@ -2753,8 +2753,9 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             }

             RBITw(x1, x1);   // reverse

             CLZw(x1, x1);    // x2 gets leading 0 == BSF

-            MARK;

+            if(!MODREG) MARK;   // value gets written on 0 input only if input is a memory it seems

             BFIx(gd, x1, 0, 16);

+            if(MODREG) MARK;

             IFX(X_ZF) {

                 IFNATIVE(NF_EQ) {} else {

                     CSETw(x2, cEQ);    //ZF not set

@@ -2790,8 +2791,9 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             CLZw(x2, x1);       // x2 gets leading 0

             SUBw_U12(x2, x2, 15);

             NEGw_REG(x1, x2);   // complement

-            MARK;

+            if(!MODREG) MARK;

             BFIx(gd, x1, 0, 16);

+            if(MODREG) MARK;

             IFX(X_ZF) {

                 IFNATIVE(NF_EQ) {} else {

                     CSETw(x2, cEQ);    //ZF not set