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-rw-r--r--src/dynarec/la64/dynarec_la64_0f.c2
-rw-r--r--src/dynarec/la64/la64_emitter.h10
2 files changed, 11 insertions, 1 deletions
diff --git a/src/dynarec/la64/dynarec_la64_0f.c b/src/dynarec/la64/dynarec_la64_0f.c
index 6bd7c3d4..e994203d 100644
--- a/src/dynarec/la64/dynarec_la64_0f.c
+++ b/src/dynarec/la64/dynarec_la64_0f.c
@@ -278,7 +278,7 @@ uintptr_t dynarec64_0F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni
                 ed = x1;
             }
             ANDI(x2, gd, rex.w ? 0x3f : 0x1f);
-            SRLIxw(x4, ed, x2);
+            SRLxw(x4, ed, x2);
             if (la64_lbt)
                 X64_SET_EFLAGS(x4, X_CF);
             else
diff --git a/src/dynarec/la64/la64_emitter.h b/src/dynarec/la64/la64_emitter.h
index 49b3b985..be91b960 100644
--- a/src/dynarec/la64/la64_emitter.h
+++ b/src/dynarec/la64/la64_emitter.h
@@ -279,6 +279,16 @@ f24-f31  fs0-fs7   Static registers                Callee
         }                      \
     } while (0)
 
+#define SRLxw(rd, rj, rk)      \
+    do {                       \
+        if (rex.w) {           \
+            SRL_D(rd, rj, rk); \
+        } else {               \
+            SRL_W(rd, rj, rk); \
+            ZEROUP(rd);        \
+        }                      \
+    } while (0)
+
 // Shift Left Immediate
 #define SLLIxw(rd, rs1, imm)      \
     do {                          \