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-rwxr-xr-xsrc/dynarec/arm64/dynarec_arm64_00.c5
-rwxr-xr-xsrc/dynarec/arm64/dynarec_arm64_0f.c5
-rw-r--r--src/dynarec/arm64/dynarec_arm64_64.c14
-rwxr-xr-xsrc/dynarec/arm64/dynarec_arm64_66.c14
-rwxr-xr-xsrc/dynarec/arm64/dynarec_arm64_660f.c5
-rw-r--r--src/dynarec/arm64/dynarec_arm64_6664.c14
-rw-r--r--src/dynarec/arm64/dynarec_arm64_66f0.c14
-rwxr-xr-xsrc/dynarec/arm64/dynarec_arm64_67.c7
-rw-r--r--src/dynarec/arm64/dynarec_arm64_f0.c14
-rwxr-xr-xsrc/dynarec/arm64/dynarec_arm64_f20f.c5
-rwxr-xr-xsrc/dynarec/arm64/dynarec_arm64_f30f.c5
-rwxr-xr-xsrc/dynarec/dynarec_native_pass.c15
-rw-r--r--src/dynarec/rv64/dynarec_rv64_00.c6
13 files changed, 95 insertions, 28 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_00.c b/src/dynarec/arm64/dynarec_arm64_00.c
index 11888786..5ba08514 100755
--- a/src/dynarec/arm64/dynarec_arm64_00.c
+++ b/src/dynarec/arm64/dynarec_arm64_00.c
@@ -52,6 +52,11 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
     MAYUSE(lock);
     MAYUSE(cacheupd);
 
+    if(rex.is32bits) {
+        DEFAULT;
+        return ip;
+    }
+
     switch(opcode) {
         case 0x00:
             INST_NAME("ADD Eb, Gb");
diff --git a/src/dynarec/arm64/dynarec_arm64_0f.c b/src/dynarec/arm64/dynarec_arm64_0f.c
index b19c6590..c5ebf3d6 100755
--- a/src/dynarec/arm64/dynarec_arm64_0f.c
+++ b/src/dynarec/arm64/dynarec_arm64_0f.c
@@ -57,6 +57,11 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
     static const int8_t mask_shift8[] = { -7, -6, -5, -4, -3, -2, -1, 0 };

     #endif

 

+    if(rex.is32bits) {

+        DEFAULT;

+        return addr;

+    }

+

     switch(opcode) {

 

         case 0x01:

diff --git a/src/dynarec/arm64/dynarec_arm64_64.c b/src/dynarec/arm64/dynarec_arm64_64.c
index a0f71704..8990a2f7 100644
--- a/src/dynarec/arm64/dynarec_arm64_64.c
+++ b/src/dynarec/arm64/dynarec_arm64_64.c
@@ -52,16 +52,22 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
     MAYUSE(v0);
     MAYUSE(v1);
 
+    if(rex.is32bits) {
+        DEFAULT;
+        return addr;
+    }
+
     while((opcode==0xF2) || (opcode==0xF3)) {
         rep = opcode-0xF1;
         opcode = F8;
     }
     // REX prefix before the F0 are ignored
     rex.rex = 0;
-    while(opcode>=0x40 && opcode<=0x4f) {
-        rex.rex = opcode;
-        opcode = F8;
-    }
+    if(!rex.is32bits)
+        while(opcode>=0x40 && opcode<=0x4f) {
+            rex.rex = opcode;
+            opcode = F8;
+        }
 
     switch(opcode) {
 
diff --git a/src/dynarec/arm64/dynarec_arm64_66.c b/src/dynarec/arm64/dynarec_arm64_66.c
index fa69a836..e7c6e857 100755
--- a/src/dynarec/arm64/dynarec_arm64_66.c
+++ b/src/dynarec/arm64/dynarec_arm64_66.c
@@ -43,6 +43,11 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
     MAYUSE(j64);

     MAYUSE(lock);

 

+    if(rex.is32bits) {

+        DEFAULT;

+        return addr;

+    }

+

     while((opcode==0x2E) || (opcode==0x36) || (opcode==0x66))   // ignoring CS:, SS: or multiple 0x66

         opcode = F8;

 

@@ -52,10 +57,11 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
     }

     // REX prefix before the 66 are ignored

     rex.rex = 0;

-    while(opcode>=0x40 && opcode<=0x4f) {

-        rex.rex = opcode;

-        opcode = F8;

-    }

+    if(!rex.is32bits)

+        while(opcode>=0x40 && opcode<=0x4f) {

+            rex.rex = opcode;

+            opcode = F8;

+        }

 

     if(rex.w && opcode!=0x0f)   // rex.w cancels "66", but not for 66 0f type of prefix

         return dynarec64_00(dyn, addr-1, ip, ninst, rex, rep, ok, need_epilog); // addr-1, to "put back" opcode

diff --git a/src/dynarec/arm64/dynarec_arm64_660f.c b/src/dynarec/arm64/dynarec_arm64_660f.c
index 243bd288..4e62d8c7 100755
--- a/src/dynarec/arm64/dynarec_arm64_660f.c
+++ b/src/dynarec/arm64/dynarec_arm64_660f.c
@@ -52,6 +52,11 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
     static const int8_t round_round[] = { 0, 2, 1, 3};

     #endif

 

+    if(rex.is32bits) {

+        DEFAULT;

+        return addr;

+    }

+

     switch(opcode) {

 

         case 0x10:

diff --git a/src/dynarec/arm64/dynarec_arm64_6664.c b/src/dynarec/arm64/dynarec_arm64_6664.c
index 29997ae7..22721a8a 100644
--- a/src/dynarec/arm64/dynarec_arm64_6664.c
+++ b/src/dynarec/arm64/dynarec_arm64_6664.c
@@ -37,12 +37,18 @@ uintptr_t dynarec64_6664(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
     int unscaled;
     MAYUSE(j64);
 
+    if(rex.is32bits) {
+        DEFAULT;
+        return addr;
+    }
+
     // REX prefix before the 66 are ignored
     rex.rex = 0;
-    while(opcode>=0x40 && opcode<=0x4f) {
-        rex.rex = opcode;
-        opcode = F8;
-    }
+    if(!rex.is32bits)
+        while(opcode>=0x40 && opcode<=0x4f) {
+            rex.rex = opcode;
+            opcode = F8;
+        }
 
     /*if(rex.w && opcode!=0x0f) {   // rex.w cancels "66", but not for 66 0f type of prefix
         MESSAGE(LOG_DUMP, "Here!\n");
diff --git a/src/dynarec/arm64/dynarec_arm64_66f0.c b/src/dynarec/arm64/dynarec_arm64_66f0.c
index 40462452..9d86be29 100644
--- a/src/dynarec/arm64/dynarec_arm64_66f0.c
+++ b/src/dynarec/arm64/dynarec_arm64_66f0.c
@@ -41,16 +41,22 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
     MAYUSE(wb2);
     MAYUSE(j64);
 
+    if(rex.is32bits) {
+        DEFAULT;
+        return addr;
+    }
+
     while((opcode==0xF2) || (opcode==0xF3)) {
         rep = opcode-0xF1;
         opcode = F8;
     }
     // REX prefix before the F0/66 are ignored
     rex.rex = 0;
-    while(opcode>=0x40 && opcode<=0x4f) {
-        rex.rex = opcode;
-        opcode = F8;
-    }
+    if(!rex.is32bits)
+        while(opcode>=0x40 && opcode<=0x4f) {
+            rex.rex = opcode;
+            opcode = F8;
+        }
 
     switch(opcode) {
         case 0x09:
diff --git a/src/dynarec/arm64/dynarec_arm64_67.c b/src/dynarec/arm64/dynarec_arm64_67.c
index 7ad89285..23acc59b 100755
--- a/src/dynarec/arm64/dynarec_arm64_67.c
+++ b/src/dynarec/arm64/dynarec_arm64_67.c
@@ -56,6 +56,13 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
     MAYUSE(lock);

     MAYUSE(cacheupd);

 

+    if(rex.is32bits) {

+        // should do a different file

+        DEFAULT;

+        return addr;

+    }

+

+

     // REX prefix before the 67 are ignored

     rex.rex = 0;

     while(opcode>=0x40 && opcode<=0x4f) {

diff --git a/src/dynarec/arm64/dynarec_arm64_f0.c b/src/dynarec/arm64/dynarec_arm64_f0.c
index d9c17dbc..28036e18 100644
--- a/src/dynarec/arm64/dynarec_arm64_f0.c
+++ b/src/dynarec/arm64/dynarec_arm64_f0.c
@@ -43,16 +43,22 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
     MAYUSE(wb2);
     MAYUSE(j64);
 
+    if(rex.is32bits) {
+        DEFAULT;
+        return addr;
+    }
+
     while((opcode==0xF2) || (opcode==0xF3)) {
         rep = opcode-0xF1;
         opcode = F8;
     }
     // REX prefix before the F0 are ignored
     rex.rex = 0;
-    while(opcode>=0x40 && opcode<=0x4f) {
-        rex.rex = opcode;
-        opcode = F8;
-    }
+    if(!rex.is32bits)
+        while(opcode>=0x40 && opcode<=0x4f) {
+            rex.rex = opcode;
+            opcode = F8;
+        }
 
     switch(opcode) {
         case 0x00:
diff --git a/src/dynarec/arm64/dynarec_arm64_f20f.c b/src/dynarec/arm64/dynarec_arm64_f20f.c
index 17f95f4c..e9b2ccc3 100755
--- a/src/dynarec/arm64/dynarec_arm64_f20f.c
+++ b/src/dynarec/arm64/dynarec_arm64_f20f.c
@@ -44,6 +44,11 @@ uintptr_t dynarec64_F20F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
     MAYUSE(v0);

     MAYUSE(v1);

 

+    if(rex.is32bits) {

+        DEFAULT;

+        return addr;

+    }

+

     switch(opcode) {

 

         case 0x10:

diff --git a/src/dynarec/arm64/dynarec_arm64_f30f.c b/src/dynarec/arm64/dynarec_arm64_f30f.c
index 5b3aa85e..bfa16cd8 100755
--- a/src/dynarec/arm64/dynarec_arm64_f30f.c
+++ b/src/dynarec/arm64/dynarec_arm64_f30f.c
@@ -46,6 +46,11 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
     MAYUSE(v1);

     MAYUSE(j64);

 

+    if(rex.is32bits) {

+        DEFAULT;

+        return addr;

+    }

+

     switch(opcode) {

 

         case 0x10:

diff --git a/src/dynarec/dynarec_native_pass.c b/src/dynarec/dynarec_native_pass.c
index 90501bd6..b141a230 100755
--- a/src/dynarec/dynarec_native_pass.c
+++ b/src/dynarec/dynarec_native_pass.c
@@ -49,9 +49,6 @@ uintptr_t native_pass(dynarec_native_t* dyn, uintptr_t addr, int is32bits)
     int reset_n = -1;
     dyn->last_ip = (dyn->insts && dyn->insts[0].pred_sz)?0:ip;  // RIP is always set at start of block unless there is a predecessor!
     int stopblock = 2+(FindElfAddress(my_context, addr)?0:1); // if block is in elf_memory, it can be extended with bligblocks==2, else it needs 3
-    // disbling 32bits blocks for now
-    if(is32bits)
-        return addr;
     // ok, go now
     INIT;
     while(ok) {
@@ -121,11 +118,13 @@ uintptr_t native_pass(dynarec_native_t* dyn, uintptr_t addr, int is32bits)
             pk = PK(0);
         }
         rex.rex = 0;
-        while(pk>=0x40 && pk<=0x4f) {
-            rex.rex = pk;
-            ++addr;
-            pk = PK(0);
-        }
+        rex.is32bits = is32bits;
+        if(!rex.is32bits)
+            while(pk>=0x40 && pk<=0x4f) {
+                rex.rex = pk;
+                ++addr;
+                pk = PK(0);
+            }
 
         addr = dynarec64_00(dyn, addr, ip, ninst, rex, rep, &ok, &need_epilog);
 
diff --git a/src/dynarec/rv64/dynarec_rv64_00.c b/src/dynarec/rv64/dynarec_rv64_00.c
index f5bd8af7..e2442ac6 100644
--- a/src/dynarec/rv64/dynarec_rv64_00.c
+++ b/src/dynarec/rv64/dynarec_rv64_00.c
@@ -32,6 +32,12 @@ uintptr_t dynarec64_00(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni
 {
     uint8_t opcode;
 
+
+    if(rex.is32bits) {
+        DEFAULT;
+        return ip;
+    }
+
     opcode = PK(0);
     switch(opcode) {
         case 0x00 ... 0x3f: addr = dynarec64_00_0(dyn, addr, ip, ninst, rex, rep, ok, need_epilog); break;