3 files changed, 34 insertions, 3 deletions
diff --git a/src/dynarec/arm64_emitter.h b/src/dynarec/arm64_emitter.h
index 3c3a822f..fd757fb7 100755
--- a/src/dynarec/arm64_emitter.h
+++ b/src/dynarec/arm64_emitter.h
@@ -603,8 +603,17 @@
 #define VFADDQD(Vd, Vn, Vm)         EMIT(FADD_vector(1, 0, 1, Vm, Vn, Vd))
 #define VFADDS(Dd, Dn, Dm)          EMIT(FADD_vector(0, 0, 0, Dm, Dn, Dd))
 
-#define FADD_scalar(type, Rm, op, Rn, Rd)   (0b11110<<24 | (type)<<22 | 1<<21 | (Rm)<<16 | 0b001<<13 | (op)<<12 | 0b10<<10 | (Rn)<<5 | (Rd))
-#define FADDS(Sd, Sn, Sm)           EMIT(FADD_scalar(0b00, Sm, 0, Sn, Sd))
-#define FADDD(Dd, Dn, Dm)           EMIT(FADD_scalar(0b01, Dm, 0, Dn, Dd))
+#define FADDSUB_scalar(type, Rm, op, Rn, Rd)    (0b11110<<24 | (type)<<22 | 1<<21 | (Rm)<<16 | 0b001<<13 | (op)<<12 | 0b10<<10 | (Rn)<<5 | (Rd))
+#define FADDS(Sd, Sn, Sm)           EMIT(FADDSUB_scalar(0b00, Sm, 0, Sn, Sd))
+#define FADDD(Dd, Dn, Dm)           EMIT(FADDSUB_scalar(0b01, Dm, 0, Dn, Dd))
+
+// SUB
+#define FSUB_vector(Q, U, sz, Rm, Rn, Rd)   ((Q)<<30 | (U)<<29 | 0b01110<<24 | 1<<23 | (sz)<<22 | 1<<21 | (Rm)<<16 | 0b11010<<11 | 1<<10 | (Rn)<<5 | (Rd))
+#define VFSUBQS(Vd, Vn, Vm)         EMIT(FSUB_vector(1, 0, 0, Vm, Vn, Vd))
+#define VFSUBQD(Vd, Vn, Vm)         EMIT(FSUB_vector(1, 0, 1, Vm, Vn, Vd))
+#define VFSUBS(Dd, Dn, Dm)          EMIT(FSUB_vector(0, 0, 0, Dm, Dn, Dd))
+
+#define FSUBS(Sd, Sn, Sm)           EMIT(FADDSUB_scalar(0b00, Sm, 1, Sn, Sd))
+#define FSUBD(Dd, Dn, Dm)           EMIT(FADDSUB_scalar(0b01, Dm, 1, Dn, Dd))
 
 #endif  //__ARM64_EMITTER_H__
diff --git a/src/dynarec/arm64_printer.c b/src/dynarec/arm64_printer.c
index 145eb1a4..6a7c2f58 100755
--- a/src/dynarec/arm64_printer.c
+++ b/src/dynarec/arm64_printer.c
@@ -800,6 +800,19 @@ const char* arm64_print(uint32_t opcode, uintptr_t addr)
         return buff;
     }
 
+    // FSUB
+    if(isMask(opcode, "0Q0011101f1mmmmm110101nnnnnddddd", &a)) {
+        char s = a.Q?'V':'D';
+        char d = sf?'D':'S';
+        int n = (a.Q && !sf)?4:2;
+        snprintf(buff, sizeof(buff), "VFSUB %c%d.%d%c, %c%d.%d%c, %c%d.%c%d", s, Rd, n, d, s, Rn, n, d, s, Rm, s, d);
+        return buff;
+    }
+    if(isMask(opcode, "00011110ff1mmmmm001110nnnnnddddd", &a)) {
+        char s = (sf==0)?'S':((sf==1)?'D':'?');
+        snprintf(buff, sizeof(buff), "FSUB %c%d, %c%d, %c%d", s, Rd, s, Rn, s, Rm);
+        return buff;
+    }
 
     snprintf(buff, sizeof(buff), "%08X ???", __builtin_bswap32(opcode));
     return buff;
diff --git a/src/dynarec/dynarec_arm64_f20f.c b/src/dynarec/dynarec_arm64_f20f.c
index 1ca91b65..469cc687 100755
--- a/src/dynarec/dynarec_arm64_f20f.c
+++ b/src/dynarec/dynarec_arm64_f20f.c
@@ -106,6 +106,15 @@ uintptr_t dynarec64_F20F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             FADDD(v0, v0, d0);
             break;
 
+        case 0x5C:
+            INST_NAME("SUBSD Gx, Ex");
+            nextop = F8;
+            GETGX;
+            v0 = sse_get_reg(dyn, ninst, x1, gd);
+            GETEX(d0, 0);
+            FSUBD(v0, v0, d0);
+            break;
+
         default:
             DEFAULT;
     }