diff options
Diffstat (limited to 'src')
| -rwxr-xr-x | src/dynarec/dynarec_arm64_f20f.c | 11 | ||||
| -rwxr-xr-x | src/dynarec/dynarec_arm64_f30f.c | 11 | ||||
| -rw-r--r-- | src/emu/x64runf20f.c | 2 |
3 files changed, 11 insertions, 13 deletions
diff --git a/src/dynarec/dynarec_arm64_f20f.c b/src/dynarec/dynarec_arm64_f20f.c index ef709d02..4064b004 100755 --- a/src/dynarec/dynarec_arm64_f20f.c +++ b/src/dynarec/dynarec_arm64_f20f.c @@ -288,14 +288,13 @@ uintptr_t dynarec64_F20F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n FCMPD(v0, v1); } switch(u8&7) { - case 0: CSETMx(x2, cEQ); break; // Equal - case 1: CSETMx(x2, cMI); break; // Less than - case 2: //CSETMx(x2, cLE); break; // Less or equal (or unordered on ARM64, not on x86...) - CSETMx(x2, cPL); CSINVx(x2, xZR, x2, cEQ); break; // so use a 2 step here, but 1st test inverted because 2nd step invert again + case 0: CSETMx(x2, cEQ); CSELx(x2, xZR, x2, cVS); break; // Equal + case 1: CSETMx(x2, cMI); CSELx(x2, xZR, x2, cVS); break; // Less than + case 2: CSETMx(x2, cLE); CSELx(x2, xZR, x2, cVS); break; // Less or equal case 3: CSETMx(x2, cVS); break; // NaN - case 4: CSETMx(x2, cNE); break; // Not Equal (or unordered on ARM, not on X86...) + case 4: CSETMx(x2, cNE); break; // Not Equal case 5: CSETMx(x2, cCS); break; // Greater or equal or unordered - case 6: CSETMx(x2, cLT); break; // Greater or unordered, test inverted, N!=V so unordereded or less than (inverted) + case 6: CSETMx(x2, cLT); break; // Greater or unordered, test inverted, N!=V so unordered or less than (inverted) case 7: CSETMx(x2, cVC); break; // not NaN } VMOVQDfrom(v0, 0, x2); diff --git a/src/dynarec/dynarec_arm64_f30f.c b/src/dynarec/dynarec_arm64_f30f.c index 2df33bcf..b8479d5c 100755 --- a/src/dynarec/dynarec_arm64_f30f.c +++ b/src/dynarec/dynarec_arm64_f30f.c @@ -376,14 +376,13 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n FCMPS(v0, v1); } switch(u8&7) { - case 0: CSETMw(x2, cEQ); break; // Equal - case 1: CSETMw(x2, cMI); break; // Less than - case 2: //CSETMw(x2, cLE); break; // Less or equal (or unordered on ARM64, not on x86...) - CSETMw(x2, cPL); CSINVw(x2, xZR, x2, cEQ); break; // so use a 2 step here, but 1st test inverted because 2nd step invert again + case 0: CSETMw(x2, cEQ); CSELw(x2, xZR, x2, cVS); break; // Equal + case 1: CSETMw(x2, cMI); CSELw(x2, xZR, x2, cVS); break; // Less than + case 2: CSETMw(x2, cLE); CSELw(x2, xZR, x2, cVS); break; // Less or equal case 3: CSETMw(x2, cVS); break; // NaN - case 4: CSETMw(x2, cNE); break; // Not Equal (or unordered on ARM, not on X86...) + case 4: CSETMw(x2, cNE); break; // Not Equal case 5: CSETMw(x2, cCS); break; // Greater or equal or unordered - case 6: CSETMw(x2, cLT); break; // Greater or unordered, test inverted, N!=V so unordereded or less than (inverted) + case 6: CSETMw(x2, cLT); break; // Greater or unordered, test inverted, N!=V so unordered or less than (inverted) case 7: CSETMw(x2, cVC); break; // not NaN } VMOVQSfrom(v0, 0, x2); diff --git a/src/emu/x64runf20f.c b/src/emu/x64runf20f.c index 766a69f8..7bf3c99e 100644 --- a/src/emu/x64runf20f.c +++ b/src/emu/x64runf20f.c @@ -212,7 +212,7 @@ int RunF20F(x64emu_t *emu, rex_t rex) case 0xC2: /* CMPSD Gx, Ex, Ib */ nextop = F8; - GETEX(0); + GETEX(1); GETGX; tmp8u = F8; tmp8s = 0; |