diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_functions.c | 6 | ||||
| -rw-r--r-- | src/dynarec/arm64/dynarec_arm64_private.h | 1 | ||||
| -rw-r--r-- | src/dynarec/la64/dynarec_la64_functions.c | 7 | ||||
| -rw-r--r-- | src/dynarec/la64/dynarec_la64_private.h | 2 | ||||
| -rw-r--r-- | src/dynarec/rv64/dynarec_rv64_functions.c | 8 | ||||
| -rw-r--r-- | src/dynarec/rv64/dynarec_rv64_private.h | 2 |
6 files changed, 0 insertions, 26 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_functions.c b/src/dynarec/arm64/dynarec_arm64_functions.c index d17eee5f..620c8807 100644 --- a/src/dynarec/arm64/dynarec_arm64_functions.c +++ b/src/dynarec/arm64/dynarec_arm64_functions.c @@ -182,7 +182,6 @@ int is_ymm_to_keep(dynarec_arm_t* dyn, int reg, int k1, int k2, int k3) // Reset fpu regs counter static void fpu_reset_reg_neoncache(neoncache_t* n) { - n->fpu_reg = 0; for (int i=0; i<32; ++i) { n->fpuused[i]=0; n->neoncache[i].v = 0; @@ -563,7 +562,6 @@ void neoncacheUnwind(neoncache_t* cache) // And now, rebuild the x87cache info with neoncache cache->mmxcount = 0; cache->fpu_scratch = 0; - cache->fpu_reg = 0; for(int i=0; i<8; ++i) { cache->x87cache[i] = -1; cache->mmxcache[i] = -1; @@ -579,13 +577,11 @@ void neoncacheUnwind(neoncache_t* cache) case NEON_CACHE_MM: cache->mmxcache[cache->neoncache[i].n] = i; ++cache->mmxcount; - ++cache->fpu_reg; break; case NEON_CACHE_XMMR: case NEON_CACHE_XMMW: cache->ssecache[cache->neoncache[i].n].reg = i; cache->ssecache[cache->neoncache[i].n].write = (cache->neoncache[i].t==NEON_CACHE_XMMW)?1:0; - ++cache->fpu_reg; break; case NEON_CACHE_YMMR: case NEON_CACHE_YMMW: @@ -597,7 +593,6 @@ void neoncacheUnwind(neoncache_t* cache) cache->x87cache[x87reg] = cache->neoncache[i].n; cache->x87reg[x87reg] = i; ++x87reg; - ++cache->fpu_reg; break; case NEON_CACHE_SCR: cache->fpuused[i] = 0; @@ -617,7 +612,6 @@ void neoncacheUnwind(neoncache_t* cache) cache->neoncache[reg].n = i; cache->ssecache[i].reg = reg; cache->ssecache[i].write = (cache->xmm_write&(1<<i))?1:0; - ++cache->fpu_reg; } cache->xmm_write = cache->xmm_removed = 0; } diff --git a/src/dynarec/arm64/dynarec_arm64_private.h b/src/dynarec/arm64/dynarec_arm64_private.h index 2d8a236c..6b569ff4 100644 --- a/src/dynarec/arm64/dynarec_arm64_private.h +++ b/src/dynarec/arm64/dynarec_arm64_private.h @@ -72,7 +72,6 @@ typedef struct neoncache_s { int8_t x87stack; // cache stack counter int8_t mmxcount; // number of mmx register used (not both mmx and x87 at the same time) int8_t fpu_scratch; // scratch counter - int8_t fpu_reg; // x87/sse/mmx reg counter uint16_t xmm_write; // 1bit of xmmXX removed write uint16_t xmm_removed; // 1bit if xmmXX was removed uint16_t xmm_used; // mask of the xmm regs used in this opcode diff --git a/src/dynarec/la64/dynarec_la64_functions.c b/src/dynarec/la64/dynarec_la64_functions.c index 2cb1b8dd..f2674483 100644 --- a/src/dynarec/la64/dynarec_la64_functions.c +++ b/src/dynarec/la64/dynarec_la64_functions.c @@ -90,7 +90,6 @@ int fpu_get_reg_ymm(dynarec_la64_t* dyn, int t, int ymm) // Reset fpu regs counter static void fpu_reset_reg_lsxcache(lsxcache_t* lsx) { - lsx->fpu_reg = 0; for (int i = 0; i < 24; ++i) { lsx->fpuused[i] = 0; lsx->lsxcache[i].v = 0; @@ -229,8 +228,6 @@ void lsxcacheUnwind(lsxcache_t* cache) // And now, rebuild the x87cache info with lsxcache cache->mmxcount = 0; cache->fpu_scratch = 0; - cache->fpu_extra_qscratch = 0; - cache->fpu_reg = 0; for (int i = 0; i < 8; ++i) { cache->x87cache[i] = -1; cache->mmxcache[i] = -1; @@ -248,19 +245,16 @@ void lsxcacheUnwind(lsxcache_t* cache) case LSX_CACHE_MM: cache->mmxcache[cache->lsxcache[i].n] = i; ++cache->mmxcount; - ++cache->fpu_reg; break; case LSX_CACHE_XMMR: case LSX_CACHE_XMMW: cache->ssecache[cache->lsxcache[i].n].reg = i; cache->ssecache[cache->lsxcache[i].n].write = (cache->lsxcache[i].t == LSX_CACHE_XMMW) ? 1 : 0; - ++cache->fpu_reg; break; case LSX_CACHE_YMMR: case LSX_CACHE_YMMW: cache->avxcache[cache->lsxcache[i].n].reg = i; cache->avxcache[cache->lsxcache[i].n].write = (cache->lsxcache[i].t == LSX_CACHE_YMMW) ? 1 : 0; - ++cache->fpu_reg; break; case LSX_CACHE_ST_F: case LSX_CACHE_ST_D: @@ -268,7 +262,6 @@ void lsxcacheUnwind(lsxcache_t* cache) cache->x87cache[x87reg] = cache->lsxcache[i].n; cache->x87reg[x87reg] = i; ++x87reg; - ++cache->fpu_reg; break; case LSX_CACHE_SCR: cache->fpuused[i] = 0; diff --git a/src/dynarec/la64/dynarec_la64_private.h b/src/dynarec/la64/dynarec_la64_private.h index 8f433fe5..a47ab362 100644 --- a/src/dynarec/la64/dynarec_la64_private.h +++ b/src/dynarec/la64/dynarec_la64_private.h @@ -74,8 +74,6 @@ typedef struct lsxcache_s { int8_t x87stack; // cache stack counter int8_t mmxcount; // number of mmx register used (not both mmx and x87 at the same time) int8_t fpu_scratch; // scratch counter - int8_t fpu_extra_qscratch; // some opcode need an extra quad scratch register - int8_t fpu_reg; // x87/sse/mmx reg counter } lsxcache_t; typedef struct flagcache_s { diff --git a/src/dynarec/rv64/dynarec_rv64_functions.c b/src/dynarec/rv64/dynarec_rv64_functions.c index 22092498..e86e0a0c 100644 --- a/src/dynarec/rv64/dynarec_rv64_functions.c +++ b/src/dynarec/rv64/dynarec_rv64_functions.c @@ -99,7 +99,6 @@ int fpu_get_reg_xmm(dynarec_rv64_t* dyn, int t, int xmm) // Reset fpu regs counter static void fpu_reset_reg_extcache(dynarec_rv64_t* dyn, extcache_t* e) { - e->fpu_reg = 0; for (int i = 0; i < 32; ++i) { e->fpuused[i] = 0; e->extcache[i].v = 0; @@ -492,8 +491,6 @@ void extcacheUnwind(extcache_t* cache) // And now, rebuild the x87cache info with extcache cache->mmxcount = 0; cache->fpu_scratch = 0; - cache->fpu_extra_qscratch = 0; - cache->fpu_reg = 0; for (int i = 0; i < 8; ++i) { cache->x87cache[i] = -1; cache->mmxcache[i].v = -1; @@ -511,19 +508,16 @@ void extcacheUnwind(extcache_t* cache) cache->mmxcache[cache->extcache[i].n].reg = EXTREG(i); cache->mmxcache[cache->extcache[i].n].vector = cache->extcache[i].t == EXT_CACHE_MMV; ++cache->mmxcount; - ++cache->fpu_reg; break; case EXT_CACHE_SS: cache->ssecache[cache->extcache[i].n].reg = EXTREG(i); cache->ssecache[cache->extcache[i].n].vector = 0; cache->ssecache[cache->extcache[i].n].single = 1; - ++cache->fpu_reg; break; case EXT_CACHE_SD: cache->ssecache[cache->extcache[i].n].reg = EXTREG(i); cache->ssecache[cache->extcache[i].n].vector = 0; cache->ssecache[cache->extcache[i].n].single = 0; - ++cache->fpu_reg; break; case EXT_CACHE_XMMR: case EXT_CACHE_XMMW: @@ -532,7 +526,6 @@ void extcacheUnwind(extcache_t* cache) cache->ssecache[cache->extcache[i].n].reg = EXTREG(i); cache->ssecache[cache->extcache[i].n].vector = 1; cache->ssecache[cache->extcache[i].n].write = (cache->extcache[i].t == EXT_CACHE_XMMW) ? 1 : 0; - ++cache->fpu_reg; break; case EXT_CACHE_ST_F: case EXT_CACHE_ST_D: @@ -540,7 +533,6 @@ void extcacheUnwind(extcache_t* cache) cache->x87cache[x87reg] = cache->extcache[i].n; cache->x87reg[x87reg] = EXTREG(i); ++x87reg; - ++cache->fpu_reg; break; case EXT_CACHE_SCR: cache->fpuused[i] = 0; diff --git a/src/dynarec/rv64/dynarec_rv64_private.h b/src/dynarec/rv64/dynarec_rv64_private.h index dcb5b8ba..a5972009 100644 --- a/src/dynarec/rv64/dynarec_rv64_private.h +++ b/src/dynarec/rv64/dynarec_rv64_private.h @@ -90,8 +90,6 @@ typedef struct extcache_s { int8_t x87stack; // cache stack counter int8_t mmxcount; // number of mmx register used (not both mmx and x87 at the same time) int8_t fpu_scratch; // scratch counter - int8_t fpu_extra_qscratch; // some opcode need an extra quad scratch register - int8_t fpu_reg; // x87/sse/mmx reg counter } extcache_t; typedef struct flagcache_s { |