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* [DYNAREC] Fixed some oversized memory load (#3051)Yang Liu2025-10-101-1/+9
* [DYNAREC][INTERP] Added a few multibyte nops (#3046)Yang Liu2025-10-101-0/+5
* [ARM64_DYNAREC] A few minor fixes to some opcodesptitSeb2025-09-081-1/+1
* [ARM64_DYNAREC] Fixed PCMPESTRI fastpath SF flag computation (#2876)Yang Liu2025-08-011-5/+5
* [ARM64_DYNAREC] Small optim on (V/F)COMI(SS/SD) opcodesptitSeb2025-07-161-1/+3
* [ARM64_DYNAREC] Removed fastpath for (V)MINPD/MAXPD as it's too inexactptitSeb2025-07-091-14/+6
* [ARM64_DYNAREC] Fined tuned UD value for BSR/BSFptitSeb2025-07-091-2/+4
* [ARM64_DYNAREC] Fixed a regression introduced with 4903177bab1f3324a0faeedd96...ptitSeb2025-06-301-1/+1
* [DYNACACHE] More work on dynache relocationptitSeb2025-06-151-1/+1
* [DYNACACHE] Refactored cpu extension, will be used in dynacache signature checksptitSeb2025-06-141-11/+11
* [DYNACACHE] More work on preparing internal reloc, plus fix non-trace buildptitSeb2025-06-131-9/+6
* [DYNACACHE] Created a const table, for later use in internal relocation ([ARM...ptitSeb2025-06-131-14/+13
* [ARM64_DYNAREC] Small optim on PTEST opcodeptitSeb2025-04-291-17/+21
* [ARM64_DYNAREC] Mostly cosmetic changes to SSE/AVX packed shift opcodesptitSeb2025-04-281-2/+2
* [ARM64_DYNAREC] Small optim for PSIGN[B/W/D] opcodesptitSeb2025-04-271-18/+12
* [ARM64_DYNAREC] Some work on UD flags on (66) F3 0F BC/BD opcodesptitSeb2025-04-271-10/+32
* [ARM64_DYNAREC] Refactored (V)PSHUFD opcodesptitSeb2025-04-261-42/+78
* [ARM64_DYNAREC] Allow shift with saturation on (V)PMULH(U)W because it will n...ptitSeb2025-04-261-4/+2
* [ARM64_DYNAREC] Small fix for edge cases on (V)PMULHUW opcodesptitSeb2025-04-261-2/+4
* [ARM64_DYNAREC] Fixed (rarely used) some edge case for (V)PMULHRSW opcode (an...ptitSeb2025-04-251-1/+8
* [ARM64_DYNAREC] Minor change, (V)PMOVMSKB is only valid on register, not memoryptitSeb2025-04-251-17/+21
* [ARM64_DYNAREC] Fixed a potential issue with PCMPEQQ opcodes, and many missin...ptitSeb2025-04-251-63/+63
* [ARM64_DYNAREC] Some optimisation to some (V)(P)BLEND* opcodesptitSeb2025-04-241-34/+7
* [ARM64_DYNAREC] Small optim on (V)PACKUSDW opcodesptitSeb2025-04-241-7/+2
* [ARM64_DYNAREC] Small change and optims to various (V)MOVNT* opcodesptitSeb2025-04-241-10/+5
* [ARM64_DYNAREC] Minor optim to MOVNTDQA (#2568)Yang Liu2025-04-241-3/+10
* [ARM64_DYNAREC] Small fixes and improvments to (V)MOVMSKP[S/D] opcodesptitSeb2025-04-231-1/+1
* [ARM64_DYNAREC] Few fixes and small cosmetic changes to some partial (V)MOV o...ptitSeb2025-04-231-2/+2
* [ARM64_DYNAREC] Small improvements to (V)MASKMOVDQU opcodeptitSeb2025-04-211-5/+3
* [ARM64_DYNAREC] Add/Improved (V)H[ADD/SUB]P[S/D] opcodesptitSeb2025-04-211-4/+13
* [ARM64_DYNAREC] Small change to 66 0F 3A 17 opcodeptitSeb2025-04-211-2/+2
* [ARM64_DYNAREC] Minor cosmetic changesptitSeb2025-04-211-1/+1
* [RV64_DYNAREC] Added X87DOUBLE=2 support (#2553)Yang Liu2025-04-211-1/+1
* [DYNAREC] Introduce BOX64_DYNAREC_X87DOUBLE=2 to handle Low Precision x87 ([A...ptitSeb2025-04-161-2/+3
* [ARM64_DYNAREC] Some more FRINTTS and AVX/SSE fixes (might help #2520)ptitSeb2025-04-111-10/+4
* [ARM4_DYNAREC] A few changes to seem SSE/AVX comparison and convertions opcod...ptitSeb2025-04-041-12/+16
* Moved more functions to os.h (#2497)Yang Liu2025-04-031-1/+0
* [ARM64_DYNAREC] Fixed an optim in BLENDPS opcodeptitSeb2025-04-021-2/+2
* Introduced box64cpu.h for exported interpreter and dynarec functions (#2490)Yang Liu2025-04-011-2/+1
* [ARM64_DYNAREC] Improved (V)MAXP[S/D] and (V)MINP[S/D] opcodes to more closel...ptitSeb2025-03-261-13/+11
* [ARM64_DYNAREC] Fixed a typo in flag computation for PCMPESTRI and BZHI opcodesptitSeb2025-02-201-1/+1
* [INTERP] Added more nops ([DYNAREC] too) (#2378)Yang Liu2025-02-171-0/+1
* [ARM64_DYNAREC] Continue work on UD flagsptitSeb2025-02-171-70/+50
* [INTERP] Added 66 0F 19 NOP opcode ([DYNAREC] too) (#2375)Yang Liu2025-02-171-0/+1
* [ARM64_DYNAREC] Improved safeflags=2ptitSeb2025-02-161-6/+10
* [ARM64_DYNAREC] Add some opcodes (#2358)wannacu2025-02-141-0/+21
* [ARM64_DYNAREC] More work on flagptitSeb2025-02-121-18/+17
* [ARM64_DYNAREC] Added more details on Need optim message for easier grepptitSeb2025-02-031-2/+2
* [DYNAREC] Added preliminary per-file settings (#2288)Yang Liu2025-01-231-2/+2
* [ARM64_DYNAREC] Added a few AVX opcode and Improved/Fixed some existing SSE a...ptitSeb2025-01-221-10/+10