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* [DYNAREC] Fixed some oversized memory load (#3051)Yang Liu2025-10-101-4/+9
* [ARM64_DYNAREC] Fixed some extended instance of VCMPSD opcodesptitSeb2025-06-251-3/+3
* [DYNACACHE] Introduced DynaCache for ARM64 (disabled by default)ptitSeb2025-06-191-3/+1
* [DYNACACHE] Refactored cpu extension, will be used in dynacache signature checksptitSeb2025-06-141-7/+7
* [ARM64_DYNAREC] Add fastnan=0 handling in (V)SQRTSS opcodesptitSeb2025-04-301-1/+1
* [ARM64_DYNAREC] Various improvment to various SSE/AVX 128bits/256bits mov op...ptitSeb2025-04-231-4/+3
* [ARM64_DYNAREC] Improved (V)[MIN/MAX][S/P][S/D] opcodesptitSeb2025-04-221-2/+2
* [ARM64_DYNAREC] Fixed potential issue with (V)LDDQU opcodeptitSeb2025-04-211-2/+2
* [ARM64_DYNAREC] Add/Improved (V)H[ADD/SUB]P[S/D] opcodesptitSeb2025-04-211-4/+1
* [ARM4_DYNAREC] A few changes to seem SSE/AVX comparison and convertions opcod...ptitSeb2025-04-041-37/+82
* Moved more functions to os.h (#2497)Yang Liu2025-04-031-1/+0
* Introduced box64cpu.h for exported interpreter and dynarec functions (#2490)Yang Liu2025-04-011-2/+1
* [ARM64_DYNAREC] Improved VHSUBPS opcode, and added fastnan=0 pathptitSeb2025-03-261-13/+16
* [ARM64_DYNAREC] Improved (V)HADDPS with fastnan=0ptitSeb2025-03-261-0/+18
* [ARM64_DYNAREC] Fixed a few potential issue with some AVX opcodesptitSeb2025-03-081-1/+1
* [ARM64_DYNAREC] Added more AVX opcodes (#2372)wannacu2025-02-171-1/+1
* [ARM64_DYNAREC] Various small fixes and optims in a few AVX opcodesptitSeb2025-01-311-1/+6
* [ARM64_DYNAREC] Added a few AVX opcode and Improved/Fixed some existing SSE a...ptitSeb2025-01-221-26/+86
* [ENV] Initial refactor of env variables infrastructure (#2274)Yang Liu2025-01-211-11/+11
* [ARM64_DYNAREC] Added one more case of fastround=2 for AVX.F2.0F 5A opcodeptitSeb2025-01-151-1/+7
* [DYNAREC] Reuse strongmem infra for all backends (#2052)Yang Liu2024-11-211-1/+1
* [DYNAREC] Reworked strong memory emulation (#2043)Yang Liu2024-11-191-1/+0
* [ARM64_DYNAREC] Added AVX.F2.0F D0 opcodeptitSeb2024-07-071-0/+21
* [ARM64_DYNAREC] Added AVX.F2.0F 7C/F0 opcodesptitSeb2024-06-141-0/+33
* [ARM64_DYNAREC] Added AVX.66.0F 50/C2, AVX.66.0F3A 0D, AVX.66.0F38 16/28/29/2...ptitSeb2024-06-081-0/+26
* [ARM64_DYNAREC] Added AVX.66.0F E6, AVX.66.0F38 98 and fixed AVX.F2.0F E6 opc...ptitSeb2024-06-081-5/+4
* [ARM64_DYNAREC] Fixed VCMPSS opcodeptitSeb2024-06-061-0/+50
* [ARM64_DYNAREC] Added a bunch of AVX ocpodes and some fixes tooptitSeb2024-06-051-4/+74
* [ARM64_DYNAREC] Fixed AVX.F2/F3.0F 5D/5F opcodesptitSeb2024-06-031-4/+4
* [ARM64_DYNAREC] Empty regs needs to be fetched last (again)ptitSeb2024-06-031-42/+14
* [ARM64_DYNAREC] Added AVX.F2.0F 58-5A/5C-5F opcodesptitSeb2024-06-011-0/+123
* [ARM64_DYNAREC] Added AVX.F3.0F 10-12/16/2A/2C/2D/58-5F opcodes, plus a few o...ptitSeb2024-06-011-1/+1
* [ARM64_DYNAREC] Added AVX.F2.0F 10-12/2A/2C/2D opcodesptitSeb2024-06-011-0/+190